1 | # ------------------------------------------------------------- |
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2 | # Copyright (c) 2009 Rice University |
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3 | # All Rights Reserved |
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4 | # This code is covered by the Rice-WARP license |
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5 | # See http://warp.rice.edu/license/ for details |
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6 | # ------------------------------------------------------------- |
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7 | |
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8 | ATTRIBUTE VENDOR = Rice University - WARP Project |
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9 | ATTRIBUTE SPEC_URL = http://warp.rice.edu/ |
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10 | ATTRIBUTE CONTACT_INFO_URL= http://warp.rice.edu/ |
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11 | ATTRIBUTE NAME = WARP Kits (FPGA/Clock/Radio Boards) |
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12 | ATTRIBUTE REVISION = FPGA 2.2 / Radio 1.4 / Clock 1.1 (XPS 10 Version) |
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13 | ATTRIBUTE DESC = Rice University WARP |
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14 | ATTRIBUTE LONG_DESC = 'This board utilizes a Xilinx Virtex-4 FPGA XC4VFX100-FF1517-11C. The peripherals included thus far are LEDs, Pushbuttons, Hex Displays, SystemACE, DipSW, Clock Board Controller, Serial Port 0 and 1, Trimode Ethernet MAC, 2GB DDR2 SO-DIMM Memory, Radio Controller and Bridges for all 4 slots, Analog Bridge for slot 4, User IO Board bridge for slot 1.' |
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15 | |
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16 | BEGIN IO_INTERFACE |
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17 | ATTRIBUTE IOTYPE = XIL_CLOCK_V1 |
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18 | ATTRIBUTE INSTANCE = clkgen |
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19 | PARAMETER CLK_FREQ = 40000000, IO_IS=clk_freq, RANGE=(40000000) # 40 MHz |
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20 | PORT SYSCLK = CLK_40MHZ_OSC, IO_IS=ext_clk |
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21 | END |
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22 | |
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23 | # Defines the reset interface. Currently set to use first push button |
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24 | BEGIN IO_INTERFACE |
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25 | ATTRIBUTE IOTYPE = XIL_RESET_V1 |
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26 | ATTRIBUTE INSTANCE = rst_0 |
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27 | PARAMETER RST_POLARITY =1, IO_IS=polarity, VALUE_NOTE=Active HIGH |
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28 | PORT INIT = CONN_INIT_INIT, IO_IS=ext_rst |
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29 | END |
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30 | |
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31 | BEGIN IO_INTERFACE |
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32 | ATTRIBUTE IOTYPE = WARP_V4_USERIO_V1 |
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33 | ATTRIBUTE INSTANCE = warp_v4_userio_all |
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34 | PARAMETER C_ADDRESS_0 = 0x40, IO_IS = address_0 |
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35 | PARAMETER C_ADDRESS_1 = 0x42, IO_IS = address_1 |
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36 | PARAMETER C_I2C_DIVIDER = 0x40, IO_IS = i2c_divider |
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37 | |
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38 | PORT LED0 = CONN_LEDs_LED0, IO_IS = leds_out[0] |
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39 | PORT LED1 = CONN_LEDs_LED1, IO_IS = leds_out[1] |
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40 | PORT LED2 = CONN_LEDs_LED2, IO_IS = leds_out[2] |
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41 | PORT LED3 = CONN_LEDs_LED3, IO_IS = leds_out[3] |
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42 | PORT LED4 = CONN_LEDs_LED4, IO_IS = leds_out[4] |
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43 | PORT LED5 = CONN_LEDs_LED5, IO_IS = leds_out[5] |
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44 | PORT LED6 = CONN_LEDs_LED6, IO_IS = leds_out[6] |
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45 | PORT LED7 = CONN_LEDs_LED7, IO_IS = leds_out[7] |
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46 | |
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47 | PORT SW_0 = SW_0, IO_IS = dipsw_in[0] |
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48 | PORT SW_1 = SW_1, IO_IS = dipsw_in[1] |
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49 | PORT SW_2 = SW_2, IO_IS = dipsw_in[2] |
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50 | PORT SW_3 = SW_3, IO_IS = dipsw_in[3] |
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51 | |
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52 | PORT PUSHU = CONN_PUSHU, IO_IS = pb_in[0] |
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53 | PORT PUSHL = CONN_PUSHL, IO_IS = pb_in[1] |
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54 | PORT PUSHR = CONN_PUSHR, IO_IS = pb_in[2] |
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55 | PORT PUSHC = CONN_PUSHC, IO_IS = pb_in[3] |
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56 | |
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57 | PORT SCL = iic_scl, IO_IS = scl |
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58 | PORT SDA = iic_sda, IO_IS = sda |
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59 | END |
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60 | |
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61 | # This is the serial port 0. |
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62 | BEGIN IO_INTERFACE |
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63 | ATTRIBUTE IOTYPE = XIL_UART_V1 |
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64 | ATTRIBUTE INSTANCE = rs232_db9 |
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65 | PORT RXD = CONN_RXD_DB9, IO_IS=serial_in |
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66 | PORT TXD = CONN_TXD_DB9, IO_IS=serial_out |
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67 | END |
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68 | |
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69 | # This is the serial port 1. |
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70 | BEGIN IO_INTERFACE |
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71 | ATTRIBUTE IOTYPE = XIL_UART_V1 |
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72 | ATTRIBUTE INSTANCE = rs232_usb |
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73 | PORT RXD = CONN_RXD_USB, IO_IS=serial_in |
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74 | PORT TXD = CONN_TXD_USB, IO_IS=serial_out |
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75 | END |
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76 | |
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77 | # SystemACE Compact Flash microprocessor interface |
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78 | BEGIN IO_INTERFACE |
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79 | ATTRIBUTE IOTYPE = XIL_SYSACE_V1 |
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80 | ATTRIBUTE INSTANCE = sysace_compactflash |
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81 | PARAMETER C_MEM_WIDTH =8, IO_IS=mem_data_bus_width |
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82 | PORT X104_5_OUT = sysace_clk, IO_IS=clk_in |
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83 | PORT X104_1_OE = sysace_clk_oe_n, IO_IS=clk_enable_n, INITIALVAL = VCC |
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84 | PORT MPA00 = sysace_mpa_0, IO_IS = address[0] |
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85 | PORT MPA01 = sysace_mpa_1, IO_IS = address[1] |
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86 | PORT MPA02 = sysace_mpa_2, IO_IS = address[2] |
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87 | PORT MPA03 = sysace_mpa_3, IO_IS = address[3] |
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88 | PORT MPA04 = sysace_mpa_4, IO_IS = address[4] |
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89 | PORT MPA05 = sysace_mpa_5, IO_IS = address[5] |
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90 | PORT MPA06 = sysace_mpa_6, IO_IS = address[6] |
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91 | PORT MPD00 = sysace_mpd_0, IO_IS = data[0] |
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92 | PORT MPD01 = sysace_mpd_1, IO_IS = data[1] |
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93 | PORT MPD02 = sysace_mpd_2, IO_IS = data[2] |
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94 | PORT MPD03 = sysace_mpd_3, IO_IS = data[3] |
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95 | PORT MPD04 = sysace_mpd_4, IO_IS = data[4] |
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96 | PORT MPD05 = sysace_mpd_5, IO_IS = data[5] |
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97 | PORT MPD06 = sysace_mpd_6, IO_IS = data[6] |
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98 | PORT MPD07 = sysace_mpd_7, IO_IS = data[7] |
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99 | PORT MPCE = sysace_mpce, IO_IS=chip_enable |
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100 | PORT MPOE = sysace_mpoe, IO_IS=output_enable |
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101 | PORT MPWE = sysace_mpwe, IO_IS=write_enable |
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102 | PORT MPIRQ = sysace_mpirq, IO_IS=intr_out |
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103 | END |
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104 | |
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105 | # Ethernet MAC |
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106 | BEGIN IO_INTERFACE |
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107 | ATTRIBUTE IOTYPE = XIL_TEMAC_V1 |
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108 | ATTRIBUTE INSTANCE = TriMode_MAC_GMII |
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109 | ATTRIBUTE EXCLUSIVE = Ethernet |
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110 | # hard_temac params |
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111 | PARAMETER C_PHY_TYPE = 1, IO_IS=C_PHY_TYPE |
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112 | PARAMETER C_EMAC1_PRESENT = 0, IO_IS=C_EMAC1_PRESENT |
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113 | # plb_temac params |
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114 | PARAMETER C_TEMAC_INST = 0, IO_IS=C_TEMAC_INST |
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115 | PARAMETER C_TEMAC_BOTH_USED = 0, IO_IS=C_TEMAC_BOTH_USED |
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116 | PARAMETER C_NUM_IDELAYCTRL = 2 |
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117 | PARAMETER C_IDELAYCTRL_LOC = IDELAYCTRL_X1Y5-IDELAYCTRL_X1Y6 |
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118 | # hard_temac ports |
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119 | PORT GMII_TXD_0_7 = GMII_TXD_0_7_s, IO_IS=GMII_TXD_0[7] |
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120 | PORT GMII_TXD_0_6 = GMII_TXD_0_6_s, IO_IS=GMII_TXD_0[6] |
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121 | PORT GMII_TXD_0_5 = GMII_TXD_0_5_s, IO_IS=GMII_TXD_0[5] |
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122 | PORT GMII_TXD_0_4 = GMII_TXD_0_4_s, IO_IS=GMII_TXD_0[4] |
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123 | PORT GMII_TXD_0_3 = GMII_TXD_0_3_s, IO_IS=GMII_TXD_0[3] |
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124 | PORT GMII_TXD_0_2 = GMII_TXD_0_2_s, IO_IS=GMII_TXD_0[2] |
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125 | PORT GMII_TXD_0_1 = GMII_TXD_0_1_s, IO_IS=GMII_TXD_0[1] |
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126 | PORT GMII_TXD_0_0 = GMII_TXD_0_0_s, IO_IS=GMII_TXD_0[0] |
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127 | PORT GMII_TX_EN_0 = GMII_TX_EN_0_s, IO_IS=GMII_TX_EN_0 |
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128 | PORT GMII_TX_ER_0 = GMII_TX_ER_0_s, IO_IS=GMII_TX_ER_0 |
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129 | PORT GMII_TX_CLK_0 = GMII_TX_CLK_0_s, IO_IS=GMII_TX_CLK_0 |
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130 | PORT GMII_RXD_0_7 = GMII_RXD_0_7_s, IO_IS=GMII_RXD_0[7] |
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131 | PORT GMII_RXD_0_6 = GMII_RXD_0_6_s, IO_IS=GMII_RXD_0[6] |
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132 | PORT GMII_RXD_0_5 = GMII_RXD_0_5_s, IO_IS=GMII_RXD_0[5] |
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133 | PORT GMII_RXD_0_4 = GMII_RXD_0_4_s, IO_IS=GMII_RXD_0[4] |
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134 | PORT GMII_RXD_0_3 = GMII_RXD_0_3_s, IO_IS=GMII_RXD_0[3] |
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135 | PORT GMII_RXD_0_2 = GMII_RXD_0_2_s, IO_IS=GMII_RXD_0[2] |
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136 | PORT GMII_RXD_0_1 = GMII_RXD_0_1_s, IO_IS=GMII_RXD_0[1] |
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137 | PORT GMII_RXD_0_0 = GMII_RXD_0_0_s, IO_IS=GMII_RXD_0[0] |
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138 | PORT GMII_RX_DV_0 = GMII_RX_DV_0_s, IO_IS=GMII_RX_DV_0 |
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139 | PORT GMII_RX_ER_0 = GMII_RX_ER_0_s, IO_IS=GMII_RX_ER_0 |
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140 | PORT GMII_RX_CLK_0 = GMII_RX_CLK_0_s, IO_IS=GMII_RX_CLK_0 |
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141 | PORT MII_TX_CLK_0 = MII_TX_CLK_0_s, IO_IS=MII_TX_CLK_0 |
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142 | PORT GMII_COL_0 = GMII_COL_0_s, IO_IS=GMII_COL_0 |
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143 | PORT GMII_CRS_0 = GMII_CRS_0_s, IO_IS=GMII_CRS_0 |
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144 | PORT MDIO_0 = MDIO_0_s, IO_IS=MDIO_0 |
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145 | PORT MDC_0 = MDC_0_s, IO_IS=MDC_0 |
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146 | # plb_temac ports |
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147 | PORT PhyResetN = phy_rst_n_s, IO_IS=PhyResetN |
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148 | END |
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149 | |
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150 | # Clock board configurator |
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151 | BEGIN IO_INTERFACE |
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152 | ATTRIBUTE IOTYPE = WARP_CLKBRD_CONFIG_V1 |
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153 | ATTRIBUTE INSTANCE = clk_board_config |
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154 | |
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155 | PORT sys_clk = CLK_100MHZ_OSC |
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156 | PORT sys_rst = net_gnd |
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157 | PORT cfg_radio_dat_out = clk_board_radio_DO |
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158 | PORT cfg_radio_csb_out = clk_board_radio_CS |
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159 | PORT cfg_radio_en_out = clk_board_radio_EN |
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160 | PORT cfg_radio_clk_out = clk_board_radio_CLK |
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161 | PORT cfg_logic_dat_out = clk_board_logic_DO |
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162 | PORT cfg_logic_csb_out = clk_board_logic_CS |
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163 | PORT cfg_logic_en_out = clk_board_logic_EN |
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164 | PORT cfg_logic_clk_out = clk_board_logic_CLK |
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165 | END |
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166 | |
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167 | # # 256MB DDR2 memory |
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168 | # BEGIN IO_INTERFACE |
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169 | # ATTRIBUTE IOTYPE = XIL_MEMORY_V1 |
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170 | # ATTRIBUTE INSTANCE = DDR2_SDRAM_256MB |
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171 | # ATTRIBUTE EXCLUSIVE = ddr2memory |
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172 | # PARAMETER C_MEM_PARTNO = "MT4HTF3264H-667", IO_IS = C_MEM_PARTNO |
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173 | # PARAMETER C_BASEADDR = 0x00000000, IO_IS = C_BASEADDR |
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174 | # PARAMETER C_HIGHADDR = 0x0fffffff, IO_IS = C_HIGHADDR |
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175 | # PARAMETER C_MEM_TYPE = DDR2, IO_IS = C_MEM_TYPE |
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176 | # PARAMETER C_NUM_IDELAYCTRL = 4, IO_IS = C_NUM_IDELAYCTRL #4 |
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177 | # PARAMETER C_IDELAYCTRL_LOC = IDELAYCTRL_X0Y0-IDELAYCTRL_X0Y1-IDELAYCTRL_X2Y1-IDELAYCTRL_X2Y0, IO_IS = C_IDELAYCTRL_LOC |
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178 | # PARAMETER C_MEM_DATA_WIDTH = 64, IO_IS = C_MEMD_DATA_WIDTH |
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179 | # PARAMETER C_MEM_DQS_WIDTH = 8, IO_IS = C_MEM_DQS_WIDTH |
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180 | # PARAMETER C_MEM_DM_WIDTH = 8, IO_IS = C_MEM_DM_WIDTH |
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181 | # |
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182 | # PORT DDR2_Addr_0 = ddr2_256mb_addr_0, IO_IS = ddr2_address[0] |
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183 | # PORT DDR2_Addr_1 = ddr2_256mb_addr_1, IO_IS = ddr2_address[1] |
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184 | # PORT DDR2_Addr_2 = ddr2_256mb_addr_2, IO_IS = ddr2_address[2] |
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185 | # PORT DDR2_Addr_3 = ddr2_256mb_addr_3, IO_IS = ddr2_address[3] |
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186 | # PORT DDR2_Addr_4 = ddr2_256mb_addr_4, IO_IS = ddr2_address[4] |
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187 | # PORT DDR2_Addr_5 = ddr2_256mb_addr_5, IO_IS = ddr2_address[5] |
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188 | # PORT DDR2_Addr_6 = ddr2_256mb_addr_6, IO_IS = ddr2_address[6] |
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189 | # PORT DDR2_Addr_7 = ddr2_256mb_addr_7, IO_IS = ddr2_address[7] |
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190 | # PORT DDR2_Addr_8 = ddr2_256mb_addr_8, IO_IS = ddr2_address[8] |
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191 | # PORT DDR2_Addr_9 = ddr2_256mb_addr_9, IO_IS = ddr2_address[9] |
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192 | # PORT DDR2_Addr_10 = ddr2_256mb_addr_10, IO_IS = ddr2_address[10] |
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193 | # PORT DDR2_Addr_11 = ddr2_256mb_addr_11, IO_IS = ddr2_address[11] |
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194 | # PORT DDR2_Addr_12 = ddr2_256mb_addr_12, IO_IS = ddr2_address[12] |
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195 | # PORT DDR2_BankAddr_0 = ddr2_256mb_bankaddr_0, IO_IS = ddr2_BankAddr[0] |
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196 | # PORT DDR2_BankAddr_1 = ddr2_256mb_bankaddr_1, IO_IS = ddr2_BankAddr[1] |
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197 | # PORT DDR2_CASn = ddr2_256mb_casn, IO_IS = ddr2_col_addr_select |
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198 | # PORT DDR2_CKE_0 = ddr2_256mb_cke_0, IO_IS = ddr2_clk_enable[0] |
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199 | # # PORT DDR2_CKE_1 = ddr2_256mb_cke_1, IO_IS = ddr2_clk_enable[1] |
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200 | # PORT DDR2_CSn_0 = ddr2_256mb_csn_0, IO_IS = ddr2_chip_select[0] |
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201 | # # PORT DDR2_CSn_1 = ddr2_256mb_csn_1, IO_IS = ddr2_chip_select[1] |
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202 | # PORT DDR2_RASn = ddr2_256mb_rasn, IO_IS = ddr2_row_addr_select |
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203 | # PORT DDR2_WEn = ddr2_256mb_wen, IO_IS = ddr2_write_enable |
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204 | # PORT DDR2_DM_0 = ddr2_256mb_dm_0, IO_IS = ddr2_data_mask[0] |
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205 | # PORT DDR2_DM_1 = ddr2_256mb_dm_1, IO_IS = ddr2_data_mask[1] |
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206 | # PORT DDR2_DM_2 = ddr2_256mb_dm_2, IO_IS = ddr2_data_mask[2] |
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207 | # PORT DDR2_DM_3 = ddr2_256mb_dm_3, IO_IS = ddr2_data_mask[3] |
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208 | # PORT DDR2_DM_4 = ddr2_256mb_dm_4, IO_IS = ddr2_data_mask[4] |
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209 | # PORT DDR2_DM_5 = ddr2_256mb_dm_5, IO_IS = ddr2_data_mask[5] |
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210 | # PORT DDR2_DM_6 = ddr2_256mb_dm_6, IO_IS = ddr2_data_mask[6] |
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211 | # PORT DDR2_DM_7 = ddr2_256mb_dm_7, IO_IS = ddr2_data_mask[7] |
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212 | # PORT DDR2_DQS_0 = ddr2_256mb_dqs_0, IO_IS = ddr2_data_strobe[0] |
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213 | # PORT DDR2_DQS_1 = ddr2_256mb_dqs_1, IO_IS = ddr2_data_strobe[1] |
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214 | # PORT DDR2_DQS_2 = ddr2_256mb_dqs_2, IO_IS = ddr2_data_strobe[2] |
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215 | # PORT DDR2_DQS_3 = ddr2_256mb_dqs_3, IO_IS = ddr2_data_strobe[3] |
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216 | # PORT DDR2_DQS_4 = ddr2_256mb_dqs_4, IO_IS = ddr2_data_strobe[4] |
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217 | # PORT DDR2_DQS_5 = ddr2_256mb_dqs_5, IO_IS = ddr2_data_strobe[5] |
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218 | # PORT DDR2_DQS_6 = ddr2_256mb_dqs_6, IO_IS = ddr2_data_strobe[6] |
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219 | # PORT DDR2_DQS_7 = ddr2_256mb_dqs_7, IO_IS = ddr2_data_strobe[7] |
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220 | # PORT DDR2_DQSn_0 = ddr2_256mb_dqsn_0, IO_IS = ddr2_data_strobe_n[0] |
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221 | # PORT DDR2_DQSn_1 = ddr2_256mb_dqsn_1, IO_IS = ddr2_data_strobe_n[1] |
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222 | # PORT DDR2_DQSn_2 = ddr2_256mb_dqsn_2, IO_IS = ddr2_data_strobe_n[2] |
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223 | # PORT DDR2_DQSn_3 = ddr2_256mb_dqsn_3, IO_IS = ddr2_data_strobe_n[3] |
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224 | # PORT DDR2_DQSn_4 = ddr2_256mb_dqsn_4, IO_IS = ddr2_data_strobe_n[4] |
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225 | # PORT DDR2_DQSn_5 = ddr2_256mb_dqsn_5, IO_IS = ddr2_data_strobe_n[5] |
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226 | # PORT DDR2_DQSn_6 = ddr2_256mb_dqsn_6, IO_IS = ddr2_data_strobe_n[6] |
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227 | # PORT DDR2_DQSn_7 = ddr2_256mb_dqsn_7, IO_IS = ddr2_data_strobe_n[7] |
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228 | # PORT DDR2_DQ_0 = ddr2_256mb_dq_0, IO_IS = ddr2_data[0] |
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229 | # PORT DDR2_DQ_1 = ddr2_256mb_dq_1, IO_IS = ddr2_data[1] |
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230 | # PORT DDR2_DQ_2 = ddr2_256mb_dq_2, IO_IS = ddr2_data[2] |
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231 | # PORT DDR2_DQ_3 = ddr2_256mb_dq_3, IO_IS = ddr2_data[3] |
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232 | # PORT DDR2_DQ_4 = ddr2_256mb_dq_4, IO_IS = ddr2_data[4] |
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233 | # PORT DDR2_DQ_5 = ddr2_256mb_dq_5, IO_IS = ddr2_data[5] |
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234 | # PORT DDR2_DQ_6 = ddr2_256mb_dq_6, IO_IS = ddr2_data[6] |
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235 | # PORT DDR2_DQ_7 = ddr2_256mb_dq_7, IO_IS = ddr2_data[7] |
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236 | # PORT DDR2_DQ_8 = ddr2_256mb_dq_8, IO_IS = ddr2_data[8] |
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237 | # PORT DDR2_DQ_9 = ddr2_256mb_dq_9, IO_IS = ddr2_data[9] |
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238 | # PORT DDR2_DQ_10 = ddr2_256mb_dq_10, IO_IS = ddr2_data[10] |
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239 | # PORT DDR2_DQ_11 = ddr2_256mb_dq_11, IO_IS = ddr2_data[11] |
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240 | # PORT DDR2_DQ_12 = ddr2_256mb_dq_12, IO_IS = ddr2_data[12] |
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241 | # PORT DDR2_DQ_13 = ddr2_256mb_dq_13, IO_IS = ddr2_data[13] |
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242 | # PORT DDR2_DQ_14 = ddr2_256mb_dq_14, IO_IS = ddr2_data[14] |
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243 | # PORT DDR2_DQ_15 = ddr2_256mb_dq_15, IO_IS = ddr2_data[15] |
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244 | # PORT DDR2_DQ_16 = ddr2_256mb_dq_16, IO_IS = ddr2_data[16] |
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245 | # PORT DDR2_DQ_17 = ddr2_256mb_dq_17, IO_IS = ddr2_data[17] |
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246 | # PORT DDR2_DQ_18 = ddr2_256mb_dq_18, IO_IS = ddr2_data[18] |
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247 | # PORT DDR2_DQ_19 = ddr2_256mb_dq_19, IO_IS = ddr2_data[19] |
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248 | # PORT DDR2_DQ_20 = ddr2_256mb_dq_20, IO_IS = ddr2_data[20] |
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249 | # PORT DDR2_DQ_21 = ddr2_256mb_dq_21, IO_IS = ddr2_data[21] |
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250 | # PORT DDR2_DQ_22 = ddr2_256mb_dq_22, IO_IS = ddr2_data[22] |
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251 | # PORT DDR2_DQ_23 = ddr2_256mb_dq_23, IO_IS = ddr2_data[23] |
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252 | # PORT DDR2_DQ_24 = ddr2_256mb_dq_24, IO_IS = ddr2_data[24] |
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253 | # PORT DDR2_DQ_25 = ddr2_256mb_dq_25, IO_IS = ddr2_data[25] |
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254 | # PORT DDR2_DQ_26 = ddr2_256mb_dq_26, IO_IS = ddr2_data[26] |
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255 | # PORT DDR2_DQ_27 = ddr2_256mb_dq_27, IO_IS = ddr2_data[27] |
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256 | # PORT DDR2_DQ_28 = ddr2_256mb_dq_28, IO_IS = ddr2_data[28] |
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257 | # PORT DDR2_DQ_29 = ddr2_256mb_dq_29, IO_IS = ddr2_data[29] |
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258 | # PORT DDR2_DQ_30 = ddr2_256mb_dq_30, IO_IS = ddr2_data[30] |
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259 | # PORT DDR2_DQ_31 = ddr2_256mb_dq_31, IO_IS = ddr2_data[31] |
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260 | # PORT DDR2_DQ_32 = ddr2_256mb_dq_32, IO_IS = ddr2_data[32] |
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261 | # PORT DDR2_DQ_33 = ddr2_256mb_dq_33, IO_IS = ddr2_data[33] |
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262 | # PORT DDR2_DQ_34 = ddr2_256mb_dq_34, IO_IS = ddr2_data[34] |
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263 | # PORT DDR2_DQ_35 = ddr2_256mb_dq_35, IO_IS = ddr2_data[35] |
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264 | # PORT DDR2_DQ_36 = ddr2_256mb_dq_36, IO_IS = ddr2_data[36] |
---|
265 | # PORT DDR2_DQ_37 = ddr2_256mb_dq_37, IO_IS = ddr2_data[37] |
---|
266 | # PORT DDR2_DQ_38 = ddr2_256mb_dq_38, IO_IS = ddr2_data[38] |
---|
267 | # PORT DDR2_DQ_39 = ddr2_256mb_dq_39, IO_IS = ddr2_data[39] |
---|
268 | # PORT DDR2_DQ_40 = ddr2_256mb_dq_40, IO_IS = ddr2_data[40] |
---|
269 | # PORT DDR2_DQ_41 = ddr2_256mb_dq_41, IO_IS = ddr2_data[41] |
---|
270 | # PORT DDR2_DQ_42 = ddr2_256mb_dq_42, IO_IS = ddr2_data[42] |
---|
271 | # PORT DDR2_DQ_43 = ddr2_256mb_dq_43, IO_IS = ddr2_data[43] |
---|
272 | # PORT DDR2_DQ_44 = ddr2_256mb_dq_44, IO_IS = ddr2_data[44] |
---|
273 | # PORT DDR2_DQ_45 = ddr2_256mb_dq_45, IO_IS = ddr2_data[45] |
---|
274 | # PORT DDR2_DQ_46 = ddr2_256mb_dq_46, IO_IS = ddr2_data[46] |
---|
275 | # PORT DDR2_DQ_47 = ddr2_256mb_dq_47, IO_IS = ddr2_data[47] |
---|
276 | # PORT DDR2_DQ_48 = ddr2_256mb_dq_48, IO_IS = ddr2_data[48] |
---|
277 | # PORT DDR2_DQ_49 = ddr2_256mb_dq_49, IO_IS = ddr2_data[49] |
---|
278 | # PORT DDR2_DQ_50 = ddr2_256mb_dq_50, IO_IS = ddr2_data[50] |
---|
279 | # PORT DDR2_DQ_51 = ddr2_256mb_dq_51, IO_IS = ddr2_data[51] |
---|
280 | # PORT DDR2_DQ_52 = ddr2_256mb_dq_52, IO_IS = ddr2_data[52] |
---|
281 | # PORT DDR2_DQ_53 = ddr2_256mb_dq_53, IO_IS = ddr2_data[53] |
---|
282 | # PORT DDR2_DQ_54 = ddr2_256mb_dq_54, IO_IS = ddr2_data[54] |
---|
283 | # PORT DDR2_DQ_55 = ddr2_256mb_dq_55, IO_IS = ddr2_data[55] |
---|
284 | # PORT DDR2_DQ_56 = ddr2_256mb_dq_56, IO_IS = ddr2_data[56] |
---|
285 | # PORT DDR2_DQ_57 = ddr2_256mb_dq_57, IO_IS = ddr2_data[57] |
---|
286 | # PORT DDR2_DQ_58 = ddr2_256mb_dq_58, IO_IS = ddr2_data[58] |
---|
287 | # PORT DDR2_DQ_59 = ddr2_256mb_dq_59, IO_IS = ddr2_data[59] |
---|
288 | # PORT DDR2_DQ_60 = ddr2_256mb_dq_60, IO_IS = ddr2_data[60] |
---|
289 | # PORT DDR2_DQ_61 = ddr2_256mb_dq_61, IO_IS = ddr2_data[61] |
---|
290 | # PORT DDR2_DQ_62 = ddr2_256mb_dq_62, IO_IS = ddr2_data[62] |
---|
291 | # PORT DDR2_DQ_63 = ddr2_256mb_dq_63, IO_IS = ddr2_data[63] |
---|
292 | # # PORT DDR2_Sleep = net_gnd, IO_IS = ddr_sleep |
---|
293 | # # PORT DDR2_WakeUp = net_gnd, IO_IS = ddr_wakeup |
---|
294 | # # PORT DDR2_Init_done = net_gnd, IO_IS = ddr_init_done |
---|
295 | # PORT DDR2_Clk_0 = ddr2_256mb_clk_0, IO_IS = ddr2_clk[0] |
---|
296 | # PORT DDR2_Clk_1 = ddr2_256mb_clk_1, IO_IS = ddr2_clk[1] |
---|
297 | # PORT DDR2_Clkn_0 = ddr2_256mb_clkn_0, IO_IS = ddr2_clk_n[0] |
---|
298 | # PORT DDR2_Clkn_1 = ddr2_256mb_clkn_1, IO_IS = ddr2_clk_n[1] |
---|
299 | # PORT DDR2_ODT = ddr2_256mb_odt, IO_IS = ddr2_odt |
---|
300 | # END |
---|
301 | |
---|
302 | # 2GB DDR2 memory |
---|
303 | BEGIN IO_INTERFACE |
---|
304 | ATTRIBUTE IOTYPE = XIL_MEMORY_V1 |
---|
305 | ATTRIBUTE INSTANCE = DDR2_SDRAM_2GB |
---|
306 | ATTRIBUTE EXCLUSIVE = ddr2memory |
---|
307 | PARAMETER C_MEM_PARTNO = "MT16HTF25664H-667", IO_IS = C_MEM_PARTNO |
---|
308 | PARAMETER C_BASEADDR = 0x00000000, IO_IS = C_BASEADDR |
---|
309 | PARAMETER C_HIGHADDR = 0x7fffffff, IO_IS = C_HIGHADDR |
---|
310 | PARAMETER C_MEM_TYPE = DDR2, IO_IS = C_MEM_TYPE |
---|
311 | PARAMETER C_NUM_IDELAYCTRL = 4, IO_IS = C_NUM_IDELAYCTRL #4 |
---|
312 | PARAMETER C_IDELAYCTRL_LOC = IDELAYCTRL_X0Y0-IDELAYCTRL_X0Y1-IDELAYCTRL_X2Y1-IDELAYCTRL_X2Y0, IO_IS = C_IDELAYCTRL_LOC |
---|
313 | PARAMETER C_MEM_DATA_WIDTH = 64, IO_IS = C_MEMD_DATA_WIDTH |
---|
314 | PARAMETER C_MEM_DQS_WIDTH = 8, IO_IS = C_MEM_DQS_WIDTH |
---|
315 | PARAMETER C_MEM_DM_WIDTH = 8, IO_IS = C_MEM_DM_WIDTH |
---|
316 | PARAMETER C_MEM_ADDR_WIDTH = 14, IO_IS = C_MEM_ADDR_WIDTH |
---|
317 | PARAMETER C_MEM_BANKADDR_WIDTH = 3, IO_IS = C_MEM_BANKADDR_WIDTH |
---|
318 | |
---|
319 | PORT DDR2_Addr_0 = ddr2_2gb_addr_0, IO_IS = ddr2_address[0] |
---|
320 | PORT DDR2_Addr_1 = ddr2_2gb_addr_1, IO_IS = ddr2_address[1] |
---|
321 | PORT DDR2_Addr_2 = ddr2_2gb_addr_2, IO_IS = ddr2_address[2] |
---|
322 | PORT DDR2_Addr_3 = ddr2_2gb_addr_3, IO_IS = ddr2_address[3] |
---|
323 | PORT DDR2_Addr_4 = ddr2_2gb_addr_4, IO_IS = ddr2_address[4] |
---|
324 | PORT DDR2_Addr_5 = ddr2_2gb_addr_5, IO_IS = ddr2_address[5] |
---|
325 | PORT DDR2_Addr_6 = ddr2_2gb_addr_6, IO_IS = ddr2_address[6] |
---|
326 | PORT DDR2_Addr_7 = ddr2_2gb_addr_7, IO_IS = ddr2_address[7] |
---|
327 | PORT DDR2_Addr_8 = ddr2_2gb_addr_8, IO_IS = ddr2_address[8] |
---|
328 | PORT DDR2_Addr_9 = ddr2_2gb_addr_9, IO_IS = ddr2_address[9] |
---|
329 | PORT DDR2_Addr_10 = ddr2_2gb_addr_10, IO_IS = ddr2_address[10] |
---|
330 | PORT DDR2_Addr_11 = ddr2_2gb_addr_11, IO_IS = ddr2_address[11] |
---|
331 | PORT DDR2_Addr_12 = ddr2_2gb_addr_12, IO_IS = ddr2_address[12] |
---|
332 | PORT DDR2_Addr_13 = ddr2_2gb_addr_13, IO_IS = ddr2_address[13] |
---|
333 | PORT DDR2_BankAddr_0 = ddr2_2gb_bankaddr_0, IO_IS = ddr2_BankAddr[0] |
---|
334 | PORT DDR2_BankAddr_1 = ddr2_2gb_bankaddr_1, IO_IS = ddr2_BankAddr[1] |
---|
335 | PORT DDR2_BankAddr_2 = ddr2_2gb_bankaddr_2, IO_IS = ddr2_BankAddr[2] |
---|
336 | PORT DDR2_CASn = ddr2_2gb_casn, IO_IS = ddr2_col_addr_select |
---|
337 | PORT DDR2_CKE_0 = ddr2_2gb_cke_0, IO_IS = ddr2_clk_enable[0] |
---|
338 | PORT DDR2_CKE_1 = ddr2_2gb_cke_1, IO_IS = ddr2_clk_enable[1] |
---|
339 | PORT DDR2_CSn_0 = ddr2_2gb_csn_0, IO_IS = ddr2_chip_select[0] |
---|
340 | PORT DDR2_CSn_1 = ddr2_2gb_csn_1, IO_IS = ddr2_chip_select[1] |
---|
341 | PORT DDR2_RASn = ddr2_2gb_rasn, IO_IS = ddr2_row_addr_select |
---|
342 | PORT DDR2_WEn = ddr2_2gb_wen, IO_IS = ddr2_write_enable |
---|
343 | PORT DDR2_DM_0 = ddr2_2gb_dm_0, IO_IS = ddr2_data_mask[0] |
---|
344 | PORT DDR2_DM_1 = ddr2_2gb_dm_1, IO_IS = ddr2_data_mask[1] |
---|
345 | PORT DDR2_DM_2 = ddr2_2gb_dm_2, IO_IS = ddr2_data_mask[2] |
---|
346 | PORT DDR2_DM_3 = ddr2_2gb_dm_3, IO_IS = ddr2_data_mask[3] |
---|
347 | PORT DDR2_DM_4 = ddr2_2gb_dm_4, IO_IS = ddr2_data_mask[4] |
---|
348 | PORT DDR2_DM_5 = ddr2_2gb_dm_5, IO_IS = ddr2_data_mask[5] |
---|
349 | PORT DDR2_DM_6 = ddr2_2gb_dm_6, IO_IS = ddr2_data_mask[6] |
---|
350 | PORT DDR2_DM_7 = ddr2_2gb_dm_7, IO_IS = ddr2_data_mask[7] |
---|
351 | PORT DDR2_DQS_0 = ddr2_2gb_dqs_0, IO_IS = ddr2_data_strobe[0] |
---|
352 | PORT DDR2_DQS_1 = ddr2_2gb_dqs_1, IO_IS = ddr2_data_strobe[1] |
---|
353 | PORT DDR2_DQS_2 = ddr2_2gb_dqs_2, IO_IS = ddr2_data_strobe[2] |
---|
354 | PORT DDR2_DQS_3 = ddr2_2gb_dqs_3, IO_IS = ddr2_data_strobe[3] |
---|
355 | PORT DDR2_DQS_4 = ddr2_2gb_dqs_4, IO_IS = ddr2_data_strobe[4] |
---|
356 | PORT DDR2_DQS_5 = ddr2_2gb_dqs_5, IO_IS = ddr2_data_strobe[5] |
---|
357 | PORT DDR2_DQS_6 = ddr2_2gb_dqs_6, IO_IS = ddr2_data_strobe[6] |
---|
358 | PORT DDR2_DQS_7 = ddr2_2gb_dqs_7, IO_IS = ddr2_data_strobe[7] |
---|
359 | PORT DDR2_DQSn_0 = ddr2_2gb_dqsn_0, IO_IS = ddr2_data_strobe_n[0] |
---|
360 | PORT DDR2_DQSn_1 = ddr2_2gb_dqsn_1, IO_IS = ddr2_data_strobe_n[1] |
---|
361 | PORT DDR2_DQSn_2 = ddr2_2gb_dqsn_2, IO_IS = ddr2_data_strobe_n[2] |
---|
362 | PORT DDR2_DQSn_3 = ddr2_2gb_dqsn_3, IO_IS = ddr2_data_strobe_n[3] |
---|
363 | PORT DDR2_DQSn_4 = ddr2_2gb_dqsn_4, IO_IS = ddr2_data_strobe_n[4] |
---|
364 | PORT DDR2_DQSn_5 = ddr2_2gb_dqsn_5, IO_IS = ddr2_data_strobe_n[5] |
---|
365 | PORT DDR2_DQSn_6 = ddr2_2gb_dqsn_6, IO_IS = ddr2_data_strobe_n[6] |
---|
366 | PORT DDR2_DQSn_7 = ddr2_2gb_dqsn_7, IO_IS = ddr2_data_strobe_n[7] |
---|
367 | PORT DDR2_DQ_0 = ddr2_2gb_dq_0, IO_IS = ddr2_data[0] |
---|
368 | PORT DDR2_DQ_1 = ddr2_2gb_dq_1, IO_IS = ddr2_data[1] |
---|
369 | PORT DDR2_DQ_2 = ddr2_2gb_dq_2, IO_IS = ddr2_data[2] |
---|
370 | PORT DDR2_DQ_3 = ddr2_2gb_dq_3, IO_IS = ddr2_data[3] |
---|
371 | PORT DDR2_DQ_4 = ddr2_2gb_dq_4, IO_IS = ddr2_data[4] |
---|
372 | PORT DDR2_DQ_5 = ddr2_2gb_dq_5, IO_IS = ddr2_data[5] |
---|
373 | PORT DDR2_DQ_6 = ddr2_2gb_dq_6, IO_IS = ddr2_data[6] |
---|
374 | PORT DDR2_DQ_7 = ddr2_2gb_dq_7, IO_IS = ddr2_data[7] |
---|
375 | PORT DDR2_DQ_8 = ddr2_2gb_dq_8, IO_IS = ddr2_data[8] |
---|
376 | PORT DDR2_DQ_9 = ddr2_2gb_dq_9, IO_IS = ddr2_data[9] |
---|
377 | PORT DDR2_DQ_10 = ddr2_2gb_dq_10, IO_IS = ddr2_data[10] |
---|
378 | PORT DDR2_DQ_11 = ddr2_2gb_dq_11, IO_IS = ddr2_data[11] |
---|
379 | PORT DDR2_DQ_12 = ddr2_2gb_dq_12, IO_IS = ddr2_data[12] |
---|
380 | PORT DDR2_DQ_13 = ddr2_2gb_dq_13, IO_IS = ddr2_data[13] |
---|
381 | PORT DDR2_DQ_14 = ddr2_2gb_dq_14, IO_IS = ddr2_data[14] |
---|
382 | PORT DDR2_DQ_15 = ddr2_2gb_dq_15, IO_IS = ddr2_data[15] |
---|
383 | PORT DDR2_DQ_16 = ddr2_2gb_dq_16, IO_IS = ddr2_data[16] |
---|
384 | PORT DDR2_DQ_17 = ddr2_2gb_dq_17, IO_IS = ddr2_data[17] |
---|
385 | PORT DDR2_DQ_18 = ddr2_2gb_dq_18, IO_IS = ddr2_data[18] |
---|
386 | PORT DDR2_DQ_19 = ddr2_2gb_dq_19, IO_IS = ddr2_data[19] |
---|
387 | PORT DDR2_DQ_20 = ddr2_2gb_dq_20, IO_IS = ddr2_data[20] |
---|
388 | PORT DDR2_DQ_21 = ddr2_2gb_dq_21, IO_IS = ddr2_data[21] |
---|
389 | PORT DDR2_DQ_22 = ddr2_2gb_dq_22, IO_IS = ddr2_data[22] |
---|
390 | PORT DDR2_DQ_23 = ddr2_2gb_dq_23, IO_IS = ddr2_data[23] |
---|
391 | PORT DDR2_DQ_24 = ddr2_2gb_dq_24, IO_IS = ddr2_data[24] |
---|
392 | PORT DDR2_DQ_25 = ddr2_2gb_dq_25, IO_IS = ddr2_data[25] |
---|
393 | PORT DDR2_DQ_26 = ddr2_2gb_dq_26, IO_IS = ddr2_data[26] |
---|
394 | PORT DDR2_DQ_27 = ddr2_2gb_dq_27, IO_IS = ddr2_data[27] |
---|
395 | PORT DDR2_DQ_28 = ddr2_2gb_dq_28, IO_IS = ddr2_data[28] |
---|
396 | PORT DDR2_DQ_29 = ddr2_2gb_dq_29, IO_IS = ddr2_data[29] |
---|
397 | PORT DDR2_DQ_30 = ddr2_2gb_dq_30, IO_IS = ddr2_data[30] |
---|
398 | PORT DDR2_DQ_31 = ddr2_2gb_dq_31, IO_IS = ddr2_data[31] |
---|
399 | PORT DDR2_DQ_32 = ddr2_2gb_dq_32, IO_IS = ddr2_data[32] |
---|
400 | PORT DDR2_DQ_33 = ddr2_2gb_dq_33, IO_IS = ddr2_data[33] |
---|
401 | PORT DDR2_DQ_34 = ddr2_2gb_dq_34, IO_IS = ddr2_data[34] |
---|
402 | PORT DDR2_DQ_35 = ddr2_2gb_dq_35, IO_IS = ddr2_data[35] |
---|
403 | PORT DDR2_DQ_36 = ddr2_2gb_dq_36, IO_IS = ddr2_data[36] |
---|
404 | PORT DDR2_DQ_37 = ddr2_2gb_dq_37, IO_IS = ddr2_data[37] |
---|
405 | PORT DDR2_DQ_38 = ddr2_2gb_dq_38, IO_IS = ddr2_data[38] |
---|
406 | PORT DDR2_DQ_39 = ddr2_2gb_dq_39, IO_IS = ddr2_data[39] |
---|
407 | PORT DDR2_DQ_40 = ddr2_2gb_dq_40, IO_IS = ddr2_data[40] |
---|
408 | PORT DDR2_DQ_41 = ddr2_2gb_dq_41, IO_IS = ddr2_data[41] |
---|
409 | PORT DDR2_DQ_42 = ddr2_2gb_dq_42, IO_IS = ddr2_data[42] |
---|
410 | PORT DDR2_DQ_43 = ddr2_2gb_dq_43, IO_IS = ddr2_data[43] |
---|
411 | PORT DDR2_DQ_44 = ddr2_2gb_dq_44, IO_IS = ddr2_data[44] |
---|
412 | PORT DDR2_DQ_45 = ddr2_2gb_dq_45, IO_IS = ddr2_data[45] |
---|
413 | PORT DDR2_DQ_46 = ddr2_2gb_dq_46, IO_IS = ddr2_data[46] |
---|
414 | PORT DDR2_DQ_47 = ddr2_2gb_dq_47, IO_IS = ddr2_data[47] |
---|
415 | PORT DDR2_DQ_48 = ddr2_2gb_dq_48, IO_IS = ddr2_data[48] |
---|
416 | PORT DDR2_DQ_49 = ddr2_2gb_dq_49, IO_IS = ddr2_data[49] |
---|
417 | PORT DDR2_DQ_50 = ddr2_2gb_dq_50, IO_IS = ddr2_data[50] |
---|
418 | PORT DDR2_DQ_51 = ddr2_2gb_dq_51, IO_IS = ddr2_data[51] |
---|
419 | PORT DDR2_DQ_52 = ddr2_2gb_dq_52, IO_IS = ddr2_data[52] |
---|
420 | PORT DDR2_DQ_53 = ddr2_2gb_dq_53, IO_IS = ddr2_data[53] |
---|
421 | PORT DDR2_DQ_54 = ddr2_2gb_dq_54, IO_IS = ddr2_data[54] |
---|
422 | PORT DDR2_DQ_55 = ddr2_2gb_dq_55, IO_IS = ddr2_data[55] |
---|
423 | PORT DDR2_DQ_56 = ddr2_2gb_dq_56, IO_IS = ddr2_data[56] |
---|
424 | PORT DDR2_DQ_57 = ddr2_2gb_dq_57, IO_IS = ddr2_data[57] |
---|
425 | PORT DDR2_DQ_58 = ddr2_2gb_dq_58, IO_IS = ddr2_data[58] |
---|
426 | PORT DDR2_DQ_59 = ddr2_2gb_dq_59, IO_IS = ddr2_data[59] |
---|
427 | PORT DDR2_DQ_60 = ddr2_2gb_dq_60, IO_IS = ddr2_data[60] |
---|
428 | PORT DDR2_DQ_61 = ddr2_2gb_dq_61, IO_IS = ddr2_data[61] |
---|
429 | PORT DDR2_DQ_62 = ddr2_2gb_dq_62, IO_IS = ddr2_data[62] |
---|
430 | PORT DDR2_DQ_63 = ddr2_2gb_dq_63, IO_IS = ddr2_data[63] |
---|
431 | # PORT DDR2_Sleep = net_gnd, IO_IS = ddr_sleep |
---|
432 | # PORT DDR2_WakeUp = net_gnd, IO_IS = ddr_wakeup |
---|
433 | # PORT DDR2_Init_done = net_gnd, IO_IS = ddr_init_done |
---|
434 | PORT DDR2_Clk_0 = ddr2_2gb_clk_0, IO_IS = ddr2_clk[0] |
---|
435 | PORT DDR2_Clk_1 = ddr2_2gb_clk_1, IO_IS = ddr2_clk[1] |
---|
436 | PORT DDR2_Clkn_0 = ddr2_2gb_clkn_0, IO_IS = ddr2_clk_n[0] |
---|
437 | PORT DDR2_Clkn_1 = ddr2_2gb_clkn_1, IO_IS = ddr2_clk_n[1] |
---|
438 | PORT DDR2_ODT_0 = ddr2_2gb_odt_0, IO_IS = ddr2_odt[0] |
---|
439 | PORT DDR2_ODT_1 = ddr2_2gb_odt_1, IO_IS = ddr2_odt[1] |
---|
440 | END |
---|
441 | |
---|
442 | |
---|
443 | # Radio Controller |
---|
444 | BEGIN IO_INTERFACE |
---|
445 | ATTRIBUTE IOTYPE = WARP_RADIOCONTROLLER_V1 |
---|
446 | ATTRIBUTE INSTANCE = radio_controller_0 |
---|
447 | ATTRIBUTE ALERT = 'This peripheral and at least one radio_bridge must be enabled to use the WARP radio interfaces.' |
---|
448 | |
---|
449 | #Common SPI clock and data outputs |
---|
450 | PORT controller_logic_clk = controller_logic_clk |
---|
451 | PORT spi_clk = controller_spi_clk |
---|
452 | PORT data_out = controller_spi_data |
---|
453 | |
---|
454 | #SPI radio chip selects |
---|
455 | PORT radio1_cs = controller_radio1_cs |
---|
456 | PORT radio2_cs = controller_radio2_cs |
---|
457 | PORT radio3_cs = controller_radio3_cs |
---|
458 | PORT radio4_cs = controller_radio4_cs |
---|
459 | |
---|
460 | #SPI DAC chip selects |
---|
461 | PORT dac1_cs = controller_dac1_cs |
---|
462 | PORT dac2_cs = controller_dac2_cs |
---|
463 | PORT dac3_cs = controller_dac3_cs |
---|
464 | PORT dac4_cs = controller_dac4_cs |
---|
465 | |
---|
466 | ####################### |
---|
467 | # Slot #1 Radio Ports # |
---|
468 | ####################### |
---|
469 | PORT radio1_SHDN = controller_radio1_SHDN |
---|
470 | PORT radio1_TxEn = controller_radio1_TxEn |
---|
471 | PORT radio1_RxEn = controller_radio1_RxEn |
---|
472 | PORT radio1_RxHP = controller_radio1_RxHP |
---|
473 | PORT radio1_LD = controller_radio1_LD |
---|
474 | PORT radio1_24PA = controller_radio1_24PA |
---|
475 | PORT radio1_5PA = controller_radio1_5PA |
---|
476 | PORT radio1_ANTSW0 = controller_radio1_ANTSW0, IO_IS = radio1_antsw[0] |
---|
477 | PORT radio1_ANTSW1 = controller_radio1_ANTSW1, IO_IS = radio1_antsw[1] |
---|
478 | PORT radio1_LED0 = controller_radio1_LED0, IO_IS = radio1_LED[0] |
---|
479 | PORT radio1_LED1 = controller_radio1_LED1, IO_IS = radio1_LED[1] |
---|
480 | PORT radio1_LED2 = controller_radio1_LED2, IO_IS = radio1_LED[2] |
---|
481 | PORT radio1_ADC_RX_DCS = controller_radio1_RX_ADC_DCS |
---|
482 | PORT radio1_ADC_RX_DFS = controller_radio1_RX_ADC_DFS |
---|
483 | PORT radio1_ADC_RX_OTRA = controller_radio1_RX_ADC_OTRA |
---|
484 | PORT radio1_ADC_RX_OTRB = controller_radio1_RX_ADC_OTRB |
---|
485 | PORT radio1_ADC_RX_PWDNA = controller_radio1_RX_ADC_PWDNA |
---|
486 | PORT radio1_ADC_RX_PWDNB = controller_radio1_RX_ADC_PWDNB |
---|
487 | PORT radio1_DIPSW0 = controller_radio1_DIPSW0, IO_IS = radio1_DIPSW[0] |
---|
488 | PORT radio1_DIPSW1 = controller_radio1_DIPSW1, IO_IS = radio1_DIPSW[1] |
---|
489 | PORT radio1_DIPSW2 = controller_radio1_DIPSW2, IO_IS = radio1_DIPSW[2] |
---|
490 | PORT radio1_DIPSW3 = controller_radio1_DIPSW3, IO_IS = radio1_DIPSW[3] |
---|
491 | PORT radio1_RSSI_ADC_CLAMP = controller_radio1_RSSI_ADC_CLAMP |
---|
492 | PORT radio1_RSSI_ADC_HIZ = controller_radio1_RSSI_ADC_HIZ |
---|
493 | PORT radio1_RSSI_ADC_OTR = controller_radio1_RSSI_ADC_OTR |
---|
494 | PORT radio1_RSSI_ADC_SLEEP = controller_radio1_RSSI_ADC_SLEEP |
---|
495 | PORT radio1_RSSI_ADC_D0 = controller_radio1_RSSI_ADC_D0, IO_IS = radio1_RSSI_ADC_D[0] |
---|
496 | PORT radio1_RSSI_ADC_D1 = controller_radio1_RSSI_ADC_D1, IO_IS = radio1_RSSI_ADC_D[1] |
---|
497 | PORT radio1_RSSI_ADC_D2 = controller_radio1_RSSI_ADC_D2, IO_IS = radio1_RSSI_ADC_D[2] |
---|
498 | PORT radio1_RSSI_ADC_D3 = controller_radio1_RSSI_ADC_D3, IO_IS = radio1_RSSI_ADC_D[3] |
---|
499 | PORT radio1_RSSI_ADC_D4 = controller_radio1_RSSI_ADC_D4, IO_IS = radio1_RSSI_ADC_D[4] |
---|
500 | PORT radio1_RSSI_ADC_D5 = controller_radio1_RSSI_ADC_D5, IO_IS = radio1_RSSI_ADC_D[5] |
---|
501 | PORT radio1_RSSI_ADC_D6 = controller_radio1_RSSI_ADC_D6, IO_IS = radio1_RSSI_ADC_D[6] |
---|
502 | PORT radio1_RSSI_ADC_D7 = controller_radio1_RSSI_ADC_D7, IO_IS = radio1_RSSI_ADC_D[7] |
---|
503 | PORT radio1_RSSI_ADC_D8 = controller_radio1_RSSI_ADC_D8, IO_IS = radio1_RSSI_ADC_D[8] |
---|
504 | PORT radio1_RSSI_ADC_D9 = controller_radio1_RSSI_ADC_D9, IO_IS = radio1_RSSI_ADC_D[9] |
---|
505 | PORT radio1_TX_DAC_PLL_LOCK = controller_DAC1_PLL_LOCK |
---|
506 | PORT radio1_TX_DAC_RESET = controller_DAC1_RESET |
---|
507 | PORT radio1_SHDN_external = controller_radio1_SHDN_external |
---|
508 | PORT radio1_TxEn_external = controller_radio1_TxEn_external |
---|
509 | PORT radio1_RxEn_external = controller_radio1_RxEn_external |
---|
510 | PORT radio1_RxHP_external = controller_radio1_RxHP_external |
---|
511 | PORT radio1_TxGain0 = controller_radio1_TxGain0, IO_IS = radio1_TxGain[0] |
---|
512 | PORT radio1_TxGain1 = controller_radio1_TxGain1, IO_IS = radio1_TxGain[1] |
---|
513 | PORT radio1_TxGain2 = controller_radio1_TxGain2, IO_IS = radio1_TxGain[2] |
---|
514 | PORT radio1_TxGain3 = controller_radio1_TxGain3, IO_IS = radio1_TxGain[3] |
---|
515 | PORT radio1_TxGain4 = controller_radio1_TxGain4, IO_IS = radio1_TxGain[4] |
---|
516 | PORT radio1_TxGain5 = controller_radio1_TxGain5, IO_IS = radio1_TxGain[5] |
---|
517 | PORT radio1_TxStart = controller_radio1_TxStart |
---|
518 | |
---|
519 | ####################### |
---|
520 | # Slot #2 Radio Ports # |
---|
521 | ####################### |
---|
522 | PORT radio2_SHDN = controller_radio2_SHDN |
---|
523 | PORT radio2_TxEn = controller_radio2_TxEn |
---|
524 | PORT radio2_RxEn = controller_radio2_RxEn |
---|
525 | PORT radio2_RxHP = controller_radio2_RxHP |
---|
526 | PORT radio2_LD = controller_radio2_LD |
---|
527 | PORT radio2_24PA = controller_radio2_24PA |
---|
528 | PORT radio2_5PA = controller_radio2_5PA |
---|
529 | PORT radio2_ANTSW0 = controller_radio2_ANTSW0, IO_IS = radio2_antsw[0] |
---|
530 | PORT radio2_ANTSW1 = controller_radio2_ANTSW1, IO_IS = radio2_antsw[1] |
---|
531 | PORT radio2_LED0 = controller_radio2_LED0, IO_IS = radio2_LED[0] |
---|
532 | PORT radio2_LED1 = controller_radio2_LED1, IO_IS = radio2_LED[1] |
---|
533 | PORT radio2_LED2 = controller_radio2_LED2, IO_IS = radio2_LED[2] |
---|
534 | PORT radio2_ADC_RX_DCS = controller_radio2_RX_ADC_DCS |
---|
535 | PORT radio2_ADC_RX_DFS = controller_radio2_RX_ADC_DFS |
---|
536 | PORT radio2_ADC_RX_OTRA = controller_radio2_RX_ADC_OTRA |
---|
537 | PORT radio2_ADC_RX_OTRB = controller_radio2_RX_ADC_OTRB |
---|
538 | PORT radio2_ADC_RX_PWDNA = controller_radio2_RX_ADC_PWDNA |
---|
539 | PORT radio2_ADC_RX_PWDNB = controller_radio2_RX_ADC_PWDNB |
---|
540 | PORT radio2_DIPSW0 = controller_radio2_DIPSW0, IO_IS = radio2_DIPSW[0] |
---|
541 | PORT radio2_DIPSW1 = controller_radio2_DIPSW1, IO_IS = radio2_DIPSW[1] |
---|
542 | PORT radio2_DIPSW2 = controller_radio2_DIPSW2, IO_IS = radio2_DIPSW[2] |
---|
543 | PORT radio2_DIPSW3 = controller_radio2_DIPSW3, IO_IS = radio2_DIPSW[3] |
---|
544 | PORT radio2_RSSI_ADC_CLAMP = controller_radio2_RSSI_ADC_CLAMP |
---|
545 | PORT radio2_RSSI_ADC_HIZ = controller_radio2_RSSI_ADC_HIZ |
---|
546 | PORT radio2_RSSI_ADC_OTR = controller_radio2_RSSI_ADC_OTR |
---|
547 | PORT radio2_RSSI_ADC_SLEEP = controller_radio2_RSSI_ADC_SLEEP |
---|
548 | PORT radio2_RSSI_ADC_D0 = controller_radio2_RSSI_ADC_D0, IO_IS = radio2_RSSI_ADC_D[0] |
---|
549 | PORT radio2_RSSI_ADC_D1 = controller_radio2_RSSI_ADC_D1, IO_IS = radio2_RSSI_ADC_D[1] |
---|
550 | PORT radio2_RSSI_ADC_D2 = controller_radio2_RSSI_ADC_D2, IO_IS = radio2_RSSI_ADC_D[2] |
---|
551 | PORT radio2_RSSI_ADC_D3 = controller_radio2_RSSI_ADC_D3, IO_IS = radio2_RSSI_ADC_D[3] |
---|
552 | PORT radio2_RSSI_ADC_D4 = controller_radio2_RSSI_ADC_D4, IO_IS = radio2_RSSI_ADC_D[4] |
---|
553 | PORT radio2_RSSI_ADC_D5 = controller_radio2_RSSI_ADC_D5, IO_IS = radio2_RSSI_ADC_D[5] |
---|
554 | PORT radio2_RSSI_ADC_D6 = controller_radio2_RSSI_ADC_D6, IO_IS = radio2_RSSI_ADC_D[6] |
---|
555 | PORT radio2_RSSI_ADC_D7 = controller_radio2_RSSI_ADC_D7, IO_IS = radio2_RSSI_ADC_D[7] |
---|
556 | PORT radio2_RSSI_ADC_D8 = controller_radio2_RSSI_ADC_D8, IO_IS = radio2_RSSI_ADC_D[8] |
---|
557 | PORT radio2_RSSI_ADC_D9 = controller_radio2_RSSI_ADC_D9, IO_IS = radio2_RSSI_ADC_D[9] |
---|
558 | PORT radio2_TX_DAC_PLL_LOCK = controller_DAC2_PLL_LOCK |
---|
559 | PORT radio2_TX_DAC_RESET = controller_DAC2_RESET |
---|
560 | PORT radio2_SHDN_external = controller_radio2_SHDN_external |
---|
561 | PORT radio2_TxEn_external = controller_radio2_TxEn_external |
---|
562 | PORT radio2_RxEn_external = controller_radio2_RxEn_external |
---|
563 | PORT radio2_RxHP_external = controller_radio2_RxHP_external |
---|
564 | PORT radio2_TxGain0 = controller_radio2_TxGain0, IO_IS = radio2_TxGain[0] |
---|
565 | PORT radio2_TxGain1 = controller_radio2_TxGain1, IO_IS = radio2_TxGain[1] |
---|
566 | PORT radio2_TxGain2 = controller_radio2_TxGain2, IO_IS = radio2_TxGain[2] |
---|
567 | PORT radio2_TxGain3 = controller_radio2_TxGain3, IO_IS = radio2_TxGain[3] |
---|
568 | PORT radio2_TxGain4 = controller_radio2_TxGain4, IO_IS = radio2_TxGain[4] |
---|
569 | PORT radio2_TxGain5 = controller_radio2_TxGain5, IO_IS = radio2_TxGain[5] |
---|
570 | PORT radio2_TxStart = controller_radio2_TxStart |
---|
571 | |
---|
572 | ####################### |
---|
573 | # Slot #3 Radio Ports # |
---|
574 | ####################### |
---|
575 | PORT radio3_SHDN = controller_radio3_SHDN |
---|
576 | PORT radio3_TxEn = controller_radio3_TxEn |
---|
577 | PORT radio3_RxEn = controller_radio3_RxEn |
---|
578 | PORT radio3_RxHP = controller_radio3_RxHP |
---|
579 | PORT radio3_LD = controller_radio3_LD |
---|
580 | PORT radio3_24PA = controller_radio3_24PA |
---|
581 | PORT radio3_5PA = controller_radio3_5PA |
---|
582 | PORT radio3_ANTSW0 = controller_radio3_ANTSW0, IO_IS = radio3_antsw[0] |
---|
583 | PORT radio3_ANTSW1 = controller_radio3_ANTSW1, IO_IS = radio3_antsw[1] |
---|
584 | PORT radio3_LED0 = controller_radio3_LED0, IO_IS = radio3_LED[0] |
---|
585 | PORT radio3_LED1 = controller_radio3_LED1, IO_IS = radio3_LED[1] |
---|
586 | PORT radio3_LED2 = controller_radio3_LED2, IO_IS = radio3_LED[2] |
---|
587 | PORT radio3_ADC_RX_DCS = controller_radio3_RX_ADC_DCS |
---|
588 | PORT radio3_ADC_RX_DFS = controller_radio3_RX_ADC_DFS |
---|
589 | PORT radio3_ADC_RX_OTRA = controller_radio3_RX_ADC_OTRA |
---|
590 | PORT radio3_ADC_RX_OTRB = controller_radio3_RX_ADC_OTRB |
---|
591 | PORT radio3_ADC_RX_PWDNA = controller_radio3_RX_ADC_PWDNA |
---|
592 | PORT radio3_ADC_RX_PWDNB = controller_radio3_RX_ADC_PWDNB |
---|
593 | PORT radio3_DIPSW0 = controller_radio3_DIPSW0, IO_IS = radio3_DIPSW[0] |
---|
594 | PORT radio3_DIPSW1 = controller_radio3_DIPSW1, IO_IS = radio3_DIPSW[1] |
---|
595 | PORT radio3_DIPSW2 = controller_radio3_DIPSW2, IO_IS = radio3_DIPSW[2] |
---|
596 | PORT radio3_DIPSW3 = controller_radio3_DIPSW3, IO_IS = radio3_DIPSW[3] |
---|
597 | PORT radio3_RSSI_ADC_CLAMP = controller_radio3_RSSI_ADC_CLAMP |
---|
598 | PORT radio3_RSSI_ADC_HIZ = controller_radio3_RSSI_ADC_HIZ |
---|
599 | PORT radio3_RSSI_ADC_OTR = controller_radio3_RSSI_ADC_OTR |
---|
600 | PORT radio3_RSSI_ADC_SLEEP = controller_radio3_RSSI_ADC_SLEEP |
---|
601 | PORT radio3_RSSI_ADC_D0 = controller_radio3_RSSI_ADC_D0, IO_IS = radio3_RSSI_ADC_D[0] |
---|
602 | PORT radio3_RSSI_ADC_D1 = controller_radio3_RSSI_ADC_D1, IO_IS = radio3_RSSI_ADC_D[1] |
---|
603 | PORT radio3_RSSI_ADC_D2 = controller_radio3_RSSI_ADC_D2, IO_IS = radio3_RSSI_ADC_D[2] |
---|
604 | PORT radio3_RSSI_ADC_D3 = controller_radio3_RSSI_ADC_D3, IO_IS = radio3_RSSI_ADC_D[3] |
---|
605 | PORT radio3_RSSI_ADC_D4 = controller_radio3_RSSI_ADC_D4, IO_IS = radio3_RSSI_ADC_D[4] |
---|
606 | PORT radio3_RSSI_ADC_D5 = controller_radio3_RSSI_ADC_D5, IO_IS = radio3_RSSI_ADC_D[5] |
---|
607 | PORT radio3_RSSI_ADC_D6 = controller_radio3_RSSI_ADC_D6, IO_IS = radio3_RSSI_ADC_D[6] |
---|
608 | PORT radio3_RSSI_ADC_D7 = controller_radio3_RSSI_ADC_D7, IO_IS = radio3_RSSI_ADC_D[7] |
---|
609 | PORT radio3_RSSI_ADC_D8 = controller_radio3_RSSI_ADC_D8, IO_IS = radio3_RSSI_ADC_D[8] |
---|
610 | PORT radio3_RSSI_ADC_D9 = controller_radio3_RSSI_ADC_D9, IO_IS = radio3_RSSI_ADC_D[9] |
---|
611 | PORT radio3_TX_DAC_PLL_LOCK = controller_DAC3_PLL_LOCK |
---|
612 | PORT radio3_TX_DAC_RESET = controller_DAC3_RESET |
---|
613 | PORT radio3_SHDN_external = controller_radio3_SHDN_external |
---|
614 | PORT radio3_TxEn_external = controller_radio3_TxEn_external |
---|
615 | PORT radio3_RxEn_external = controller_radio3_RxEn_external |
---|
616 | PORT radio3_RxHP_external = controller_radio3_RxHP_external |
---|
617 | PORT radio3_TxGain0 = controller_radio3_TxGain0, IO_IS = radio3_TxGain[0] |
---|
618 | PORT radio3_TxGain1 = controller_radio3_TxGain1, IO_IS = radio3_TxGain[1] |
---|
619 | PORT radio3_TxGain2 = controller_radio3_TxGain2, IO_IS = radio3_TxGain[2] |
---|
620 | PORT radio3_TxGain3 = controller_radio3_TxGain3, IO_IS = radio3_TxGain[3] |
---|
621 | PORT radio3_TxGain4 = controller_radio3_TxGain4, IO_IS = radio3_TxGain[4] |
---|
622 | PORT radio3_TxGain5 = controller_radio3_TxGain5, IO_IS = radio3_TxGain[5] |
---|
623 | PORT radio3_TxStart = controller_radio3_TxStart |
---|
624 | |
---|
625 | ####################### |
---|
626 | # Slot #4 Radio Ports # |
---|
627 | ####################### |
---|
628 | PORT radio4_SHDN = controller_radio4_SHDN |
---|
629 | PORT radio4_TxEn = controller_radio4_TxEn |
---|
630 | PORT radio4_RxEn = controller_radio4_RxEn |
---|
631 | PORT radio4_RxHP = controller_radio4_RxHP |
---|
632 | PORT radio4_LD = controller_radio4_LD |
---|
633 | PORT radio4_24PA = controller_radio4_24PA |
---|
634 | PORT radio4_5PA = controller_radio4_5PA |
---|
635 | PORT radio4_ANTSW0 = controller_radio4_ANTSW0, IO_IS = radio4_antsw[0] |
---|
636 | PORT radio4_ANTSW1 = controller_radio4_ANTSW1, IO_IS = radio4_antsw[1] |
---|
637 | PORT radio4_LED0 = controller_radio4_LED0, IO_IS = radio4_LED[0] |
---|
638 | PORT radio4_LED1 = controller_radio4_LED1, IO_IS = radio4_LED[1] |
---|
639 | PORT radio4_LED2 = controller_radio4_LED2, IO_IS = radio4_LED[2] |
---|
640 | PORT radio4_ADC_RX_DCS = controller_radio4_RX_ADC_DCS |
---|
641 | PORT radio4_ADC_RX_DFS = controller_radio4_RX_ADC_DFS |
---|
642 | PORT radio4_ADC_RX_OTRA = controller_radio4_RX_ADC_OTRA |
---|
643 | PORT radio4_ADC_RX_OTRB = controller_radio4_RX_ADC_OTRB |
---|
644 | PORT radio4_ADC_RX_PWDNA = controller_radio4_RX_ADC_PWDNA |
---|
645 | PORT radio4_ADC_RX_PWDNB = controller_radio4_RX_ADC_PWDNB |
---|
646 | PORT radio4_DIPSW0 = controller_radio4_DIPSW0, IO_IS = radio4_DIPSW[0] |
---|
647 | PORT radio4_DIPSW1 = controller_radio4_DIPSW1, IO_IS = radio4_DIPSW[1] |
---|
648 | PORT radio4_DIPSW2 = controller_radio4_DIPSW2, IO_IS = radio4_DIPSW[2] |
---|
649 | PORT radio4_DIPSW3 = controller_radio4_DIPSW3, IO_IS = radio4_DIPSW[3] |
---|
650 | PORT radio4_RSSI_ADC_CLAMP = controller_radio4_RSSI_ADC_CLAMP |
---|
651 | PORT radio4_RSSI_ADC_HIZ = controller_radio4_RSSI_ADC_HIZ |
---|
652 | PORT radio4_RSSI_ADC_OTR = controller_radio4_RSSI_ADC_OTR |
---|
653 | PORT radio4_RSSI_ADC_SLEEP = controller_radio4_RSSI_ADC_SLEEP |
---|
654 | PORT radio4_RSSI_ADC_D0 = controller_radio4_RSSI_ADC_D0, IO_IS = radio4_RSSI_ADC_D[0] |
---|
655 | PORT radio4_RSSI_ADC_D1 = controller_radio4_RSSI_ADC_D1, IO_IS = radio4_RSSI_ADC_D[1] |
---|
656 | PORT radio4_RSSI_ADC_D2 = controller_radio4_RSSI_ADC_D2, IO_IS = radio4_RSSI_ADC_D[2] |
---|
657 | PORT radio4_RSSI_ADC_D3 = controller_radio4_RSSI_ADC_D3, IO_IS = radio4_RSSI_ADC_D[3] |
---|
658 | PORT radio4_RSSI_ADC_D4 = controller_radio4_RSSI_ADC_D4, IO_IS = radio4_RSSI_ADC_D[4] |
---|
659 | PORT radio4_RSSI_ADC_D5 = controller_radio4_RSSI_ADC_D5, IO_IS = radio4_RSSI_ADC_D[5] |
---|
660 | PORT radio4_RSSI_ADC_D6 = controller_radio4_RSSI_ADC_D6, IO_IS = radio4_RSSI_ADC_D[6] |
---|
661 | PORT radio4_RSSI_ADC_D7 = controller_radio4_RSSI_ADC_D7, IO_IS = radio4_RSSI_ADC_D[7] |
---|
662 | PORT radio4_RSSI_ADC_D8 = controller_radio4_RSSI_ADC_D8, IO_IS = radio4_RSSI_ADC_D[8] |
---|
663 | PORT radio4_RSSI_ADC_D9 = controller_radio4_RSSI_ADC_D9, IO_IS = radio4_RSSI_ADC_D[9] |
---|
664 | PORT radio4_TX_DAC_PLL_LOCK = controller_DAC4_PLL_LOCK |
---|
665 | PORT radio4_TX_DAC_RESET = controller_DAC4_RESET |
---|
666 | PORT radio4_SHDN_external = controller_radio4_SHDN_external |
---|
667 | PORT radio4_TxEn_external = controller_radio4_TxEn_external |
---|
668 | PORT radio4_RxEn_external = controller_radio4_RxEn_external |
---|
669 | PORT radio4_RxHP_external = controller_radio4_RxHP_external |
---|
670 | PORT radio4_TxGain0 = controller_radio4_TxGain0, IO_IS = radio4_TxGain[0] |
---|
671 | PORT radio4_TxGain1 = controller_radio4_TxGain1, IO_IS = radio4_TxGain[1] |
---|
672 | PORT radio4_TxGain2 = controller_radio4_TxGain2, IO_IS = radio4_TxGain[2] |
---|
673 | PORT radio4_TxGain3 = controller_radio4_TxGain3, IO_IS = radio4_TxGain[3] |
---|
674 | PORT radio4_TxGain4 = controller_radio4_TxGain4, IO_IS = radio4_TxGain[4] |
---|
675 | PORT radio4_TxGain5 = controller_radio4_TxGain5, IO_IS = radio4_TxGain[5] |
---|
676 | PORT radio4_TxStart = controller_radio4_TxStart |
---|
677 | END |
---|
678 | |
---|
679 | #Radio Controller -> Radio Board Bridge for Slot #1 |
---|
680 | BEGIN IO_INTERFACE |
---|
681 | ATTRIBUTE IOTYPE = WARP_RADIOBRIDGE_V1 |
---|
682 | ATTRIBUTE INSTANCE = radio_bridge_slot_1 |
---|
683 | ATTRIBUTE EXCLUSIVE = slot1 |
---|
684 | ATTRIBUTE ALERT = 'Enable this peripheral only if a radio board is mounted in daughtercard slot 1.' |
---|
685 | |
---|
686 | PORT converter_clock_out = radio1_conv_clk_p |
---|
687 | |
---|
688 | PORT radio_b0 = radio1_b0, IO_IS = radioGain[0] |
---|
689 | PORT radio_b1 = radio1_b1, IO_IS = radioGain[1] |
---|
690 | PORT radio_b2 = radio1_b2, IO_IS = radioGain[2] |
---|
691 | PORT radio_b3 = radio1_b3, IO_IS = radioGain[3] |
---|
692 | PORT radio_b4 = radio1_b4, IO_IS = radioGain[4] |
---|
693 | PORT radio_b5 = radio1_b5, IO_IS = radioGain[5] |
---|
694 | PORT radio_b6 = radio1_b6, IO_IS = radioGain[6] |
---|
695 | |
---|
696 | PORT radio_ADC_I0 = radio1_ADC_I0, IO_IS = radioADCI[0] |
---|
697 | PORT radio_ADC_I1 = radio1_ADC_I1, IO_IS = radioADCI[1] |
---|
698 | PORT radio_ADC_I2 = radio1_ADC_I2, IO_IS = radioADCI[2] |
---|
699 | PORT radio_ADC_I3 = radio1_ADC_I3, IO_IS = radioADCI[3] |
---|
700 | PORT radio_ADC_I4 = radio1_ADC_I4, IO_IS = radioADCI[4] |
---|
701 | PORT radio_ADC_I5 = radio1_ADC_I5, IO_IS = radioADCI[5] |
---|
702 | PORT radio_ADC_I6 = radio1_ADC_I6, IO_IS = radioADCI[6] |
---|
703 | PORT radio_ADC_I7 = radio1_ADC_I7, IO_IS = radioADCI[7] |
---|
704 | PORT radio_ADC_I8 = radio1_ADC_I8, IO_IS = radioADCI[8] |
---|
705 | PORT radio_ADC_I9 = radio1_ADC_I9, IO_IS = radioADCI[9] |
---|
706 | PORT radio_ADC_I10 = radio1_ADC_I10, IO_IS = radioADCI[10] |
---|
707 | PORT radio_ADC_I11 = radio1_ADC_I11, IO_IS = radioADCI[11] |
---|
708 | PORT radio_ADC_I12 = radio1_ADC_I12, IO_IS = radioADCI[12] |
---|
709 | PORT radio_ADC_I13 = radio1_ADC_I13, IO_IS = radioADCI[13] |
---|
710 | |
---|
711 | PORT radio_ADC_Q0 = radio1_ADC_Q0, IO_IS = radioADCQ[0] |
---|
712 | PORT radio_ADC_Q1 = radio1_ADC_Q1, IO_IS = radioADCQ[1] |
---|
713 | PORT radio_ADC_Q2 = radio1_ADC_Q2, IO_IS = radioADCQ[2] |
---|
714 | PORT radio_ADC_Q3 = radio1_ADC_Q3, IO_IS = radioADCQ[3] |
---|
715 | PORT radio_ADC_Q4 = radio1_ADC_Q4, IO_IS = radioADCQ[4] |
---|
716 | PORT radio_ADC_Q5 = radio1_ADC_Q5, IO_IS = radioADCQ[5] |
---|
717 | PORT radio_ADC_Q6 = radio1_ADC_Q6, IO_IS = radioADCQ[6] |
---|
718 | PORT radio_ADC_Q7 = radio1_ADC_Q7, IO_IS = radioADCQ[7] |
---|
719 | PORT radio_ADC_Q8 = radio1_ADC_Q8, IO_IS = radioADCQ[8] |
---|
720 | PORT radio_ADC_Q9 = radio1_ADC_Q9, IO_IS = radioADCQ[9] |
---|
721 | PORT radio_ADC_Q10 = radio1_ADC_Q10, IO_IS = radioADCQ[10] |
---|
722 | PORT radio_ADC_Q11 = radio1_ADC_Q11, IO_IS = radioADCQ[11] |
---|
723 | PORT radio_ADC_Q12 = radio1_ADC_Q12, IO_IS = radioADCQ[12] |
---|
724 | PORT radio_ADC_Q13 = radio1_ADC_Q13, IO_IS = radioADCQ[13] |
---|
725 | |
---|
726 | PORT radio_DAC_I0 = radio1_DAC_I0, IO_IS = radioDACI[0] |
---|
727 | PORT radio_DAC_I1 = radio1_DAC_I1, IO_IS = radioDACI[1] |
---|
728 | PORT radio_DAC_I2 = radio1_DAC_I2, IO_IS = radioDACI[2] |
---|
729 | PORT radio_DAC_I3 = radio1_DAC_I3, IO_IS = radioDACI[3] |
---|
730 | PORT radio_DAC_I4 = radio1_DAC_I4, IO_IS = radioDACI[4] |
---|
731 | PORT radio_DAC_I5 = radio1_DAC_I5, IO_IS = radioDACI[5] |
---|
732 | PORT radio_DAC_I6 = radio1_DAC_I6, IO_IS = radioDACI[6] |
---|
733 | PORT radio_DAC_I7 = radio1_DAC_I7, IO_IS = radioDACI[7] |
---|
734 | PORT radio_DAC_I8 = radio1_DAC_I8, IO_IS = radioDACI[8] |
---|
735 | PORT radio_DAC_I9 = radio1_DAC_I9, IO_IS = radioDACI[9] |
---|
736 | PORT radio_DAC_I10 = radio1_DAC_I10, IO_IS = radioDACI[10] |
---|
737 | PORT radio_DAC_I11 = radio1_DAC_I11, IO_IS = radioDACI[11] |
---|
738 | PORT radio_DAC_I12 = radio1_DAC_I12, IO_IS = radioDACI[12] |
---|
739 | PORT radio_DAC_I13 = radio1_DAC_I13, IO_IS = radioDACI[13] |
---|
740 | PORT radio_DAC_I14 = radio1_DAC_I14, IO_IS = radioDACI[14] |
---|
741 | PORT radio_DAC_I15 = radio1_DAC_I15, IO_IS = radioDACI[15] |
---|
742 | |
---|
743 | PORT radio_DAC_Q0 = radio1_DAC_Q0, IO_IS = radioDACQ[0] |
---|
744 | PORT radio_DAC_Q1 = radio1_DAC_Q1, IO_IS = radioDACQ[1] |
---|
745 | PORT radio_DAC_Q2 = radio1_DAC_Q2, IO_IS = radioDACQ[2] |
---|
746 | PORT radio_DAC_Q3 = radio1_DAC_Q3, IO_IS = radioDACQ[3] |
---|
747 | PORT radio_DAC_Q4 = radio1_DAC_Q4, IO_IS = radioDACQ[4] |
---|
748 | PORT radio_DAC_Q5 = radio1_DAC_Q5, IO_IS = radioDACQ[5] |
---|
749 | PORT radio_DAC_Q6 = radio1_DAC_Q6, IO_IS = radioDACQ[6] |
---|
750 | PORT radio_DAC_Q7 = radio1_DAC_Q7, IO_IS = radioDACQ[7] |
---|
751 | PORT radio_DAC_Q8 = radio1_DAC_Q8, IO_IS = radioDACQ[8] |
---|
752 | PORT radio_DAC_Q9 = radio1_DAC_Q9, IO_IS = radioDACQ[9] |
---|
753 | PORT radio_DAC_Q10 = radio1_DAC_Q10, IO_IS = radioDACQ[10] |
---|
754 | PORT radio_DAC_Q11 = radio1_DAC_Q11, IO_IS = radioDACQ[11] |
---|
755 | PORT radio_DAC_Q12 = radio1_DAC_Q12, IO_IS = radioDACQ[12] |
---|
756 | PORT radio_DAC_Q13 = radio1_DAC_Q13, IO_IS = radioDACQ[13] |
---|
757 | PORT radio_DAC_Q14 = radio1_DAC_Q14, IO_IS = radioDACQ[14] |
---|
758 | PORT radio_DAC_Q15 = radio1_DAC_Q15, IO_IS = radioDACQ[15] |
---|
759 | |
---|
760 | ########################################## |
---|
761 | #Radio Controller <-> Radio Bridge Ports # |
---|
762 | ########################################## |
---|
763 | PORT controller_logic_clk = controller_logic_clk |
---|
764 | PORT controller_spi_clk = controller_spi_clk |
---|
765 | PORT controller_spi_data = controller_spi_data |
---|
766 | PORT controller_radio_cs = controller_radio1_cs |
---|
767 | PORT controller_dac_cs = controller_dac1_cs |
---|
768 | PORT controller_SHDN = controller_radio1_SHDN |
---|
769 | PORT controller_TxEn = controller_radio1_TxEn |
---|
770 | PORT controller_RxEn = controller_radio1_RxEn |
---|
771 | PORT controller_RxHP = controller_radio1_RxHP |
---|
772 | PORT controller_24PA = controller_radio1_24PA |
---|
773 | PORT controller_5PA = controller_radio1_5PA |
---|
774 | PORT controller_ANTSW0 = controller_radio1_ANTSW0, IO_IS = c2b_ANTSW[0] |
---|
775 | PORT controller_ANTSW1 = controller_radio1_ANTSW1, IO_IS = c2b_ANTSW[1] |
---|
776 | PORT controller_LED0 = controller_radio1_LED0, IO_IS = c2b_LED[0] |
---|
777 | PORT controller_LED1 = controller_radio1_LED1, IO_IS = c2b_LED[1] |
---|
778 | PORT controller_LED2 = controller_radio1_LED2, IO_IS = c2b_LED[2] |
---|
779 | PORT controller_RX_ADC_DCS = controller_radio1_RX_ADC_DCS |
---|
780 | PORT controller_RX_ADC_DFS = controller_radio1_RX_ADC_DFS |
---|
781 | PORT controller_RX_ADC_PWDNA = controller_radio1_RX_ADC_PWDNA |
---|
782 | PORT controller_RX_ADC_PWDNB = controller_radio1_RX_ADC_PWDNB |
---|
783 | PORT controller_DIPSW0 = controller_radio1_DIPSW0, IO_IS = c2b_DIPSW[0] |
---|
784 | PORT controller_DIPSW1 = controller_radio1_DIPSW1, IO_IS = c2b_DIPSW[1] |
---|
785 | PORT controller_DIPSW2 = controller_radio1_DIPSW2, IO_IS = c2b_DIPSW[2] |
---|
786 | PORT controller_DIPSW3 = controller_radio1_DIPSW3, IO_IS = c2b_DIPSW[3] |
---|
787 | PORT controller_RSSI_ADC_CLAMP = controller_radio1_RSSI_ADC_CLAMP |
---|
788 | PORT controller_RSSI_ADC_HIZ = controller_radio1_RSSI_ADC_HIZ |
---|
789 | PORT controller_RSSI_ADC_SLEEP = controller_radio1_RSSI_ADC_SLEEP |
---|
790 | PORT controller_RSSI_ADC_D0 = controller_radio1_RSSI_ADC_D0, IO_IS = c2b_RSSI_ADC_D[0] |
---|
791 | PORT controller_RSSI_ADC_D1 = controller_radio1_RSSI_ADC_D1, IO_IS = c2b_RSSI_ADC_D[1] |
---|
792 | PORT controller_RSSI_ADC_D2 = controller_radio1_RSSI_ADC_D2, IO_IS = c2b_RSSI_ADC_D[2] |
---|
793 | PORT controller_RSSI_ADC_D3 = controller_radio1_RSSI_ADC_D3, IO_IS = c2b_RSSI_ADC_D[3] |
---|
794 | PORT controller_RSSI_ADC_D4 = controller_radio1_RSSI_ADC_D4, IO_IS = c2b_RSSI_ADC_D[4] |
---|
795 | PORT controller_RSSI_ADC_D5 = controller_radio1_RSSI_ADC_D5, IO_IS = c2b_RSSI_ADC_D[5] |
---|
796 | PORT controller_RSSI_ADC_D6 = controller_radio1_RSSI_ADC_D6, IO_IS = c2b_RSSI_ADC_D[6] |
---|
797 | PORT controller_RSSI_ADC_D7 = controller_radio1_RSSI_ADC_D7, IO_IS = c2b_RSSI_ADC_D[7] |
---|
798 | PORT controller_RSSI_ADC_D8 = controller_radio1_RSSI_ADC_D8, IO_IS = c2b_RSSI_ADC_D[8] |
---|
799 | PORT controller_RSSI_ADC_D9 = controller_radio1_RSSI_ADC_D9, IO_IS = c2b_RSSI_ADC_D[9] |
---|
800 | PORT controller_LD = controller_radio1_LD |
---|
801 | PORT controller_RX_ADC_OTRA = controller_radio1_RX_ADC_OTRA |
---|
802 | PORT controller_RX_ADC_OTRB = controller_radio1_RX_ADC_OTRB |
---|
803 | PORT controller_RSSI_ADC_OTR = controller_radio1_RSSI_ADC_OTR |
---|
804 | PORT controller_dac_PLL_LOCK = controller_dac1_PLL_LOCK |
---|
805 | PORT controller_dac_RESET = controller_dac1_RESET |
---|
806 | PORT user_Tx_gain0 = controller_radio1_TxGain0, IO_IS = userTxG[0] |
---|
807 | PORT user_Tx_gain1 = controller_radio1_TxGain1, IO_IS = userTxG[1] |
---|
808 | PORT user_Tx_gain2 = controller_radio1_TxGain2, IO_IS = userTxG[2] |
---|
809 | PORT user_Tx_gain3 = controller_radio1_TxGain3, IO_IS = userTxG[3] |
---|
810 | PORT user_Tx_gain4 = controller_radio1_TxGain4, IO_IS = userTxG[4] |
---|
811 | PORT user_Tx_gain5 = controller_radio1_TxGain5, IO_IS = userTxG[5] |
---|
812 | PORT controller_TxStart = controller_radio1_TxStart |
---|
813 | PORT controller_SHDN_external = controller_radio1_SHDN_external |
---|
814 | PORT controller_RxEn_external = controller_radio1_RxEn_external |
---|
815 | PORT controller_TxEn_external = controller_radio1_TxEn_external |
---|
816 | PORT controller_RxHP_external = controller_radio1_RxHP_external |
---|
817 | |
---|
818 | |
---|
819 | ##################################### |
---|
820 | #Radio Bridge <-> Radio Board Ports # |
---|
821 | ##################################### |
---|
822 | PORT dac_spi_data = dac1_spi_data |
---|
823 | PORT dac_spi_cs = dac1_spi_cs |
---|
824 | PORT dac_spi_clk = dac1_spi_clk |
---|
825 | PORT radio_spi_clk = radio1_spi_clk |
---|
826 | PORT radio_spi_data = radio1_spi_data |
---|
827 | PORT radio_spi_cs = radio1_spi_cs |
---|
828 | PORT radio_SHDN = radio1_SHDN |
---|
829 | PORT radio_TxEn = radio1_TxEn |
---|
830 | PORT radio_RxEn = radio1_RxEn |
---|
831 | PORT radio_RxHP = radio1_RxHP |
---|
832 | PORT radio_24PA = radio1_24PA |
---|
833 | PORT radio_5PA = radio1_5PA |
---|
834 | PORT radio_ANTSW0 = radio1_ANTSW0, IO_IS = b2r_ANTSW[0] |
---|
835 | PORT radio_ANTSW1 = radio1_ANTSW1, IO_IS = b2r_ANTSW[1] |
---|
836 | PORT radio_LED0 = radio1_LED0, IO_IS = b2r_LED[0] |
---|
837 | PORT radio_LED1 = radio1_LED1, IO_IS = b2r_LED[1] |
---|
838 | PORT radio_LED2 = radio1_LED2, IO_IS = b2r_LED[2] |
---|
839 | PORT radio_RX_ADC_DCS = radio1_RX_ADC_DCS |
---|
840 | PORT radio_RX_ADC_DFS = radio1_RX_ADC_DFS |
---|
841 | PORT radio_RX_ADC_PWDNA = radio1_RX_ADC_PWDNA |
---|
842 | PORT radio_RX_ADC_PWDNB = radio1_RX_ADC_PWDNB |
---|
843 | PORT radio_DIPSW0 = radio1_DIPSW0, IO_IS = b2r_DIPSW[0] |
---|
844 | PORT radio_DIPSW1 = radio1_DIPSW1, IO_IS = b2r_DIPSW[1] |
---|
845 | PORT radio_DIPSW2 = radio1_DIPSW2, IO_IS = b2r_DIPSW[2] |
---|
846 | PORT radio_DIPSW3 = radio1_DIPSW3, IO_IS = b2r_DIPSW[3] |
---|
847 | PORT radio_RSSI_ADC_clk = radio1_RSSI_ADC_clk |
---|
848 | PORT radio_RSSI_ADC_CLAMP = radio1_RSSI_ADC_CLAMP |
---|
849 | PORT radio_RSSI_ADC_HIZ = radio1_RSSI_ADC_HIZ |
---|
850 | PORT radio_RSSI_ADC_SLEEP = radio1_RSSI_ADC_SLEEP |
---|
851 | PORT radio_RSSI_ADC_D0 = radio1_RSSI_ADC_D0, IO_IS = b2r_RSSI_ADC_D[0] |
---|
852 | PORT radio_RSSI_ADC_D1 = radio1_RSSI_ADC_D1, IO_IS = b2r_RSSI_ADC_D[1] |
---|
853 | PORT radio_RSSI_ADC_D2 = radio1_RSSI_ADC_D2, IO_IS = b2r_RSSI_ADC_D[2] |
---|
854 | PORT radio_RSSI_ADC_D3 = radio1_RSSI_ADC_D3, IO_IS = b2r_RSSI_ADC_D[3] |
---|
855 | PORT radio_RSSI_ADC_D4 = radio1_RSSI_ADC_D4, IO_IS = b2r_RSSI_ADC_D[4] |
---|
856 | PORT radio_RSSI_ADC_D5 = radio1_RSSI_ADC_D5, IO_IS = b2r_RSSI_ADC_D[5] |
---|
857 | PORT radio_RSSI_ADC_D6 = radio1_RSSI_ADC_D6, IO_IS = b2r_RSSI_ADC_D[6] |
---|
858 | PORT radio_RSSI_ADC_D7 = radio1_RSSI_ADC_D7, IO_IS = b2r_RSSI_ADC_D[7] |
---|
859 | PORT radio_RSSI_ADC_D8 = radio1_RSSI_ADC_D8, IO_IS = b2r_RSSI_ADC_D[8] |
---|
860 | PORT radio_RSSI_ADC_D9 = radio1_RSSI_ADC_D9, IO_IS = b2r_RSSI_ADC_D[9] |
---|
861 | PORT radio_LD = radio1_LD |
---|
862 | PORT radio_RX_ADC_OTRA = radio1_RX_ADC_OTRA |
---|
863 | PORT radio_RX_ADC_OTRB = radio1_RX_ADC_OTRB |
---|
864 | PORT radio_RSSI_ADC_OTR = radio1_RSSI_ADC_OTR |
---|
865 | PORT radio_dac_PLL_LOCK = radio1_dac1_PLL_LOCK |
---|
866 | PORT radio_dac_RESET = radio1_dac1_RESET |
---|
867 | |
---|
868 | PORT user_EEPROM_IO_T = DQ1_T_user_EEPROM_IO_T |
---|
869 | PORT user_EEPROM_IO_O = DQ1_O_user_EEPROM_IO_O |
---|
870 | PORT user_EEPROM_IO_I = DQ1_I_user_EEPROM_IO_I |
---|
871 | PORT radio_EEPROM_IO = radio1_EEPROM_IO |
---|
872 | END |
---|
873 | |
---|
874 | #Radio Controller -> Radio Board Bridge for Slot #2 |
---|
875 | BEGIN IO_INTERFACE |
---|
876 | ATTRIBUTE IOTYPE = WARP_RADIOBRIDGE_V1 |
---|
877 | ATTRIBUTE INSTANCE = radio_bridge_slot_2 |
---|
878 | ATTRIBUTE EXCLUSIVE = slot2 |
---|
879 | ATTRIBUTE ALERT = 'Enable this peripheral only if a radio board is mounted in daughtercard slot 2.' |
---|
880 | |
---|
881 | PORT converter_clock_out = radio2_conv_clk_p |
---|
882 | |
---|
883 | PORT radio_b0 = radio2_b0, IO_IS = radioGain[0] |
---|
884 | PORT radio_b1 = radio2_b1, IO_IS = radioGain[1] |
---|
885 | PORT radio_b2 = radio2_b2, IO_IS = radioGain[2] |
---|
886 | PORT radio_b3 = radio2_b3, IO_IS = radioGain[3] |
---|
887 | PORT radio_b4 = radio2_b4, IO_IS = radioGain[4] |
---|
888 | PORT radio_b5 = radio2_b5, IO_IS = radioGain[5] |
---|
889 | PORT radio_b6 = radio2_b6, IO_IS = radioGain[6] |
---|
890 | |
---|
891 | PORT radio_ADC_I0 = radio2_ADC_I0, IO_IS = radioADCI[0] |
---|
892 | PORT radio_ADC_I1 = radio2_ADC_I1, IO_IS = radioADCI[1] |
---|
893 | PORT radio_ADC_I2 = radio2_ADC_I2, IO_IS = radioADCI[2] |
---|
894 | PORT radio_ADC_I3 = radio2_ADC_I3, IO_IS = radioADCI[3] |
---|
895 | PORT radio_ADC_I4 = radio2_ADC_I4, IO_IS = radioADCI[4] |
---|
896 | PORT radio_ADC_I5 = radio2_ADC_I5, IO_IS = radioADCI[5] |
---|
897 | PORT radio_ADC_I6 = radio2_ADC_I6, IO_IS = radioADCI[6] |
---|
898 | PORT radio_ADC_I7 = radio2_ADC_I7, IO_IS = radioADCI[7] |
---|
899 | PORT radio_ADC_I8 = radio2_ADC_I8, IO_IS = radioADCI[8] |
---|
900 | PORT radio_ADC_I9 = radio2_ADC_I9, IO_IS = radioADCI[9] |
---|
901 | PORT radio_ADC_I10 = radio2_ADC_I10, IO_IS = radioADCI[10] |
---|
902 | PORT radio_ADC_I11 = radio2_ADC_I11, IO_IS = radioADCI[11] |
---|
903 | PORT radio_ADC_I12 = radio2_ADC_I12, IO_IS = radioADCI[12] |
---|
904 | PORT radio_ADC_I13 = radio2_ADC_I13, IO_IS = radioADCI[13] |
---|
905 | |
---|
906 | PORT radio_ADC_Q0 = radio2_ADC_Q0, IO_IS = radioADCQ[0] |
---|
907 | PORT radio_ADC_Q1 = radio2_ADC_Q1, IO_IS = radioADCQ[1] |
---|
908 | PORT radio_ADC_Q2 = radio2_ADC_Q2, IO_IS = radioADCQ[2] |
---|
909 | PORT radio_ADC_Q3 = radio2_ADC_Q3, IO_IS = radioADCQ[3] |
---|
910 | PORT radio_ADC_Q4 = radio2_ADC_Q4, IO_IS = radioADCQ[4] |
---|
911 | PORT radio_ADC_Q5 = radio2_ADC_Q5, IO_IS = radioADCQ[5] |
---|
912 | PORT radio_ADC_Q6 = radio2_ADC_Q6, IO_IS = radioADCQ[6] |
---|
913 | PORT radio_ADC_Q7 = radio2_ADC_Q7, IO_IS = radioADCQ[7] |
---|
914 | PORT radio_ADC_Q8 = radio2_ADC_Q8, IO_IS = radioADCQ[8] |
---|
915 | PORT radio_ADC_Q9 = radio2_ADC_Q9, IO_IS = radioADCQ[9] |
---|
916 | PORT radio_ADC_Q10 = radio2_ADC_Q10, IO_IS = radioADCQ[10] |
---|
917 | PORT radio_ADC_Q11 = radio2_ADC_Q11, IO_IS = radioADCQ[11] |
---|
918 | PORT radio_ADC_Q12 = radio2_ADC_Q12, IO_IS = radioADCQ[12] |
---|
919 | PORT radio_ADC_Q13 = radio2_ADC_Q13, IO_IS = radioADCQ[13] |
---|
920 | |
---|
921 | PORT radio_DAC_I0 = radio2_DAC_I0, IO_IS = radioDACI[0] |
---|
922 | PORT radio_DAC_I1 = radio2_DAC_I1, IO_IS = radioDACI[1] |
---|
923 | PORT radio_DAC_I2 = radio2_DAC_I2, IO_IS = radioDACI[2] |
---|
924 | PORT radio_DAC_I3 = radio2_DAC_I3, IO_IS = radioDACI[3] |
---|
925 | PORT radio_DAC_I4 = radio2_DAC_I4, IO_IS = radioDACI[4] |
---|
926 | PORT radio_DAC_I5 = radio2_DAC_I5, IO_IS = radioDACI[5] |
---|
927 | PORT radio_DAC_I6 = radio2_DAC_I6, IO_IS = radioDACI[6] |
---|
928 | PORT radio_DAC_I7 = radio2_DAC_I7, IO_IS = radioDACI[7] |
---|
929 | PORT radio_DAC_I8 = radio2_DAC_I8, IO_IS = radioDACI[8] |
---|
930 | PORT radio_DAC_I9 = radio2_DAC_I9, IO_IS = radioDACI[9] |
---|
931 | PORT radio_DAC_I10 = radio2_DAC_I10, IO_IS = radioDACI[10] |
---|
932 | PORT radio_DAC_I11 = radio2_DAC_I11, IO_IS = radioDACI[11] |
---|
933 | PORT radio_DAC_I12 = radio2_DAC_I12, IO_IS = radioDACI[12] |
---|
934 | PORT radio_DAC_I13 = radio2_DAC_I13, IO_IS = radioDACI[13] |
---|
935 | PORT radio_DAC_I14 = radio2_DAC_I14, IO_IS = radioDACI[14] |
---|
936 | PORT radio_DAC_I15 = radio2_DAC_I15, IO_IS = radioDACI[15] |
---|
937 | |
---|
938 | PORT radio_DAC_Q0 = radio2_DAC_Q0, IO_IS = radioDACQ[0] |
---|
939 | PORT radio_DAC_Q1 = radio2_DAC_Q1, IO_IS = radioDACQ[1] |
---|
940 | PORT radio_DAC_Q2 = radio2_DAC_Q2, IO_IS = radioDACQ[2] |
---|
941 | PORT radio_DAC_Q3 = radio2_DAC_Q3, IO_IS = radioDACQ[3] |
---|
942 | PORT radio_DAC_Q4 = radio2_DAC_Q4, IO_IS = radioDACQ[4] |
---|
943 | PORT radio_DAC_Q5 = radio2_DAC_Q5, IO_IS = radioDACQ[5] |
---|
944 | PORT radio_DAC_Q6 = radio2_DAC_Q6, IO_IS = radioDACQ[6] |
---|
945 | PORT radio_DAC_Q7 = radio2_DAC_Q7, IO_IS = radioDACQ[7] |
---|
946 | PORT radio_DAC_Q8 = radio2_DAC_Q8, IO_IS = radioDACQ[8] |
---|
947 | PORT radio_DAC_Q9 = radio2_DAC_Q9, IO_IS = radioDACQ[9] |
---|
948 | PORT radio_DAC_Q10 = radio2_DAC_Q10, IO_IS = radioDACQ[10] |
---|
949 | PORT radio_DAC_Q11 = radio2_DAC_Q11, IO_IS = radioDACQ[11] |
---|
950 | PORT radio_DAC_Q12 = radio2_DAC_Q12, IO_IS = radioDACQ[12] |
---|
951 | PORT radio_DAC_Q13 = radio2_DAC_Q13, IO_IS = radioDACQ[13] |
---|
952 | PORT radio_DAC_Q14 = radio2_DAC_Q14, IO_IS = radioDACQ[14] |
---|
953 | PORT radio_DAC_Q15 = radio2_DAC_Q15, IO_IS = radioDACQ[15] |
---|
954 | |
---|
955 | ########################################## |
---|
956 | #Radio Controller <-> Radio Bridge Ports # |
---|
957 | ########################################## |
---|
958 | PORT controller_logic_clk = controller_logic_clk |
---|
959 | PORT controller_spi_clk = controller_spi_clk |
---|
960 | PORT controller_spi_data = controller_spi_data |
---|
961 | PORT controller_radio_cs = controller_radio2_cs |
---|
962 | PORT controller_dac_cs = controller_dac2_cs |
---|
963 | PORT controller_SHDN = controller_radio2_SHDN |
---|
964 | PORT controller_TxEn = controller_radio2_TxEn |
---|
965 | PORT controller_RxEn = controller_radio2_RxEn |
---|
966 | PORT controller_RxHP = controller_radio2_RxHP |
---|
967 | PORT controller_24PA = controller_radio2_24PA |
---|
968 | PORT controller_5PA = controller_radio2_5PA |
---|
969 | PORT controller_ANTSW0 = controller_radio2_ANTSW0, IO_IS = c2b_ANTSW[0] |
---|
970 | PORT controller_ANTSW1 = controller_radio2_ANTSW1, IO_IS = c2b_ANTSW[1] |
---|
971 | PORT controller_LED0 = controller_radio2_LED0, IO_IS = c2b_LED[0] |
---|
972 | PORT controller_LED1 = controller_radio2_LED1, IO_IS = c2b_LED[1] |
---|
973 | PORT controller_LED2 = controller_radio2_LED2, IO_IS = c2b_LED[2] |
---|
974 | PORT controller_RX_ADC_DCS = controller_radio2_RX_ADC_DCS |
---|
975 | PORT controller_RX_ADC_DFS = controller_radio2_RX_ADC_DFS |
---|
976 | PORT controller_RX_ADC_PWDNA = controller_radio2_RX_ADC_PWDNA |
---|
977 | PORT controller_RX_ADC_PWDNB = controller_radio2_RX_ADC_PWDNB |
---|
978 | PORT controller_DIPSW0 = controller_radio2_DIPSW0, IO_IS = c2b_DIPSW[0] |
---|
979 | PORT controller_DIPSW1 = controller_radio2_DIPSW1, IO_IS = c2b_DIPSW[1] |
---|
980 | PORT controller_DIPSW2 = controller_radio2_DIPSW2, IO_IS = c2b_DIPSW[2] |
---|
981 | PORT controller_DIPSW3 = controller_radio2_DIPSW3, IO_IS = c2b_DIPSW[3] |
---|
982 | PORT controller_RSSI_ADC_CLAMP = controller_radio2_RSSI_ADC_CLAMP |
---|
983 | PORT controller_RSSI_ADC_HIZ = controller_radio2_RSSI_ADC_HIZ |
---|
984 | PORT controller_RSSI_ADC_SLEEP = controller_radio2_RSSI_ADC_SLEEP |
---|
985 | PORT controller_RSSI_ADC_D0 = controller_radio2_RSSI_ADC_D0, IO_IS = c2b_RSSI_ADC_D[0] |
---|
986 | PORT controller_RSSI_ADC_D1 = controller_radio2_RSSI_ADC_D1, IO_IS = c2b_RSSI_ADC_D[1] |
---|
987 | PORT controller_RSSI_ADC_D2 = controller_radio2_RSSI_ADC_D2, IO_IS = c2b_RSSI_ADC_D[2] |
---|
988 | PORT controller_RSSI_ADC_D3 = controller_radio2_RSSI_ADC_D3, IO_IS = c2b_RSSI_ADC_D[3] |
---|
989 | PORT controller_RSSI_ADC_D4 = controller_radio2_RSSI_ADC_D4, IO_IS = c2b_RSSI_ADC_D[4] |
---|
990 | PORT controller_RSSI_ADC_D5 = controller_radio2_RSSI_ADC_D5, IO_IS = c2b_RSSI_ADC_D[5] |
---|
991 | PORT controller_RSSI_ADC_D6 = controller_radio2_RSSI_ADC_D6, IO_IS = c2b_RSSI_ADC_D[6] |
---|
992 | PORT controller_RSSI_ADC_D7 = controller_radio2_RSSI_ADC_D7, IO_IS = c2b_RSSI_ADC_D[7] |
---|
993 | PORT controller_RSSI_ADC_D8 = controller_radio2_RSSI_ADC_D8, IO_IS = c2b_RSSI_ADC_D[8] |
---|
994 | PORT controller_RSSI_ADC_D9 = controller_radio2_RSSI_ADC_D9, IO_IS = c2b_RSSI_ADC_D[9] |
---|
995 | PORT controller_LD = controller_radio2_LD |
---|
996 | PORT controller_RX_ADC_OTRA = controller_radio2_RX_ADC_OTRA |
---|
997 | PORT controller_RX_ADC_OTRB = controller_radio2_RX_ADC_OTRB |
---|
998 | PORT controller_RSSI_ADC_OTR = controller_radio2_RSSI_ADC_OTR |
---|
999 | PORT controller_dac_PLL_LOCK = controller_dac2_PLL_LOCK |
---|
1000 | PORT controller_dac_RESET = controller_dac2_RESET |
---|
1001 | PORT user_Tx_gain0 = controller_radio2_TxGain0, IO_IS = userTxG[0] |
---|
1002 | PORT user_Tx_gain1 = controller_radio2_TxGain1, IO_IS = userTxG[1] |
---|
1003 | PORT user_Tx_gain2 = controller_radio2_TxGain2, IO_IS = userTxG[2] |
---|
1004 | PORT user_Tx_gain3 = controller_radio2_TxGain3, IO_IS = userTxG[3] |
---|
1005 | PORT user_Tx_gain4 = controller_radio2_TxGain4, IO_IS = userTxG[4] |
---|
1006 | PORT user_Tx_gain5 = controller_radio2_TxGain5, IO_IS = userTxG[5] |
---|
1007 | PORT controller_TxStart = controller_radio2_TxStart |
---|
1008 | PORT controller_SHDN_external = controller_radio2_SHDN_external |
---|
1009 | PORT controller_RxEn_external = controller_radio2_RxEn_external |
---|
1010 | PORT controller_TxEn_external = controller_radio2_TxEn_external |
---|
1011 | PORT controller_RxHP_external = controller_radio2_RxHP_external |
---|
1012 | |
---|
1013 | ##################################### |
---|
1014 | #Radio Bridge <-> Radio Board Ports # |
---|
1015 | ##################################### |
---|
1016 | PORT dac_spi_data = dac2_spi_data |
---|
1017 | PORT dac_spi_cs = dac2_spi_cs |
---|
1018 | PORT dac_spi_clk = dac2_spi_clk |
---|
1019 | PORT radio_spi_clk = radio2_spi_clk |
---|
1020 | PORT radio_spi_data = radio2_spi_data |
---|
1021 | PORT radio_spi_cs = radio2_spi_cs |
---|
1022 | PORT radio_SHDN = radio2_SHDN |
---|
1023 | PORT radio_TxEn = radio2_TxEn |
---|
1024 | PORT radio_RxEn = radio2_RxEn |
---|
1025 | PORT radio_RxHP = radio2_RxHP |
---|
1026 | PORT radio_24PA = radio2_24PA |
---|
1027 | PORT radio_5PA = radio2_5PA |
---|
1028 | PORT radio_ANTSW0 = radio2_ANTSW0, IO_IS = b2r_ANTSW[0] |
---|
1029 | PORT radio_ANTSW1 = radio2_ANTSW1, IO_IS = b2r_ANTSW[1] |
---|
1030 | PORT radio_LED0 = radio2_LED0, IO_IS = b2r_LED[0] |
---|
1031 | PORT radio_LED1 = radio2_LED1, IO_IS = b2r_LED[1] |
---|
1032 | PORT radio_LED2 = radio2_LED2, IO_IS = b2r_LED[2] |
---|
1033 | PORT radio_RX_ADC_DCS = radio2_RX_ADC_DCS |
---|
1034 | PORT radio_RX_ADC_DFS = radio2_RX_ADC_DFS |
---|
1035 | PORT radio_RX_ADC_PWDNA = radio2_RX_ADC_PWDNA |
---|
1036 | PORT radio_RX_ADC_PWDNB = radio2_RX_ADC_PWDNB |
---|
1037 | PORT radio_DIPSW0 = radio2_DIPSW0, IO_IS = b2r_DIPSW[0] |
---|
1038 | PORT radio_DIPSW1 = radio2_DIPSW1, IO_IS = b2r_DIPSW[1] |
---|
1039 | PORT radio_DIPSW2 = radio2_DIPSW2, IO_IS = b2r_DIPSW[2] |
---|
1040 | PORT radio_DIPSW3 = radio2_DIPSW3, IO_IS = b2r_DIPSW[3] |
---|
1041 | PORT radio_RSSI_ADC_clk = radio2_RSSI_ADC_clk |
---|
1042 | PORT radio_RSSI_ADC_CLAMP = radio2_RSSI_ADC_CLAMP |
---|
1043 | PORT radio_RSSI_ADC_HIZ = radio2_RSSI_ADC_HIZ |
---|
1044 | PORT radio_RSSI_ADC_SLEEP = radio2_RSSI_ADC_SLEEP |
---|
1045 | PORT radio_RSSI_ADC_D0 = radio2_RSSI_ADC_D0, IO_IS = b2r_RSSI_ADC_D[0] |
---|
1046 | PORT radio_RSSI_ADC_D1 = radio2_RSSI_ADC_D1, IO_IS = b2r_RSSI_ADC_D[1] |
---|
1047 | PORT radio_RSSI_ADC_D2 = radio2_RSSI_ADC_D2, IO_IS = b2r_RSSI_ADC_D[2] |
---|
1048 | PORT radio_RSSI_ADC_D3 = radio2_RSSI_ADC_D3, IO_IS = b2r_RSSI_ADC_D[3] |
---|
1049 | PORT radio_RSSI_ADC_D4 = radio2_RSSI_ADC_D4, IO_IS = b2r_RSSI_ADC_D[4] |
---|
1050 | PORT radio_RSSI_ADC_D5 = radio2_RSSI_ADC_D5, IO_IS = b2r_RSSI_ADC_D[5] |
---|
1051 | PORT radio_RSSI_ADC_D6 = radio2_RSSI_ADC_D6, IO_IS = b2r_RSSI_ADC_D[6] |
---|
1052 | PORT radio_RSSI_ADC_D7 = radio2_RSSI_ADC_D7, IO_IS = b2r_RSSI_ADC_D[7] |
---|
1053 | PORT radio_RSSI_ADC_D8 = radio2_RSSI_ADC_D8, IO_IS = b2r_RSSI_ADC_D[8] |
---|
1054 | PORT radio_RSSI_ADC_D9 = radio2_RSSI_ADC_D9, IO_IS = b2r_RSSI_ADC_D[9] |
---|
1055 | PORT radio_LD = radio2_LD |
---|
1056 | PORT radio_RX_ADC_OTRA = radio2_RX_ADC_OTRA |
---|
1057 | PORT radio_RX_ADC_OTRB = radio2_RX_ADC_OTRB |
---|
1058 | PORT radio_RSSI_ADC_OTR = radio2_RSSI_ADC_OTR |
---|
1059 | PORT radio_dac_PLL_LOCK = radio2_dac2_PLL_LOCK |
---|
1060 | PORT radio_dac_RESET = radio2_dac2_RESET |
---|
1061 | |
---|
1062 | PORT user_EEPROM_IO_T = DQ2_T_user_EEPROM_IO_T |
---|
1063 | PORT user_EEPROM_IO_O = DQ2_O_user_EEPROM_IO_O |
---|
1064 | PORT user_EEPROM_IO_I = DQ2_I_user_EEPROM_IO_I |
---|
1065 | PORT radio_EEPROM_IO = radio2_EEPROM_IO |
---|
1066 | END |
---|
1067 | |
---|
1068 | #Radio Controller -> Radio Board Bridge for Slot #3 |
---|
1069 | BEGIN IO_INTERFACE |
---|
1070 | ATTRIBUTE IOTYPE = WARP_RADIOBRIDGE_V1 |
---|
1071 | ATTRIBUTE INSTANCE = radio_bridge_slot_3 |
---|
1072 | ATTRIBUTE EXCLUSIVE = slot3 |
---|
1073 | ATTRIBUTE ALERT = 'Enable this peripheral only if a radio board is mounted in daughtercard slot 3.' |
---|
1074 | |
---|
1075 | PORT converter_clock_out = radio3_conv_clk_p |
---|
1076 | |
---|
1077 | PORT radio_b0 = radio3_b0, IO_IS = radioGain[0] |
---|
1078 | PORT radio_b1 = radio3_b1, IO_IS = radioGain[1] |
---|
1079 | PORT radio_b2 = radio3_b2, IO_IS = radioGain[2] |
---|
1080 | PORT radio_b3 = radio3_b3, IO_IS = radioGain[3] |
---|
1081 | PORT radio_b4 = radio3_b4, IO_IS = radioGain[4] |
---|
1082 | PORT radio_b5 = radio3_b5, IO_IS = radioGain[5] |
---|
1083 | PORT radio_b6 = radio3_b6, IO_IS = radioGain[6] |
---|
1084 | |
---|
1085 | PORT radio_ADC_I0 = radio3_ADC_I0, IO_IS = radioADCI[0] |
---|
1086 | PORT radio_ADC_I1 = radio3_ADC_I1, IO_IS = radioADCI[1] |
---|
1087 | PORT radio_ADC_I2 = radio3_ADC_I2, IO_IS = radioADCI[2] |
---|
1088 | PORT radio_ADC_I3 = radio3_ADC_I3, IO_IS = radioADCI[3] |
---|
1089 | PORT radio_ADC_I4 = radio3_ADC_I4, IO_IS = radioADCI[4] |
---|
1090 | PORT radio_ADC_I5 = radio3_ADC_I5, IO_IS = radioADCI[5] |
---|
1091 | PORT radio_ADC_I6 = radio3_ADC_I6, IO_IS = radioADCI[6] |
---|
1092 | PORT radio_ADC_I7 = radio3_ADC_I7, IO_IS = radioADCI[7] |
---|
1093 | PORT radio_ADC_I8 = radio3_ADC_I8, IO_IS = radioADCI[8] |
---|
1094 | PORT radio_ADC_I9 = radio3_ADC_I9, IO_IS = radioADCI[9] |
---|
1095 | PORT radio_ADC_I10 = radio3_ADC_I10, IO_IS = radioADCI[10] |
---|
1096 | PORT radio_ADC_I11 = radio3_ADC_I11, IO_IS = radioADCI[11] |
---|
1097 | PORT radio_ADC_I12 = radio3_ADC_I12, IO_IS = radioADCI[12] |
---|
1098 | PORT radio_ADC_I13 = radio3_ADC_I13, IO_IS = radioADCI[13] |
---|
1099 | |
---|
1100 | PORT radio_ADC_Q0 = radio3_ADC_Q0, IO_IS = radioADCQ[0] |
---|
1101 | PORT radio_ADC_Q1 = radio3_ADC_Q1, IO_IS = radioADCQ[1] |
---|
1102 | PORT radio_ADC_Q2 = radio3_ADC_Q2, IO_IS = radioADCQ[2] |
---|
1103 | PORT radio_ADC_Q3 = radio3_ADC_Q3, IO_IS = radioADCQ[3] |
---|
1104 | PORT radio_ADC_Q4 = radio3_ADC_Q4, IO_IS = radioADCQ[4] |
---|
1105 | PORT radio_ADC_Q5 = radio3_ADC_Q5, IO_IS = radioADCQ[5] |
---|
1106 | PORT radio_ADC_Q6 = radio3_ADC_Q6, IO_IS = radioADCQ[6] |
---|
1107 | PORT radio_ADC_Q7 = radio3_ADC_Q7, IO_IS = radioADCQ[7] |
---|
1108 | PORT radio_ADC_Q8 = radio3_ADC_Q8, IO_IS = radioADCQ[8] |
---|
1109 | PORT radio_ADC_Q9 = radio3_ADC_Q9, IO_IS = radioADCQ[9] |
---|
1110 | PORT radio_ADC_Q10 = radio3_ADC_Q10, IO_IS = radioADCQ[10] |
---|
1111 | PORT radio_ADC_Q11 = radio3_ADC_Q11, IO_IS = radioADCQ[11] |
---|
1112 | PORT radio_ADC_Q12 = radio3_ADC_Q12, IO_IS = radioADCQ[12] |
---|
1113 | PORT radio_ADC_Q13 = radio3_ADC_Q13, IO_IS = radioADCQ[13] |
---|
1114 | |
---|
1115 | PORT radio_DAC_I0 = radio3_DAC_I0, IO_IS = radioDACI[0] |
---|
1116 | PORT radio_DAC_I1 = radio3_DAC_I1, IO_IS = radioDACI[1] |
---|
1117 | PORT radio_DAC_I2 = radio3_DAC_I2, IO_IS = radioDACI[2] |
---|
1118 | PORT radio_DAC_I3 = radio3_DAC_I3, IO_IS = radioDACI[3] |
---|
1119 | PORT radio_DAC_I4 = radio3_DAC_I4, IO_IS = radioDACI[4] |
---|
1120 | PORT radio_DAC_I5 = radio3_DAC_I5, IO_IS = radioDACI[5] |
---|
1121 | PORT radio_DAC_I6 = radio3_DAC_I6, IO_IS = radioDACI[6] |
---|
1122 | PORT radio_DAC_I7 = radio3_DAC_I7, IO_IS = radioDACI[7] |
---|
1123 | PORT radio_DAC_I8 = radio3_DAC_I8, IO_IS = radioDACI[8] |
---|
1124 | PORT radio_DAC_I9 = radio3_DAC_I9, IO_IS = radioDACI[9] |
---|
1125 | PORT radio_DAC_I10 = radio3_DAC_I10, IO_IS = radioDACI[10] |
---|
1126 | PORT radio_DAC_I11 = radio3_DAC_I11, IO_IS = radioDACI[11] |
---|
1127 | PORT radio_DAC_I12 = radio3_DAC_I12, IO_IS = radioDACI[12] |
---|
1128 | PORT radio_DAC_I13 = radio3_DAC_I13, IO_IS = radioDACI[13] |
---|
1129 | PORT radio_DAC_I14 = radio3_DAC_I14, IO_IS = radioDACI[14] |
---|
1130 | PORT radio_DAC_I15 = radio3_DAC_I15, IO_IS = radioDACI[15] |
---|
1131 | |
---|
1132 | PORT radio_DAC_Q0 = radio3_DAC_Q0, IO_IS = radioDACQ[0] |
---|
1133 | PORT radio_DAC_Q1 = radio3_DAC_Q1, IO_IS = radioDACQ[1] |
---|
1134 | PORT radio_DAC_Q2 = radio3_DAC_Q2, IO_IS = radioDACQ[2] |
---|
1135 | PORT radio_DAC_Q3 = radio3_DAC_Q3, IO_IS = radioDACQ[3] |
---|
1136 | PORT radio_DAC_Q4 = radio3_DAC_Q4, IO_IS = radioDACQ[4] |
---|
1137 | PORT radio_DAC_Q5 = radio3_DAC_Q5, IO_IS = radioDACQ[5] |
---|
1138 | PORT radio_DAC_Q6 = radio3_DAC_Q6, IO_IS = radioDACQ[6] |
---|
1139 | PORT radio_DAC_Q7 = radio3_DAC_Q7, IO_IS = radioDACQ[7] |
---|
1140 | PORT radio_DAC_Q8 = radio3_DAC_Q8, IO_IS = radioDACQ[8] |
---|
1141 | PORT radio_DAC_Q9 = radio3_DAC_Q9, IO_IS = radioDACQ[9] |
---|
1142 | PORT radio_DAC_Q10 = radio3_DAC_Q10, IO_IS = radioDACQ[10] |
---|
1143 | PORT radio_DAC_Q11 = radio3_DAC_Q11, IO_IS = radioDACQ[11] |
---|
1144 | PORT radio_DAC_Q12 = radio3_DAC_Q12, IO_IS = radioDACQ[12] |
---|
1145 | PORT radio_DAC_Q13 = radio3_DAC_Q13, IO_IS = radioDACQ[13] |
---|
1146 | PORT radio_DAC_Q14 = radio3_DAC_Q14, IO_IS = radioDACQ[14] |
---|
1147 | PORT radio_DAC_Q15 = radio3_DAC_Q15, IO_IS = radioDACQ[15] |
---|
1148 | |
---|
1149 | ########################################## |
---|
1150 | #Radio Controller <-> Radio Bridge Ports # |
---|
1151 | ########################################## |
---|
1152 | PORT controller_logic_clk = controller_logic_clk |
---|
1153 | PORT controller_spi_clk = controller_spi_clk |
---|
1154 | PORT controller_spi_data = controller_spi_data |
---|
1155 | PORT controller_radio_cs = controller_radio3_cs |
---|
1156 | PORT controller_dac_cs = controller_dac3_cs |
---|
1157 | PORT controller_SHDN = controller_radio3_SHDN |
---|
1158 | PORT controller_TxEn = controller_radio3_TxEn |
---|
1159 | PORT controller_RxEn = controller_radio3_RxEn |
---|
1160 | PORT controller_RxHP = controller_radio3_RxHP |
---|
1161 | PORT controller_24PA = controller_radio3_24PA |
---|
1162 | PORT controller_5PA = controller_radio3_5PA |
---|
1163 | PORT controller_ANTSW0 = controller_radio3_ANTSW0, IO_IS = c2b_ANTSW[0] |
---|
1164 | PORT controller_ANTSW1 = controller_radio3_ANTSW1, IO_IS = c2b_ANTSW[1] |
---|
1165 | PORT controller_LED0 = controller_radio3_LED0, IO_IS = c2b_LED[0] |
---|
1166 | PORT controller_LED1 = controller_radio3_LED1, IO_IS = c2b_LED[1] |
---|
1167 | PORT controller_LED2 = controller_radio3_LED2, IO_IS = c2b_LED[2] |
---|
1168 | PORT controller_RX_ADC_DCS = controller_radio3_RX_ADC_DCS |
---|
1169 | PORT controller_RX_ADC_DFS = controller_radio3_RX_ADC_DFS |
---|
1170 | PORT controller_RX_ADC_PWDNA = controller_radio3_RX_ADC_PWDNA |
---|
1171 | PORT controller_RX_ADC_PWDNB = controller_radio3_RX_ADC_PWDNB |
---|
1172 | PORT controller_DIPSW0 = controller_radio3_DIPSW0, IO_IS = c2b_DIPSW[0] |
---|
1173 | PORT controller_DIPSW1 = controller_radio3_DIPSW1, IO_IS = c2b_DIPSW[1] |
---|
1174 | PORT controller_DIPSW2 = controller_radio3_DIPSW2, IO_IS = c2b_DIPSW[2] |
---|
1175 | PORT controller_DIPSW3 = controller_radio3_DIPSW3, IO_IS = c2b_DIPSW[3] |
---|
1176 | PORT controller_RSSI_ADC_CLAMP = controller_radio3_RSSI_ADC_CLAMP |
---|
1177 | PORT controller_RSSI_ADC_HIZ = controller_radio3_RSSI_ADC_HIZ |
---|
1178 | PORT controller_RSSI_ADC_SLEEP = controller_radio3_RSSI_ADC_SLEEP |
---|
1179 | PORT controller_RSSI_ADC_D0 = controller_radio3_RSSI_ADC_D0, IO_IS = c2b_RSSI_ADC_D[0] |
---|
1180 | PORT controller_RSSI_ADC_D1 = controller_radio3_RSSI_ADC_D1, IO_IS = c2b_RSSI_ADC_D[1] |
---|
1181 | PORT controller_RSSI_ADC_D2 = controller_radio3_RSSI_ADC_D2, IO_IS = c2b_RSSI_ADC_D[2] |
---|
1182 | PORT controller_RSSI_ADC_D3 = controller_radio3_RSSI_ADC_D3, IO_IS = c2b_RSSI_ADC_D[3] |
---|
1183 | PORT controller_RSSI_ADC_D4 = controller_radio3_RSSI_ADC_D4, IO_IS = c2b_RSSI_ADC_D[4] |
---|
1184 | PORT controller_RSSI_ADC_D5 = controller_radio3_RSSI_ADC_D5, IO_IS = c2b_RSSI_ADC_D[5] |
---|
1185 | PORT controller_RSSI_ADC_D6 = controller_radio3_RSSI_ADC_D6, IO_IS = c2b_RSSI_ADC_D[6] |
---|
1186 | PORT controller_RSSI_ADC_D7 = controller_radio3_RSSI_ADC_D7, IO_IS = c2b_RSSI_ADC_D[7] |
---|
1187 | PORT controller_RSSI_ADC_D8 = controller_radio3_RSSI_ADC_D8, IO_IS = c2b_RSSI_ADC_D[8] |
---|
1188 | PORT controller_RSSI_ADC_D9 = controller_radio3_RSSI_ADC_D9, IO_IS = c2b_RSSI_ADC_D[9] |
---|
1189 | PORT controller_LD = controller_radio3_LD |
---|
1190 | PORT controller_RX_ADC_OTRA = controller_radio3_RX_ADC_OTRA |
---|
1191 | PORT controller_RX_ADC_OTRB = controller_radio3_RX_ADC_OTRB |
---|
1192 | PORT controller_RSSI_ADC_OTR = controller_radio3_RSSI_ADC_OTR |
---|
1193 | PORT controller_dac_PLL_LOCK = controller_dac3_PLL_LOCK |
---|
1194 | PORT controller_dac_RESET = controller_dac3_RESET |
---|
1195 | PORT user_Tx_gain0 = controller_radio3_TxGain0, IO_IS = userTxG[0] |
---|
1196 | PORT user_Tx_gain1 = controller_radio3_TxGain1, IO_IS = userTxG[1] |
---|
1197 | PORT user_Tx_gain2 = controller_radio3_TxGain2, IO_IS = userTxG[2] |
---|
1198 | PORT user_Tx_gain3 = controller_radio3_TxGain3, IO_IS = userTxG[3] |
---|
1199 | PORT user_Tx_gain4 = controller_radio3_TxGain4, IO_IS = userTxG[4] |
---|
1200 | PORT user_Tx_gain5 = controller_radio3_TxGain5, IO_IS = userTxG[5] |
---|
1201 | PORT controller_TxStart = controller_radio3_TxStart |
---|
1202 | PORT controller_SHDN_external = controller_radio3_SHDN_external |
---|
1203 | PORT controller_RxEn_external = controller_radio3_RxEn_external |
---|
1204 | PORT controller_TxEn_external = controller_radio3_TxEn_external |
---|
1205 | PORT controller_RxHP_external = controller_radio3_RxHP_external |
---|
1206 | |
---|
1207 | ##################################### |
---|
1208 | #Radio Bridge <-> Radio Board Ports # |
---|
1209 | ##################################### |
---|
1210 | PORT dac_spi_data = dac3_spi_data |
---|
1211 | PORT dac_spi_cs = dac3_spi_cs |
---|
1212 | PORT dac_spi_clk = dac3_spi_clk |
---|
1213 | PORT radio_spi_clk = radio3_spi_clk |
---|
1214 | PORT radio_spi_data = radio3_spi_data |
---|
1215 | PORT radio_spi_cs = radio3_spi_cs |
---|
1216 | PORT radio_SHDN = radio3_SHDN |
---|
1217 | PORT radio_TxEn = radio3_TxEn |
---|
1218 | PORT radio_RxEn = radio3_RxEn |
---|
1219 | PORT radio_RxHP = radio3_RxHP |
---|
1220 | PORT radio_24PA = radio3_24PA |
---|
1221 | PORT radio_5PA = radio3_5PA |
---|
1222 | PORT radio_ANTSW0 = radio3_ANTSW0, IO_IS = b2r_ANTSW[0] |
---|
1223 | PORT radio_ANTSW1 = radio3_ANTSW1, IO_IS = b2r_ANTSW[1] |
---|
1224 | PORT radio_LED0 = radio3_LED0, IO_IS = b2r_LED[0] |
---|
1225 | PORT radio_LED1 = radio3_LED1, IO_IS = b2r_LED[1] |
---|
1226 | PORT radio_LED2 = radio3_LED2, IO_IS = b2r_LED[2] |
---|
1227 | PORT radio_RX_ADC_DCS = radio3_RX_ADC_DCS |
---|
1228 | PORT radio_RX_ADC_DFS = radio3_RX_ADC_DFS |
---|
1229 | PORT radio_RX_ADC_PWDNA = radio3_RX_ADC_PWDNA |
---|
1230 | PORT radio_RX_ADC_PWDNB = radio3_RX_ADC_PWDNB |
---|
1231 | PORT radio_DIPSW0 = radio3_DIPSW0, IO_IS = b2r_DIPSW[0] |
---|
1232 | PORT radio_DIPSW1 = radio3_DIPSW1, IO_IS = b2r_DIPSW[1] |
---|
1233 | PORT radio_DIPSW2 = radio3_DIPSW2, IO_IS = b2r_DIPSW[2] |
---|
1234 | PORT radio_DIPSW3 = radio3_DIPSW3, IO_IS = b2r_DIPSW[3] |
---|
1235 | PORT radio_RSSI_ADC_clk = radio3_RSSI_ADC_clk |
---|
1236 | PORT radio_RSSI_ADC_CLAMP = radio3_RSSI_ADC_CLAMP |
---|
1237 | PORT radio_RSSI_ADC_HIZ = radio3_RSSI_ADC_HIZ |
---|
1238 | PORT radio_RSSI_ADC_SLEEP = radio3_RSSI_ADC_SLEEP |
---|
1239 | PORT radio_RSSI_ADC_D0 = radio3_RSSI_ADC_D0, IO_IS = b2r_RSSI_ADC_D[0] |
---|
1240 | PORT radio_RSSI_ADC_D1 = radio3_RSSI_ADC_D1, IO_IS = b2r_RSSI_ADC_D[1] |
---|
1241 | PORT radio_RSSI_ADC_D2 = radio3_RSSI_ADC_D2, IO_IS = b2r_RSSI_ADC_D[2] |
---|
1242 | PORT radio_RSSI_ADC_D3 = radio3_RSSI_ADC_D3, IO_IS = b2r_RSSI_ADC_D[3] |
---|
1243 | PORT radio_RSSI_ADC_D4 = radio3_RSSI_ADC_D4, IO_IS = b2r_RSSI_ADC_D[4] |
---|
1244 | PORT radio_RSSI_ADC_D5 = radio3_RSSI_ADC_D5, IO_IS = b2r_RSSI_ADC_D[5] |
---|
1245 | PORT radio_RSSI_ADC_D6 = radio3_RSSI_ADC_D6, IO_IS = b2r_RSSI_ADC_D[6] |
---|
1246 | PORT radio_RSSI_ADC_D7 = radio3_RSSI_ADC_D7, IO_IS = b2r_RSSI_ADC_D[7] |
---|
1247 | PORT radio_RSSI_ADC_D8 = radio3_RSSI_ADC_D8, IO_IS = b2r_RSSI_ADC_D[8] |
---|
1248 | PORT radio_RSSI_ADC_D9 = radio3_RSSI_ADC_D9, IO_IS = b2r_RSSI_ADC_D[9] |
---|
1249 | PORT radio_LD = radio3_LD |
---|
1250 | PORT radio_RX_ADC_OTRA = radio3_RX_ADC_OTRA |
---|
1251 | PORT radio_RX_ADC_OTRB = radio3_RX_ADC_OTRB |
---|
1252 | PORT radio_RSSI_ADC_OTR = radio3_RSSI_ADC_OTR |
---|
1253 | PORT radio_dac_PLL_LOCK = radio3_dac3_PLL_LOCK |
---|
1254 | PORT radio_dac_RESET = radio3_dac3_RESET |
---|
1255 | |
---|
1256 | PORT user_EEPROM_IO_T = DQ3_T_user_EEPROM_IO_T |
---|
1257 | PORT user_EEPROM_IO_O = DQ3_O_user_EEPROM_IO_O |
---|
1258 | PORT user_EEPROM_IO_I = DQ3_I_user_EEPROM_IO_I |
---|
1259 | PORT radio_EEPROM_IO = radio3_EEPROM_IO |
---|
1260 | END |
---|
1261 | |
---|
1262 | #Radio Controller -> Radio Board Bridge for Slot #4 |
---|
1263 | BEGIN IO_INTERFACE |
---|
1264 | ATTRIBUTE IOTYPE = WARP_RADIOBRIDGE_V1 |
---|
1265 | ATTRIBUTE INSTANCE = radio_bridge_slot_4 |
---|
1266 | ATTRIBUTE EXCLUSIVE = slot4 |
---|
1267 | ATTRIBUTE ALERT = 'Enable this peripheral only if a radio board is mounted in daughtercard slot 4.' |
---|
1268 | |
---|
1269 | PORT converter_clock_out = radio4_conv_clk_p |
---|
1270 | |
---|
1271 | PORT radio_b0 = radio4_b0, IO_IS = radioGain[0] |
---|
1272 | PORT radio_b1 = radio4_b1, IO_IS = radioGain[1] |
---|
1273 | PORT radio_b2 = radio4_b2, IO_IS = radioGain[2] |
---|
1274 | PORT radio_b3 = radio4_b3, IO_IS = radioGain[3] |
---|
1275 | PORT radio_b4 = radio4_b4, IO_IS = radioGain[4] |
---|
1276 | PORT radio_b5 = radio4_b5, IO_IS = radioGain[5] |
---|
1277 | PORT radio_b6 = radio4_b6, IO_IS = radioGain[6] |
---|
1278 | |
---|
1279 | PORT radio_ADC_I0 = radio4_ADC_I0, IO_IS = radioADCI[0] |
---|
1280 | PORT radio_ADC_I1 = radio4_ADC_I1, IO_IS = radioADCI[1] |
---|
1281 | PORT radio_ADC_I2 = radio4_ADC_I2, IO_IS = radioADCI[2] |
---|
1282 | PORT radio_ADC_I3 = radio4_ADC_I3, IO_IS = radioADCI[3] |
---|
1283 | PORT radio_ADC_I4 = radio4_ADC_I4, IO_IS = radioADCI[4] |
---|
1284 | PORT radio_ADC_I5 = radio4_ADC_I5, IO_IS = radioADCI[5] |
---|
1285 | PORT radio_ADC_I6 = radio4_ADC_I6, IO_IS = radioADCI[6] |
---|
1286 | PORT radio_ADC_I7 = radio4_ADC_I7, IO_IS = radioADCI[7] |
---|
1287 | PORT radio_ADC_I8 = radio4_ADC_I8, IO_IS = radioADCI[8] |
---|
1288 | PORT radio_ADC_I9 = radio4_ADC_I9, IO_IS = radioADCI[9] |
---|
1289 | PORT radio_ADC_I10 = radio4_ADC_I10, IO_IS = radioADCI[10] |
---|
1290 | PORT radio_ADC_I11 = radio4_ADC_I11, IO_IS = radioADCI[11] |
---|
1291 | PORT radio_ADC_I12 = radio4_ADC_I12, IO_IS = radioADCI[12] |
---|
1292 | PORT radio_ADC_I13 = radio4_ADC_I13, IO_IS = radioADCI[13] |
---|
1293 | |
---|
1294 | PORT radio_ADC_Q0 = radio4_ADC_Q0, IO_IS = radioADCQ[0] |
---|
1295 | PORT radio_ADC_Q1 = radio4_ADC_Q1, IO_IS = radioADCQ[1] |
---|
1296 | PORT radio_ADC_Q2 = radio4_ADC_Q2, IO_IS = radioADCQ[2] |
---|
1297 | PORT radio_ADC_Q3 = radio4_ADC_Q3, IO_IS = radioADCQ[3] |
---|
1298 | PORT radio_ADC_Q4 = radio4_ADC_Q4, IO_IS = radioADCQ[4] |
---|
1299 | PORT radio_ADC_Q5 = radio4_ADC_Q5, IO_IS = radioADCQ[5] |
---|
1300 | PORT radio_ADC_Q6 = radio4_ADC_Q6, IO_IS = radioADCQ[6] |
---|
1301 | PORT radio_ADC_Q7 = radio4_ADC_Q7, IO_IS = radioADCQ[7] |
---|
1302 | PORT radio_ADC_Q8 = radio4_ADC_Q8, IO_IS = radioADCQ[8] |
---|
1303 | PORT radio_ADC_Q9 = radio4_ADC_Q9, IO_IS = radioADCQ[9] |
---|
1304 | PORT radio_ADC_Q10 = radio4_ADC_Q10, IO_IS = radioADCQ[10] |
---|
1305 | PORT radio_ADC_Q11 = radio4_ADC_Q11, IO_IS = radioADCQ[11] |
---|
1306 | PORT radio_ADC_Q12 = radio4_ADC_Q12, IO_IS = radioADCQ[12] |
---|
1307 | PORT radio_ADC_Q13 = radio4_ADC_Q13, IO_IS = radioADCQ[13] |
---|
1308 | |
---|
1309 | PORT radio_DAC_I0 = radio4_DAC_I0, IO_IS = radioDACI[0] |
---|
1310 | PORT radio_DAC_I1 = radio4_DAC_I1, IO_IS = radioDACI[1] |
---|
1311 | PORT radio_DAC_I2 = radio4_DAC_I2, IO_IS = radioDACI[2] |
---|
1312 | PORT radio_DAC_I3 = radio4_DAC_I3, IO_IS = radioDACI[3] |
---|
1313 | PORT radio_DAC_I4 = radio4_DAC_I4, IO_IS = radioDACI[4] |
---|
1314 | PORT radio_DAC_I5 = radio4_DAC_I5, IO_IS = radioDACI[5] |
---|
1315 | PORT radio_DAC_I6 = radio4_DAC_I6, IO_IS = radioDACI[6] |
---|
1316 | PORT radio_DAC_I7 = radio4_DAC_I7, IO_IS = radioDACI[7] |
---|
1317 | PORT radio_DAC_I8 = radio4_DAC_I8, IO_IS = radioDACI[8] |
---|
1318 | PORT radio_DAC_I9 = radio4_DAC_I9, IO_IS = radioDACI[9] |
---|
1319 | PORT radio_DAC_I10 = radio4_DAC_I10, IO_IS = radioDACI[10] |
---|
1320 | PORT radio_DAC_I11 = radio4_DAC_I11, IO_IS = radioDACI[11] |
---|
1321 | PORT radio_DAC_I12 = radio4_DAC_I12, IO_IS = radioDACI[12] |
---|
1322 | PORT radio_DAC_I13 = radio4_DAC_I13, IO_IS = radioDACI[13] |
---|
1323 | PORT radio_DAC_I14 = radio4_DAC_I14, IO_IS = radioDACI[14] |
---|
1324 | PORT radio_DAC_I15 = radio4_DAC_I15, IO_IS = radioDACI[15] |
---|
1325 | |
---|
1326 | PORT radio_DAC_Q0 = radio4_DAC_Q0, IO_IS = radioDACQ[0] |
---|
1327 | PORT radio_DAC_Q1 = radio4_DAC_Q1, IO_IS = radioDACQ[1] |
---|
1328 | PORT radio_DAC_Q2 = radio4_DAC_Q2, IO_IS = radioDACQ[2] |
---|
1329 | PORT radio_DAC_Q3 = radio4_DAC_Q3, IO_IS = radioDACQ[3] |
---|
1330 | PORT radio_DAC_Q4 = radio4_DAC_Q4, IO_IS = radioDACQ[4] |
---|
1331 | PORT radio_DAC_Q5 = radio4_DAC_Q5, IO_IS = radioDACQ[5] |
---|
1332 | PORT radio_DAC_Q6 = radio4_DAC_Q6, IO_IS = radioDACQ[6] |
---|
1333 | PORT radio_DAC_Q7 = radio4_DAC_Q7, IO_IS = radioDACQ[7] |
---|
1334 | PORT radio_DAC_Q8 = radio4_DAC_Q8, IO_IS = radioDACQ[8] |
---|
1335 | PORT radio_DAC_Q9 = radio4_DAC_Q9, IO_IS = radioDACQ[9] |
---|
1336 | PORT radio_DAC_Q10 = radio4_DAC_Q10, IO_IS = radioDACQ[10] |
---|
1337 | PORT radio_DAC_Q11 = radio4_DAC_Q11, IO_IS = radioDACQ[11] |
---|
1338 | PORT radio_DAC_Q12 = radio4_DAC_Q12, IO_IS = radioDACQ[12] |
---|
1339 | PORT radio_DAC_Q13 = radio4_DAC_Q13, IO_IS = radioDACQ[13] |
---|
1340 | PORT radio_DAC_Q14 = radio4_DAC_Q14, IO_IS = radioDACQ[14] |
---|
1341 | PORT radio_DAC_Q15 = radio4_DAC_Q15, IO_IS = radioDACQ[15] |
---|
1342 | |
---|
1343 | ########################################## |
---|
1344 | #Radio Controller <-> Radio Bridge Ports # |
---|
1345 | ########################################## |
---|
1346 | PORT controller_logic_clk = controller_logic_clk |
---|
1347 | PORT controller_spi_clk = controller_spi_clk |
---|
1348 | PORT controller_spi_data = controller_spi_data |
---|
1349 | PORT controller_radio_cs = controller_radio4_cs |
---|
1350 | PORT controller_dac_cs = controller_dac4_cs |
---|
1351 | PORT controller_SHDN = controller_radio4_SHDN |
---|
1352 | PORT controller_TxEn = controller_radio4_TxEn |
---|
1353 | PORT controller_RxEn = controller_radio4_RxEn |
---|
1354 | PORT controller_RxHP = controller_radio4_RxHP |
---|
1355 | PORT controller_24PA = controller_radio4_24PA |
---|
1356 | PORT controller_5PA = controller_radio4_5PA |
---|
1357 | PORT controller_ANTSW0 = controller_radio4_ANTSW0, IO_IS = c2b_ANTSW[0] |
---|
1358 | PORT controller_ANTSW1 = controller_radio4_ANTSW1, IO_IS = c2b_ANTSW[1] |
---|
1359 | PORT controller_LED0 = controller_radio4_LED0, IO_IS = c2b_LED[0] |
---|
1360 | PORT controller_LED1 = controller_radio4_LED1, IO_IS = c2b_LED[1] |
---|
1361 | PORT controller_LED2 = controller_radio4_LED2, IO_IS = c2b_LED[2] |
---|
1362 | PORT controller_RX_ADC_DCS = controller_radio4_RX_ADC_DCS |
---|
1363 | PORT controller_RX_ADC_DFS = controller_radio4_RX_ADC_DFS |
---|
1364 | PORT controller_RX_ADC_PWDNA = controller_radio4_RX_ADC_PWDNA |
---|
1365 | PORT controller_RX_ADC_PWDNB = controller_radio4_RX_ADC_PWDNB |
---|
1366 | PORT controller_DIPSW0 = controller_radio4_DIPSW0, IO_IS = c2b_DIPSW[0] |
---|
1367 | PORT controller_DIPSW1 = controller_radio4_DIPSW1, IO_IS = c2b_DIPSW[1] |
---|
1368 | PORT controller_DIPSW2 = controller_radio4_DIPSW2, IO_IS = c2b_DIPSW[2] |
---|
1369 | PORT controller_DIPSW3 = controller_radio4_DIPSW3, IO_IS = c2b_DIPSW[3] |
---|
1370 | PORT controller_RSSI_ADC_CLAMP = controller_radio4_RSSI_ADC_CLAMP |
---|
1371 | PORT controller_RSSI_ADC_HIZ = controller_radio4_RSSI_ADC_HIZ |
---|
1372 | PORT controller_RSSI_ADC_SLEEP = controller_radio4_RSSI_ADC_SLEEP |
---|
1373 | PORT controller_RSSI_ADC_D0 = controller_radio4_RSSI_ADC_D0, IO_IS = c2b_RSSI_ADC_D[0] |
---|
1374 | PORT controller_RSSI_ADC_D1 = controller_radio4_RSSI_ADC_D1, IO_IS = c2b_RSSI_ADC_D[1] |
---|
1375 | PORT controller_RSSI_ADC_D2 = controller_radio4_RSSI_ADC_D2, IO_IS = c2b_RSSI_ADC_D[2] |
---|
1376 | PORT controller_RSSI_ADC_D3 = controller_radio4_RSSI_ADC_D3, IO_IS = c2b_RSSI_ADC_D[3] |
---|
1377 | PORT controller_RSSI_ADC_D4 = controller_radio4_RSSI_ADC_D4, IO_IS = c2b_RSSI_ADC_D[4] |
---|
1378 | PORT controller_RSSI_ADC_D5 = controller_radio4_RSSI_ADC_D5, IO_IS = c2b_RSSI_ADC_D[5] |
---|
1379 | PORT controller_RSSI_ADC_D6 = controller_radio4_RSSI_ADC_D6, IO_IS = c2b_RSSI_ADC_D[6] |
---|
1380 | PORT controller_RSSI_ADC_D7 = controller_radio4_RSSI_ADC_D7, IO_IS = c2b_RSSI_ADC_D[7] |
---|
1381 | PORT controller_RSSI_ADC_D8 = controller_radio4_RSSI_ADC_D8, IO_IS = c2b_RSSI_ADC_D[8] |
---|
1382 | PORT controller_RSSI_ADC_D9 = controller_radio4_RSSI_ADC_D9, IO_IS = c2b_RSSI_ADC_D[9] |
---|
1383 | PORT controller_LD = controller_radio4_LD |
---|
1384 | PORT controller_RX_ADC_OTRA = controller_radio4_RX_ADC_OTRA |
---|
1385 | PORT controller_RX_ADC_OTRB = controller_radio4_RX_ADC_OTRB |
---|
1386 | PORT controller_RSSI_ADC_OTR = controller_radio4_RSSI_ADC_OTR |
---|
1387 | PORT controller_dac_PLL_LOCK = controller_dac4_PLL_LOCK |
---|
1388 | PORT controller_dac_RESET = controller_dac4_RESET |
---|
1389 | PORT user_Tx_gain0 = controller_radio4_TxGain0, IO_IS = userTxG[0] |
---|
1390 | PORT user_Tx_gain1 = controller_radio4_TxGain1, IO_IS = userTxG[1] |
---|
1391 | PORT user_Tx_gain2 = controller_radio4_TxGain2, IO_IS = userTxG[2] |
---|
1392 | PORT user_Tx_gain3 = controller_radio4_TxGain3, IO_IS = userTxG[3] |
---|
1393 | PORT user_Tx_gain4 = controller_radio4_TxGain4, IO_IS = userTxG[4] |
---|
1394 | PORT user_Tx_gain5 = controller_radio4_TxGain5, IO_IS = userTxG[5] |
---|
1395 | PORT controller_TxStart = controller_radio4_TxStart |
---|
1396 | PORT controller_SHDN_external = controller_radio4_SHDN_external |
---|
1397 | PORT controller_RxEn_external = controller_radio4_RxEn_external |
---|
1398 | PORT controller_TxEn_external = controller_radio4_TxEn_external |
---|
1399 | PORT controller_RxHP_external = controller_radio4_RxHP_external |
---|
1400 | |
---|
1401 | ##################################### |
---|
1402 | #Radio Bridge <-> Radio Board Ports # |
---|
1403 | ##################################### |
---|
1404 | PORT dac_spi_data = dac4_spi_data |
---|
1405 | PORT dac_spi_cs = dac4_spi_cs |
---|
1406 | PORT dac_spi_clk = dac4_spi_clk |
---|
1407 | PORT radio_spi_clk = radio4_spi_clk |
---|
1408 | PORT radio_spi_data = radio4_spi_data |
---|
1409 | PORT radio_spi_cs = radio4_spi_cs |
---|
1410 | PORT radio_SHDN = radio4_SHDN |
---|
1411 | PORT radio_TxEn = radio4_TxEn |
---|
1412 | PORT radio_RxEn = radio4_RxEn |
---|
1413 | PORT radio_RxHP = radio4_RxHP |
---|
1414 | PORT radio_24PA = radio4_24PA |
---|
1415 | PORT radio_5PA = radio4_5PA |
---|
1416 | PORT radio_ANTSW0 = radio4_ANTSW0, IO_IS = b2r_ANTSW[0] |
---|
1417 | PORT radio_ANTSW1 = radio4_ANTSW1, IO_IS = b2r_ANTSW[1] |
---|
1418 | PORT radio_LED0 = radio4_LED0, IO_IS = b2r_LED[0] |
---|
1419 | PORT radio_LED1 = radio4_LED1, IO_IS = b2r_LED[1] |
---|
1420 | PORT radio_LED2 = radio4_LED2, IO_IS = b2r_LED[2] |
---|
1421 | PORT radio_RX_ADC_DCS = radio4_RX_ADC_DCS |
---|
1422 | PORT radio_RX_ADC_DFS = radio4_RX_ADC_DFS |
---|
1423 | PORT radio_RX_ADC_PWDNA = radio4_RX_ADC_PWDNA |
---|
1424 | PORT radio_RX_ADC_PWDNB = radio4_RX_ADC_PWDNB |
---|
1425 | PORT radio_DIPSW0 = radio4_DIPSW0, IO_IS = b2r_DIPSW[0] |
---|
1426 | PORT radio_DIPSW1 = radio4_DIPSW1, IO_IS = b2r_DIPSW[1] |
---|
1427 | PORT radio_DIPSW2 = radio4_DIPSW2, IO_IS = b2r_DIPSW[2] |
---|
1428 | PORT radio_DIPSW3 = radio4_DIPSW3, IO_IS = b2r_DIPSW[3] |
---|
1429 | PORT radio_RSSI_ADC_clk = radio4_RSSI_ADC_clk |
---|
1430 | PORT radio_RSSI_ADC_CLAMP = radio4_RSSI_ADC_CLAMP |
---|
1431 | PORT radio_RSSI_ADC_HIZ = radio4_RSSI_ADC_HIZ |
---|
1432 | PORT radio_RSSI_ADC_SLEEP = radio4_RSSI_ADC_SLEEP |
---|
1433 | PORT radio_RSSI_ADC_D0 = radio4_RSSI_ADC_D0, IO_IS = b2r_RSSI_ADC_D[0] |
---|
1434 | PORT radio_RSSI_ADC_D1 = radio4_RSSI_ADC_D1, IO_IS = b2r_RSSI_ADC_D[1] |
---|
1435 | PORT radio_RSSI_ADC_D2 = radio4_RSSI_ADC_D2, IO_IS = b2r_RSSI_ADC_D[2] |
---|
1436 | PORT radio_RSSI_ADC_D3 = radio4_RSSI_ADC_D3, IO_IS = b2r_RSSI_ADC_D[3] |
---|
1437 | PORT radio_RSSI_ADC_D4 = radio4_RSSI_ADC_D4, IO_IS = b2r_RSSI_ADC_D[4] |
---|
1438 | PORT radio_RSSI_ADC_D5 = radio4_RSSI_ADC_D5, IO_IS = b2r_RSSI_ADC_D[5] |
---|
1439 | PORT radio_RSSI_ADC_D6 = radio4_RSSI_ADC_D6, IO_IS = b2r_RSSI_ADC_D[6] |
---|
1440 | PORT radio_RSSI_ADC_D7 = radio4_RSSI_ADC_D7, IO_IS = b2r_RSSI_ADC_D[7] |
---|
1441 | PORT radio_RSSI_ADC_D8 = radio4_RSSI_ADC_D8, IO_IS = b2r_RSSI_ADC_D[8] |
---|
1442 | PORT radio_RSSI_ADC_D9 = radio4_RSSI_ADC_D9, IO_IS = b2r_RSSI_ADC_D[9] |
---|
1443 | PORT radio_LD = radio4_LD |
---|
1444 | PORT radio_RX_ADC_OTRA = radio4_RX_ADC_OTRA |
---|
1445 | PORT radio_RX_ADC_OTRB = radio4_RX_ADC_OTRB |
---|
1446 | PORT radio_RSSI_ADC_OTR = radio4_RSSI_ADC_OTR |
---|
1447 | PORT radio_dac_PLL_LOCK = radio4_dac4_PLL_LOCK |
---|
1448 | PORT radio_dac_RESET = radio4_dac4_RESET |
---|
1449 | |
---|
1450 | PORT user_EEPROM_IO_T = DQ4_T_user_EEPROM_IO_T |
---|
1451 | PORT user_EEPROM_IO_O = DQ4_O_user_EEPROM_IO_O |
---|
1452 | PORT user_EEPROM_IO_I = DQ4_I_user_EEPROM_IO_I |
---|
1453 | PORT radio_EEPROM_IO = radio4_EEPROM_IO |
---|
1454 | END |
---|
1455 | |
---|
1456 | BEGIN IO_INTERFACE |
---|
1457 | ATTRIBUTE IOTYPE = WARP_ANALOGBRIDGE_V1 |
---|
1458 | ATTRIBUTE INSTANCE = analog_bridge_slot_4 |
---|
1459 | ATTRIBUTE EXCLUSIVE = slot4 |
---|
1460 | ATTRIBUTE ALERT = 'Enable this peripheral only if a analog board is mounted in daughtercard slot 4.' |
---|
1461 | |
---|
1462 | PORT clock_out = analog4_clock_out |
---|
1463 | |
---|
1464 | PORT analog_DAC1_A0 = analog4_DAC1_A0, IO_IS = analogDAC1A[0] |
---|
1465 | PORT analog_DAC1_A1 = analog4_DAC1_A1, IO_IS = analogDAC1A[1] |
---|
1466 | PORT analog_DAC1_A2 = analog4_DAC1_A2, IO_IS = analogDAC1A[2] |
---|
1467 | PORT analog_DAC1_A3 = analog4_DAC1_A3, IO_IS = analogDAC1A[3] |
---|
1468 | PORT analog_DAC1_A4 = analog4_DAC1_A4, IO_IS = analogDAC1A[4] |
---|
1469 | PORT analog_DAC1_A5 = analog4_DAC1_A5, IO_IS = analogDAC1A[5] |
---|
1470 | PORT analog_DAC1_A6 = analog4_DAC1_A6, IO_IS = analogDAC1A[6] |
---|
1471 | PORT analog_DAC1_A7 = analog4_DAC1_A7, IO_IS = analogDAC1A[7] |
---|
1472 | PORT analog_DAC1_A8 = analog4_DAC1_A8, IO_IS = analogDAC1A[8] |
---|
1473 | PORT analog_DAC1_A9 = analog4_DAC1_A9, IO_IS = analogDAC1A[9] |
---|
1474 | PORT analog_DAC1_A10 = analog4_DAC1_A10, IO_IS = analogDAC1A[10] |
---|
1475 | PORT analog_DAC1_A11 = analog4_DAC1_A11, IO_IS = analogDAC1A[11] |
---|
1476 | PORT analog_DAC1_A12 = analog4_DAC1_A12, IO_IS = analogDAC1A[12] |
---|
1477 | PORT analog_DAC1_A13 = analog4_DAC1_A13, IO_IS = analogDAC1A[13] |
---|
1478 | |
---|
1479 | PORT analog_DAC1_B0 = analog4_DAC1_B0, IO_IS = analogDAC1B[0] |
---|
1480 | PORT analog_DAC1_B1 = analog4_DAC1_B1, IO_IS = analogDAC1B[1] |
---|
1481 | PORT analog_DAC1_B2 = analog4_DAC1_B2, IO_IS = analogDAC1B[2] |
---|
1482 | PORT analog_DAC1_B3 = analog4_DAC1_B3, IO_IS = analogDAC1B[3] |
---|
1483 | PORT analog_DAC1_B4 = analog4_DAC1_B4, IO_IS = analogDAC1B[4] |
---|
1484 | PORT analog_DAC1_B5 = analog4_DAC1_B5, IO_IS = analogDAC1B[5] |
---|
1485 | PORT analog_DAC1_B6 = analog4_DAC1_B6, IO_IS = analogDAC1B[6] |
---|
1486 | PORT analog_DAC1_B7 = analog4_DAC1_B7, IO_IS = analogDAC1B[7] |
---|
1487 | PORT analog_DAC1_B8 = analog4_DAC1_B8, IO_IS = analogDAC1B[8] |
---|
1488 | PORT analog_DAC1_B9 = analog4_DAC1_B9, IO_IS = analogDAC1B[9] |
---|
1489 | PORT analog_DAC1_B10 = analog4_DAC1_B10, IO_IS = analogDAC1B[10] |
---|
1490 | PORT analog_DAC1_B11 = analog4_DAC1_B11, IO_IS = analogDAC1B[11] |
---|
1491 | PORT analog_DAC1_B12 = analog4_DAC1_B12, IO_IS = analogDAC1B[12] |
---|
1492 | PORT analog_DAC1_B13 = analog4_DAC1_B13, IO_IS = analogDAC1B[13] |
---|
1493 | |
---|
1494 | PORT analog_DAC2_A0 = analog4_DAC2_A0, IO_IS = analogDAC2A[0] |
---|
1495 | PORT analog_DAC2_A1 = analog4_DAC2_A1, IO_IS = analogDAC2A[1] |
---|
1496 | PORT analog_DAC2_A2 = analog4_DAC2_A2, IO_IS = analogDAC2A[2] |
---|
1497 | PORT analog_DAC2_A3 = analog4_DAC2_A3, IO_IS = analogDAC2A[3] |
---|
1498 | PORT analog_DAC2_A4 = analog4_DAC2_A4, IO_IS = analogDAC2A[4] |
---|
1499 | PORT analog_DAC2_A5 = analog4_DAC2_A5, IO_IS = analogDAC2A[5] |
---|
1500 | PORT analog_DAC2_A6 = analog4_DAC2_A6, IO_IS = analogDAC2A[6] |
---|
1501 | PORT analog_DAC2_A7 = analog4_DAC2_A7, IO_IS = analogDAC2A[7] |
---|
1502 | PORT analog_DAC2_A8 = analog4_DAC2_A8, IO_IS = analogDAC2A[8] |
---|
1503 | PORT analog_DAC2_A9 = analog4_DAC2_A9, IO_IS = analogDAC2A[9] |
---|
1504 | PORT analog_DAC2_A10 = analog4_DAC2_A10, IO_IS = analogDAC2A[10] |
---|
1505 | PORT analog_DAC2_A11 = analog4_DAC2_A11, IO_IS = analogDAC2A[11] |
---|
1506 | PORT analog_DAC2_A12 = analog4_DAC2_A12, IO_IS = analogDAC2A[12] |
---|
1507 | PORT analog_DAC2_A13 = analog4_DAC2_A13, IO_IS = analogDAC2A[13] |
---|
1508 | |
---|
1509 | PORT analog_DAC2_B0 = analog4_DAC2_B0, IO_IS = analogDAC2B[0] |
---|
1510 | PORT analog_DAC2_B1 = analog4_DAC2_B1, IO_IS = analogDAC2B[1] |
---|
1511 | PORT analog_DAC2_B2 = analog4_DAC2_B2, IO_IS = analogDAC2B[2] |
---|
1512 | PORT analog_DAC2_B3 = analog4_DAC2_B3, IO_IS = analogDAC2B[3] |
---|
1513 | PORT analog_DAC2_B4 = analog4_DAC2_B4, IO_IS = analogDAC2B[4] |
---|
1514 | PORT analog_DAC2_B5 = analog4_DAC2_B5, IO_IS = analogDAC2B[5] |
---|
1515 | PORT analog_DAC2_B6 = analog4_DAC2_B6, IO_IS = analogDAC2B[6] |
---|
1516 | PORT analog_DAC2_B7 = analog4_DAC2_B7, IO_IS = analogDAC2B[7] |
---|
1517 | PORT analog_DAC2_B8 = analog4_DAC2_B8, IO_IS = analogDAC2B[8] |
---|
1518 | PORT analog_DAC2_B9 = analog4_DAC2_B9, IO_IS = analogDAC2B[9] |
---|
1519 | PORT analog_DAC2_B10 = analog4_DAC2_B10, IO_IS = analogDAC2B[10] |
---|
1520 | PORT analog_DAC2_B11 = analog4_DAC2_B11, IO_IS = analogDAC2B[11] |
---|
1521 | PORT analog_DAC2_B12 = analog4_DAC2_B12, IO_IS = analogDAC2B[12] |
---|
1522 | PORT analog_DAC2_B13 = analog4_DAC2_B13, IO_IS = analogDAC2B[13] |
---|
1523 | |
---|
1524 | PORT analog_DAC1_sleep = analog4_DAC1_sleep |
---|
1525 | PORT analog_DAC2_sleep = analog4_DAC2_sleep |
---|
1526 | |
---|
1527 | PORT analog_ADC_A0 = analog4_ADC_A0, IO_IS = analogADCA[0] |
---|
1528 | PORT analog_ADC_A1 = analog4_ADC_A1, IO_IS = analogADCA[1] |
---|
1529 | PORT analog_ADC_A2 = analog4_ADC_A2, IO_IS = analogADCA[2] |
---|
1530 | PORT analog_ADC_A3 = analog4_ADC_A3, IO_IS = analogADCA[3] |
---|
1531 | PORT analog_ADC_A4 = analog4_ADC_A4, IO_IS = analogADCA[4] |
---|
1532 | PORT analog_ADC_A5 = analog4_ADC_A5, IO_IS = analogADCA[5] |
---|
1533 | PORT analog_ADC_A6 = analog4_ADC_A6, IO_IS = analogADCA[6] |
---|
1534 | PORT analog_ADC_A7 = analog4_ADC_A7, IO_IS = analogADCA[7] |
---|
1535 | PORT analog_ADC_A8 = analog4_ADC_A8, IO_IS = analogADCA[8] |
---|
1536 | PORT analog_ADC_A9 = analog4_ADC_A9, IO_IS = analogADCA[9] |
---|
1537 | PORT analog_ADC_A10 = analog4_ADC_A10, IO_IS = analogADCA[10] |
---|
1538 | PORT analog_ADC_A11 = analog4_ADC_A11, IO_IS = analogADCA[11] |
---|
1539 | PORT analog_ADC_A12 = analog4_ADC_A12, IO_IS = analogADCA[12] |
---|
1540 | PORT analog_ADC_A13 = analog4_ADC_A13, IO_IS = analogADCA[13] |
---|
1541 | |
---|
1542 | PORT analog_ADC_B0 = analog4_ADC_B0, IO_IS = analogADCB[0] |
---|
1543 | PORT analog_ADC_B1 = analog4_ADC_B1, IO_IS = analogADCB[1] |
---|
1544 | PORT analog_ADC_B2 = analog4_ADC_B2, IO_IS = analogADCB[2] |
---|
1545 | PORT analog_ADC_B3 = analog4_ADC_B3, IO_IS = analogADCB[3] |
---|
1546 | PORT analog_ADC_B4 = analog4_ADC_B4, IO_IS = analogADCB[4] |
---|
1547 | PORT analog_ADC_B5 = analog4_ADC_B5, IO_IS = analogADCB[5] |
---|
1548 | PORT analog_ADC_B6 = analog4_ADC_B6, IO_IS = analogADCB[6] |
---|
1549 | PORT analog_ADC_B7 = analog4_ADC_B7, IO_IS = analogADCB[7] |
---|
1550 | PORT analog_ADC_B8 = analog4_ADC_B8, IO_IS = analogADCB[8] |
---|
1551 | PORT analog_ADC_B9 = analog4_ADC_B9, IO_IS = analogADCB[9] |
---|
1552 | PORT analog_ADC_B10 = analog4_ADC_B10, IO_IS = analogADCB[10] |
---|
1553 | PORT analog_ADC_B11 = analog4_ADC_B11, IO_IS = analogADCB[11] |
---|
1554 | PORT analog_ADC_B12 = analog4_ADC_B12, IO_IS = analogADCB[12] |
---|
1555 | PORT analog_ADC_B13 = analog4_ADC_B13, IO_IS = analogADCB[13] |
---|
1556 | |
---|
1557 | PORT analog_ADC_DFS = analog4_ADC_DFS |
---|
1558 | PORT analog_ADC_DCS = analog4_ADC_DCS |
---|
1559 | PORT analog_ADC_pdwnA = analog4_ADC_pdwnA |
---|
1560 | PORT analog_ADC_pdwnB = analog4_ADC_pdwnB |
---|
1561 | PORT analog_ADC_otrA = analog4_ADC_otrA |
---|
1562 | PORT analog_ADC_otrB = analog4_ADC_otrB |
---|
1563 | |
---|
1564 | PORT analog_LED0 = analog4_LED0, IO_IS = analogLED[0] |
---|
1565 | PORT analog_LED1 = analog4_LED1, IO_IS = analogLED[1] |
---|
1566 | PORT analog_LED2 = analog4_LED2, IO_IS = analogLED[2] |
---|
1567 | |
---|
1568 | END |
---|
1569 | |
---|
1570 | # One user I/O board controller handles a single board |
---|
1571 | # The user can enabled up to four controllers (one per slot) |
---|
1572 | BEGIN IO_INTERFACE |
---|
1573 | ATTRIBUTE IOTYPE = XIL_USERIOBOARD_V1 |
---|
1574 | ATTRIBUTE INSTANCE = user_io_board_controller_slot1 |
---|
1575 | ATTRIBUTE EXCLUSIVE = slot1 |
---|
1576 | |
---|
1577 | #Hardware reset input (same as software reset) |
---|
1578 | PORT reset = userio_board_slot1_reset, IO_IS = userio_board_reset |
---|
1579 | |
---|
1580 | #LCD SPI interface |
---|
1581 | PORT sdi = user_ioboard_slot1_sdi, IO_IS = userio_board_sdi |
---|
1582 | PORT scl = userio_board_slot1_scl, IO_IS = userio_board_scl |
---|
1583 | PORT resetlcd = userio_board_slot1_resetlcd, IO_IS = userio_board_resetlcd |
---|
1584 | PORT cs = userio_board_slot1_cs, IO_IS = userio_board_cs |
---|
1585 | |
---|
1586 | #Buzzer output |
---|
1587 | PORT buzzer = userio_board_slot1_buzzer, IO_IS = userio_board_buzzer |
---|
1588 | |
---|
1589 | #Trackball I/O |
---|
1590 | PORT trackball_yscn = userio_board_slot1_trackball_yscn, IO_IS = userio_board_trackball_yscn |
---|
1591 | PORT trackball_sel1 = userio_board_slot1_trackball_sel1, IO_IS = userio_board_trackball_sel1 |
---|
1592 | PORT trackball_xscn = userio_board_slot1_trackball_xscn, IO_IS = userio_board_trackball_xscn |
---|
1593 | PORT trackball_sel2 = userio_board_slot1_trackball_sel2, IO_IS = userio_board_trackball_sel2 |
---|
1594 | PORT trackball_oyn = userio_board_slot1_trackball_oyn, IO_IS = userio_board_trackball_oyn |
---|
1595 | PORT trackball_oy = userio_board_slot1_trackball_oy, IO_IS = userio_board_trackball_oy |
---|
1596 | PORT trackball_oxn = userio_board_slot1_trackball_oxn, IO_IS = userio_board_trackball_oxn |
---|
1597 | PORT trackball_ox = userio_board_slot1_trackball_ox, IO_IS = userio_board_trackball_ox |
---|
1598 | |
---|
1599 | #Eight LEDs |
---|
1600 | PORT leds_0 = userio_board_slot1_leds_0, IO_IS = userio_board_leds[0] |
---|
1601 | PORT leds_1 = userio_board_slot1_leds_1, IO_IS = userio_board_leds[1] |
---|
1602 | PORT leds_2 = userio_board_slot1_leds_2, IO_IS = userio_board_leds[2] |
---|
1603 | PORT leds_3 = userio_board_slot1_leds_3, IO_IS = userio_board_leds[3] |
---|
1604 | PORT leds_4 = userio_board_slot1_leds_4, IO_IS = userio_board_leds[4] |
---|
1605 | PORT leds_5 = userio_board_slot1_leds_5, IO_IS = userio_board_leds[5] |
---|
1606 | PORT leds_6 = userio_board_slot1_leds_6, IO_IS = userio_board_leds[6] |
---|
1607 | PORT leds_7 = userio_board_slot1_leds_7, IO_IS = userio_board_leds[7] |
---|
1608 | |
---|
1609 | #DIP switch |
---|
1610 | PORT dip_switch_0 = userio_board_slot1_dip_switch_0, IO_IS = userio_board_dip_switch[0] |
---|
1611 | PORT dip_switch_1 = userio_board_slot1_dip_switch_1, IO_IS = userio_board_dip_switch[1] |
---|
1612 | PORT dip_switch_2 = userio_board_slot1_dip_switch_2, IO_IS = userio_board_dip_switch[2] |
---|
1613 | PORT dip_switch_3 = userio_board_slot1_dip_switch_3, IO_IS = userio_board_dip_switch[3] |
---|
1614 | |
---|
1615 | #Six small push buttons |
---|
1616 | PORT buttons_small_0 = userio_board_slot1_buttons_small_0, IO_IS = userio_board_buttons_small[0] |
---|
1617 | PORT buttons_small_1 = userio_board_slot1_buttons_small_1, IO_IS = userio_board_buttons_small[1] |
---|
1618 | PORT buttons_small_2 = userio_board_slot1_buttons_small_2, IO_IS = userio_board_buttons_small[2] |
---|
1619 | PORT buttons_small_3 = userio_board_slot1_buttons_small_3, IO_IS = userio_board_buttons_small[3] |
---|
1620 | PORT buttons_small_4 = userio_board_slot1_buttons_small_4, IO_IS = userio_board_buttons_small[4] |
---|
1621 | PORT buttons_small_5 = userio_board_slot1_buttons_small_5, IO_IS = userio_board_buttons_small[5] |
---|
1622 | |
---|
1623 | #Two big push buttons |
---|
1624 | PORT buttons_big_0 = userio_board_slot1_buttons_big_0, IO_IS = userio_board_buttons_big[0] |
---|
1625 | PORT buttons_big_1 = userio_board_slot1_buttons_big_1, IO_IS = userio_board_buttons_big[1] |
---|
1626 | END |
---|
1627 | |
---|
1628 | # EEPROM Serial Number and Memory interface |
---|
1629 | BEGIN IO_INTERFACE |
---|
1630 | ATTRIBUTE IOTYPE = WARP_EEPROM_V1 |
---|
1631 | ATTRIBUTE INSTANCE = eeprom_controller |
---|
1632 | PORT DQ0 = EEPROM_0_DQ0, INITIALVAL = VCC |
---|
1633 | # PORT DQ0_T = |
---|
1634 | # PORT DQ0_O = |
---|
1635 | # PORT DQ0_I = |
---|
1636 | |
---|
1637 | # PORT DQ1 = |
---|
1638 | PORT DQ1_T = DQ1_T_user_EEPROM_IO_T |
---|
1639 | PORT DQ1_O = DQ1_O_user_EEPROM_IO_O |
---|
1640 | PORT DQ1_I = DQ1_I_user_EEPROM_IO_I, INITIALVAL = VCC |
---|
1641 | |
---|
1642 | # PORT DQ2 = |
---|
1643 | PORT DQ2_T = DQ2_T_user_EEPROM_IO_T |
---|
1644 | PORT DQ2_O = DQ2_O_user_EEPROM_IO_O |
---|
1645 | PORT DQ2_I = DQ2_I_user_EEPROM_IO_I, INITIALVAL = VCC |
---|
1646 | |
---|
1647 | # PORT DQ3 = |
---|
1648 | PORT DQ3_T = DQ3_T_user_EEPROM_IO_T |
---|
1649 | PORT DQ3_O = DQ3_O_user_EEPROM_IO_O |
---|
1650 | PORT DQ3_I = DQ3_I_user_EEPROM_IO_I, INITIALVAL = VCC |
---|
1651 | |
---|
1652 | # PORT DQ4 = |
---|
1653 | PORT DQ4_T = DQ4_T_user_EEPROM_IO_T |
---|
1654 | PORT DQ4_O = DQ4_O_user_EEPROM_IO_O |
---|
1655 | PORT DQ4_I = DQ4_I_user_EEPROM_IO_I, INITIALVAL = VCC |
---|
1656 | |
---|
1657 | # PORT DQ5 = |
---|
1658 | # PORT DQ5_T = |
---|
1659 | # PORT DQ5_O = |
---|
1660 | PORT DQ5_I = "net_vcc" |
---|
1661 | |
---|
1662 | # PORT DQ6 = |
---|
1663 | # PORT DQ6_T = |
---|
1664 | # PORT DQ6_O = |
---|
1665 | PORT DQ6_I = "net_vcc" |
---|
1666 | |
---|
1667 | # PORT DQ7 = |
---|
1668 | # PORT DQ7_T = |
---|
1669 | # PORT DQ7_O = |
---|
1670 | PORT DQ7_I = "net_vcc" |
---|
1671 | END |
---|
1672 | |
---|
1673 | |
---|
1674 | # This is the FPGA definition. First characterize the processor. |
---|
1675 | BEGIN FPGA |
---|
1676 | ATTRIBUTE INSTANCE = fpga_0 |
---|
1677 | ATTRIBUTE FAMILY = virtex4 |
---|
1678 | ATTRIBUTE DEVICE = XC4VFX100 |
---|
1679 | ATTRIBUTE PACKAGE = FF1517 |
---|
1680 | ATTRIBUTE SPEED_GRADE = -11 |
---|
1681 | ATTRIBUTE JTAG_POSITION = 2 #SysaceCF is in position 1 |
---|
1682 | |
---|
1683 | ### Clock ### Use the same port connection names as defined above. |
---|
1684 | PORT CLK_100 = CLK_100MHZ_OSC, UCF_NET_STRING=("LOC=AM21", "IOSTANDARD = LVTTL") |
---|
1685 | PORT CLK_40 = CLK_40MHZ_OSC, UCF_NET_STRING=("LOC=AN20", "IOSTANDARD = LVTTL") |
---|
1686 | # PORT CLK_1 = CLK_X_OSC, UCF_NET_STRING=("LOC=AL20", "IOSTANDARD = LVTTL") |
---|
1687 | |
---|
1688 | ### RESET ### #Down push button |
---|
1689 | PORT RESET = CONN_INIT_INIT, UCF_NET_STRING=("LOC=M21", "IOSTANDARD = LVCMOS25") |
---|
1690 | |
---|
1691 | ### LED ### |
---|
1692 | PORT LED0 = CONN_LEDs_LED0, UCF_NET_STRING=("LOC=N24", "IOSTANDARD = LVCMOS25") |
---|
1693 | PORT LED1 = CONN_LEDs_LED1, UCF_NET_STRING=("LOC=N20", "IOSTANDARD = LVCMOS25") |
---|
1694 | PORT LED2 = CONN_LEDs_LED2, UCF_NET_STRING=("LOC=L18", "IOSTANDARD = LVCMOS25") |
---|
1695 | PORT LED3 = CONN_LEDs_LED3, UCF_NET_STRING=("LOC=N18", "IOSTANDARD = LVCMOS25") |
---|
1696 | PORT LED4 = CONN_LEDs_LED4, UCF_NET_STRING=("LOC=M18", "IOSTANDARD = LVCMOS25") |
---|
1697 | PORT LED5 = CONN_LEDs_LED5, UCF_NET_STRING=("LOC=M25", "IOSTANDARD = LVCMOS25") |
---|
1698 | PORT LED6 = CONN_LEDs_LED6, UCF_NET_STRING=("LOC=N19", "IOSTANDARD = LVCMOS25") |
---|
1699 | PORT LED7 = CONN_LEDs_LED7, UCF_NET_STRING=("LOC=P19", "IOSTANDARD = LVCMOS25") |
---|
1700 | |
---|
1701 | ### PUSH BUTTONS ### |
---|
1702 | PORT PUSHU = CONN_PUSHU, UCF_NET_STRING=("LOC=N23", "IOSTANDARD = LVCMOS25") |
---|
1703 | PORT PUSHL = CONN_PUSHL, UCF_NET_STRING=("LOC=N22", "IOSTANDARD = LVCMOS25") |
---|
1704 | PORT PUSHR = CONN_PUSHR, UCF_NET_STRING=("LOC=M23", "IOSTANDARD = LVCMOS25") |
---|
1705 | PORT PUSHC = CONN_PUSHC, UCF_NET_STRING=("LOC=L23", "IOSTANDARD = LVCMOS25") |
---|
1706 | |
---|
1707 | ### IO Expander ### |
---|
1708 | PORT IIC_CLK = iic_scl, UCF_NET_STRING=("LOC=AK17", "IOSTANDARD = LVTTL") |
---|
1709 | PORT IIC_DATA = iic_sda, UCF_NET_STRING=("LOC=AL18", "IOSTANDARD = LVTTL") |
---|
1710 | |
---|
1711 | ### UART #0 ### |
---|
1712 | PORT RXD_DB9 = CONN_RXD_DB9, UCF_NET_STRING=("LOC=L24", "IOSTANDARD = LVCMOS25") |
---|
1713 | PORT TXD_DB9 = CONN_TXD_DB9, UCF_NET_STRING=("LOC=K24", "IOSTANDARD = LVCMOS25") |
---|
1714 | |
---|
1715 | ### UART #1 ### |
---|
1716 | PORT RXD_USB = CONN_RXD_USB, UCF_NET_STRING=("LOC=C23", "IOSTANDARD = LVTTL") |
---|
1717 | PORT TXD_USB = CONN_TXD_USB, UCF_NET_STRING=("LOC=AA23", "IOSTANDARD = LVTTL") |
---|
1718 | |
---|
1719 | ### SYSACE FLASH ### |
---|
1720 | PORT SYSACE_CLK = sysace_clk, UCF_NET_STRING=("LOC=AJ21", "IOSTANDARD = LVTTL") # Input CLK |
---|
1721 | PORT MPA00 = sysace_mpa_0, UCF_NET_STRING=("LOC=AJ16", "IOSTANDARD = LVTTL") |
---|
1722 | PORT MPA01 = sysace_mpa_1, UCF_NET_STRING=("LOC=AH17", "IOSTANDARD = LVTTL") |
---|
1723 | PORT MPA02 = sysace_mpa_2, UCF_NET_STRING=("LOC=AN18", "IOSTANDARD = LVTTL") |
---|
1724 | PORT MPA03 = sysace_mpa_3, UCF_NET_STRING=("LOC=AL19", "IOSTANDARD = LVTTL") |
---|
1725 | PORT MPA04 = sysace_mpa_4, UCF_NET_STRING=("LOC=AM16", "IOSTANDARD = LVTTL") |
---|
1726 | PORT MPA05 = sysace_mpa_5, UCF_NET_STRING=("LOC=AJ19", "IOSTANDARD = LVTTL") |
---|
1727 | PORT MPA06 = sysace_mpa_6, UCF_NET_STRING=("LOC=AL16", "IOSTANDARD = LVTTL") |
---|
1728 | PORT MPD00 = sysace_mpd_0, UCF_NET_STRING=("LOC=AR17", "IOSTANDARD = LVTTL") |
---|
1729 | PORT MPD01 = sysace_mpd_1, UCF_NET_STRING=("LOC=AP17", "IOSTANDARD = LVTTL") |
---|
1730 | PORT MPD02 = sysace_mpd_2, UCF_NET_STRING=("LOC=AM18", "IOSTANDARD = LVTTL") |
---|
1731 | PORT MPD03 = sysace_mpd_3, UCF_NET_STRING=("LOC=AK19", "IOSTANDARD = LVTTL") |
---|
1732 | PORT MPD04 = sysace_mpd_4, UCF_NET_STRING=("LOC=AJ20", "IOSTANDARD = LVTTL") |
---|
1733 | PORT MPD05 = sysace_mpd_5, UCF_NET_STRING=("LOC=AN17", "IOSTANDARD = LVTTL") |
---|
1734 | PORT MPD06 = sysace_mpd_6, UCF_NET_STRING=("LOC=AM17", "IOSTANDARD = LVTTL") |
---|
1735 | PORT MPD07 = sysace_mpd_7, UCF_NET_STRING=("LOC=AH15", "IOSTANDARD = LVTTL") |
---|
1736 | PORT MPCE = sysace_mpce, UCF_NET_STRING=("LOC=AK16", "IOSTANDARD = LVTTL") |
---|
1737 | PORT MPOE = sysace_mpoe, UCF_NET_STRING=("LOC=AJ17", "IOSTANDARD = LVTTL") |
---|
1738 | PORT MPWE = sysace_mpwe, UCF_NET_STRING=("LOC=AR18", "IOSTANDARD = LVTTL") |
---|
1739 | PORT MPIRQ = sysace_mpirq, UCF_NET_STRING=("LOC=AG17", "IOSTANDARD = LVTTL") |
---|
1740 | |
---|
1741 | ### 4 Dip Switchs ### |
---|
1742 | PORT SW_0 = SW_0, UCF_NET_STRING=("LOC=M17", "IOSTANDARD = LVCMOS25") |
---|
1743 | PORT SW_1 = SW_1, UCF_NET_STRING=("LOC=R18", "IOSTANDARD = LVCMOS25") |
---|
1744 | PORT SW_2 = SW_2, UCF_NET_STRING=("LOC=P17", "IOSTANDARD = LVCMOS25") |
---|
1745 | PORT SW_3 = SW_3, UCF_NET_STRING=("LOC=M16", "IOSTANDARD = LVCMOS25") |
---|
1746 | |
---|
1747 | ### TEMAC ### |
---|
1748 | # hard_temac ports |
---|
1749 | PORT GMII_TXD_0_7 = GMII_TXD_0_7_s, UCF_NET_STRING=("LOC = K16", "IOSTANDARD = LVCMOS25") |
---|
1750 | PORT GMII_TXD_0_6 = GMII_TXD_0_6_s, UCF_NET_STRING=("LOC = H17", "IOSTANDARD = LVCMOS25") |
---|
1751 | PORT GMII_TXD_0_5 = GMII_TXD_0_5_s, UCF_NET_STRING=("LOC = J17", "IOSTANDARD = LVCMOS25") |
---|
1752 | PORT GMII_TXD_0_4 = GMII_TXD_0_4_s, UCF_NET_STRING=("LOC = J16", "IOSTANDARD = LVCMOS25") |
---|
1753 | PORT GMII_TXD_0_3 = GMII_TXD_0_3_s, UCF_NET_STRING=("LOC = G15", "IOSTANDARD = LVCMOS25") |
---|
1754 | PORT GMII_TXD_0_2 = GMII_TXD_0_2_s, UCF_NET_STRING=("LOC = K17", "IOSTANDARD = LVCMOS25") |
---|
1755 | PORT GMII_TXD_0_1 = GMII_TXD_0_1_s, UCF_NET_STRING=("LOC = E17", "IOSTANDARD = LVCMOS25") |
---|
1756 | PORT GMII_TXD_0_0 = GMII_TXD_0_0_s, UCF_NET_STRING=("LOC = D17", "IOSTANDARD = LVCMOS25") |
---|
1757 | PORT GMII_TX_EN_0 = GMII_TX_EN_0_s, UCF_NET_STRING=("LOC = C18", "IOSTANDARD = LVCMOS25") |
---|
1758 | PORT GMII_TX_ER_0 = GMII_TX_ER_0_s, UCF_NET_STRING=("LOC = K18", "IOSTANDARD = LVCMOS25") |
---|
1759 | PORT GMII_TX_CLK_0 = GMII_TX_CLK_0_s, UCF_NET_STRING=("LOC = F21", "IOSTANDARD = LVCMOS25") |
---|
1760 | PORT GMII_RXD_0_7 = GMII_RXD_0_7_s, UCF_NET_STRING=("LOC = G21", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1761 | PORT GMII_RXD_0_6 = GMII_RXD_0_6_s, UCF_NET_STRING=("LOC = E23", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1762 | PORT GMII_RXD_0_5 = GMII_RXD_0_5_s, UCF_NET_STRING=("LOC = G23", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1763 | PORT GMII_RXD_0_4 = GMII_RXD_0_4_s, UCF_NET_STRING=("LOC = J24", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1764 | PORT GMII_RXD_0_3 = GMII_RXD_0_3_s, UCF_NET_STRING=("LOC = H22", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1765 | PORT GMII_RXD_0_2 = GMII_RXD_0_2_s, UCF_NET_STRING=("LOC = E22", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1766 | PORT GMII_RXD_0_1 = GMII_RXD_0_1_s, UCF_NET_STRING=("LOC = E21", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1767 | PORT GMII_RXD_0_0 = GMII_RXD_0_0_s, UCF_NET_STRING=("LOC = K23", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1768 | PORT GMII_RX_DV_0 = GMII_RX_DV_0_s, UCF_NET_STRING=("LOC = H23", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1769 | PORT GMII_RX_ER_0 = GMII_RX_ER_0_s, UCF_NET_STRING=("LOC = F23", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1770 | PORT GMII_RX_CLK_0 = GMII_RX_CLK_0_s, UCF_NET_STRING=("LOC = J22", "IOSTANDARD = LVCMOS25") |
---|
1771 | PORT MII_TX_CLK_0 = MII_TX_CLK_0_s, UCF_NET_STRING=("LOC = G22", "PERIOD = 40 ns", "MAXSKEW= 1.0 ns", "IOSTANDARD = LVCMOS25") |
---|
1772 | PORT GMII_COL_0 = GMII_COL_0_s, UCF_NET_STRING=("LOC = G17", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1773 | PORT GMII_CRS_0 = GMII_CRS_0_s, UCF_NET_STRING=("LOC = H24", "IOBDELAY=NONE", "IOSTANDARD = LVCMOS25") |
---|
1774 | PORT MDIO_0 = MDIO_0_s, UCF_NET_STRING=("LOC = L16", "IOSTANDARD = LVCMOS25") |
---|
1775 | PORT MDC_0 = MDC_0_s, UCF_NET_STRING=("LOC = H15", "IOSTANDARD = LVCMOS25") |
---|
1776 | # plb_temac ports |
---|
1777 | PORT PhyResetN = phy_rst_n_s, UCF_NET_STRING=("LOC = C17", "TIG", "IOSTANDARD = LVCMOS25") |
---|
1778 | |
---|
1779 | ### Clock Board Configurator ### |
---|
1780 | PORT clk_board_radio_DO = clk_board_radio_DO, UCF_NET_STRING=("LOC=AN19", "IOSTANDARD=LVTTL", "SLEW = SLOW") |
---|
1781 | PORT clk_board_radio_CS = clk_board_radio_CS, UCF_NET_STRING=("LOC=AP19", "IOSTANDARD=LVTTL", "SLEW = SLOW") |
---|
1782 | PORT clk_board_radio_EN = clk_board_radio_EN, UCF_NET_STRING=("LOC=AR19", "IOSTANDARD=LVTTL", "SLEW = SLOW") |
---|
1783 | PORT clk_board_radio_CLK = clk_board_radio_CLK, UCF_NET_STRING=("LOC=AM20", "IOSTANDARD=LVTTL", "SLEW = SLOW") |
---|
1784 | PORT clk_board_logic_DO = clk_board_logic_DO, UCF_NET_STRING=("LOC=AR21", "IOSTANDARD=LVTTL", "SLEW = SLOW") |
---|
1785 | PORT clk_board_logic_CS = clk_board_logic_CS, UCF_NET_STRING=("LOC=AL21", "IOSTANDARD=LVTTL", "SLEW = SLOW") |
---|
1786 | PORT clk_board_logic_EN = clk_board_logic_EN, UCF_NET_STRING=("LOC=AK21", "IOSTANDARD=LVTTL", "SLEW = SLOW") |
---|
1787 | PORT clk_board_logic_CLK = clk_board_logic_CLK, UCF_NET_STRING=("LOC=AN22", "IOSTANDARD=LVTTL", "SLEW = SLOW") |
---|
1788 | |
---|
1789 | # ### DDR2 256MB ### |
---|
1790 | # PORT ddr2_256mb_ODT = ddr2_256mb_odt, UCF_NET_STRING=("LOC=AT16", "IOSTANDARD = SSTL18_I") |
---|
1791 | # PORT ddr2_256mb_ADDR0 = ddr2_256mb_addr_0, UCF_NET_STRING=("LOC=AH13", "IOSTANDARD = SSTL18_I") |
---|
1792 | # PORT ddr2_256mb_ADDR1 = ddr2_256mb_addr_1, UCF_NET_STRING=("LOC=AR16", "IOSTANDARD = SSTL18_I") |
---|
1793 | # PORT ddr2_256mb_ADDR2 = ddr2_256mb_addr_2, UCF_NET_STRING=("LOC=AH14", "IOSTANDARD = SSTL18_I") |
---|
1794 | # PORT ddr2_256mb_ADDR3 = ddr2_256mb_addr_3, UCF_NET_STRING=("LOC=AU13", "IOSTANDARD = SSTL18_I") |
---|
1795 | # PORT ddr2_256mb_ADDR4 = ddr2_256mb_addr_4, UCF_NET_STRING=("LOC=AP25", "IOSTANDARD = SSTL18_I") |
---|
1796 | # PORT ddr2_256mb_ADDR5 = ddr2_256mb_addr_5, UCF_NET_STRING=("LOC=AN30", "IOSTANDARD = SSTL18_I") |
---|
1797 | # PORT ddr2_256mb_ADDR6 = ddr2_256mb_addr_6, UCF_NET_STRING=("LOC=AR29", "IOSTANDARD = SSTL18_I") |
---|
1798 | # PORT ddr2_256mb_ADDR7 = ddr2_256mb_addr_7, UCF_NET_STRING=("LOC=AT29", "IOSTANDARD = SSTL18_I") |
---|
1799 | # PORT ddr2_256mb_ADDR8 = ddr2_256mb_addr_8, UCF_NET_STRING=("LOC=AL30", "IOSTANDARD = SSTL18_I") |
---|
1800 | # PORT ddr2_256mb_ADDR9 = ddr2_256mb_addr_9, UCF_NET_STRING=("LOC=AP30", "IOSTANDARD = SSTL18_I") |
---|
1801 | # PORT ddr2_256mb_ADDR10 = ddr2_256mb_addr_10, UCF_NET_STRING=("LOC=AM30", "IOSTANDARD = SSTL18_I") |
---|
1802 | # PORT ddr2_256mb_ADDR11 = ddr2_256mb_addr_11, UCF_NET_STRING=("LOC=AL29", "IOSTANDARD = SSTL18_I") |
---|
1803 | # PORT ddr2_256mb_ADDR12 = ddr2_256mb_addr_12, UCF_NET_STRING=("LOC=AN29", "IOSTANDARD = SSTL18_I") |
---|
1804 | # PORT ddr2_256mb_BANKADDR0 = ddr2_256mb_bankaddr_0, UCF_NET_STRING=("LOC=AP14", "IOSTANDARD = SSTL18_I") |
---|
1805 | # PORT ddr2_256mb_BANKADDR1 = ddr2_256mb_bankaddr_1, UCF_NET_STRING=("LOC=AN13", "IOSTANDARD = SSTL18_I") |
---|
1806 | # PORT ddr2_256mb_CASN = ddr2_256mb_casn, UCF_NET_STRING=("LOC=AU12", "IOSTANDARD = SSTL18_I") |
---|
1807 | # # PORT ddr2_256mb_CKE1 = ddr2_256mb_cke_1, UCF_NET_STRING=("LOC=AK11", "IOSTANDARD = SSTL18_I") |
---|
1808 | # PORT ddr2_256mb_CKE0 = ddr2_256mb_cke_0, UCF_NET_STRING=("LOC=AP16", "IOSTANDARD = SSTL18_I") |
---|
1809 | # # PORT ddr2_256mb_CSN1 = ddr2_256mb_csn_1, UCF_NET_STRING=("LOC=AT13", "IOSTANDARD = SSTL18_I") |
---|
1810 | # PORT ddr2_256mb_CSN0 = ddr2_256mb_csn_0, UCF_NET_STRING=("LOC=AK14", "IOSTANDARD = SSTL18_I") |
---|
1811 | # PORT ddr2_256mb_RASN = ddr2_256mb_rasn, UCF_NET_STRING=("LOC=AJ11", "IOSTANDARD = SSTL18_I") |
---|
1812 | # PORT ddr2_256mb_WEN = ddr2_256mb_wen, UCF_NET_STRING=("LOC=AR13", "IOSTANDARD = SSTL18_I") |
---|
1813 | # PORT ddr2_256mb_DM0 = ddr2_256mb_dm_0, UCF_NET_STRING=("LOC=AU36", "IOSTANDARD = SSTL18_I") |
---|
1814 | # PORT ddr2_256mb_DM1 = ddr2_256mb_dm_1, UCF_NET_STRING=("LOC=AR34", "IOSTANDARD = SSTL18_I") |
---|
1815 | # PORT ddr2_256mb_DM2 = ddr2_256mb_dm_2, UCF_NET_STRING=("LOC=AK31", "IOSTANDARD = SSTL18_I") |
---|
1816 | # PORT ddr2_256mb_DM3 = ddr2_256mb_dm_3, UCF_NET_STRING=("LOC=AN28", "IOSTANDARD = SSTL18_I") |
---|
1817 | # PORT ddr2_256mb_DM4 = ddr2_256mb_dm_4, UCF_NET_STRING=("LOC=AU16", "IOSTANDARD = SSTL18_I") |
---|
1818 | # PORT ddr2_256mb_DM5 = ddr2_256mb_dm_5, UCF_NET_STRING=("LOC=AP12", "IOSTANDARD = SSTL18_I") |
---|
1819 | # PORT ddr2_256mb_DM6 = ddr2_256mb_dm_6, UCF_NET_STRING=("LOC=AP15", "IOSTANDARD = SSTL18_I") |
---|
1820 | # PORT ddr2_256mb_DM7 = ddr2_256mb_dm_7, UCF_NET_STRING=("LOC=AJ12", "IOSTANDARD = SSTL18_I") |
---|
1821 | # PORT ddr2_256mb_DQS0 = ddr2_256mb_dqs_0, UCF_NET_STRING=("LOC=AU26", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1822 | # PORT ddr2_256mb_DQS1 = ddr2_256mb_dqs_1, UCF_NET_STRING=("LOC=AT35", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1823 | # PORT ddr2_256mb_DQS2 = ddr2_256mb_dqs_2, UCF_NET_STRING=("LOC=AM28", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1824 | # PORT ddr2_256mb_DQS3 = ddr2_256mb_dqs_3, UCF_NET_STRING=("LOC=AT31", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1825 | # PORT ddr2_256mb_DQS4 = ddr2_256mb_dqs_4, UCF_NET_STRING=("LOC=AN8", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1826 | # PORT ddr2_256mb_DQS5 = ddr2_256mb_dqs_5, UCF_NET_STRING=("LOC=AT15", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1827 | # PORT ddr2_256mb_DQS6 = ddr2_256mb_dqs_6, UCF_NET_STRING=("LOC=AT11", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1828 | # PORT ddr2_256mb_DQS7 = ddr2_256mb_dqs_7, UCF_NET_STRING=("LOC=AL13", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1829 | # PORT ddr2_256mb_DQSn0 = ddr2_256mb_dqsn_0, UCF_NET_STRING=("LOC=AT26", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1830 | # PORT ddr2_256mb_DQSn1 = ddr2_256mb_dqsn_1, UCF_NET_STRING=("LOC=AU35", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1831 | # PORT ddr2_256mb_DQSn2 = ddr2_256mb_dqsn_2, UCF_NET_STRING=("LOC=AL28", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1832 | # PORT ddr2_256mb_DQSn3 = ddr2_256mb_dqsn_3, UCF_NET_STRING=("LOC=AU31", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1833 | # PORT ddr2_256mb_DQSn4 = ddr2_256mb_dqsn_4, UCF_NET_STRING=("LOC=AN7", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1834 | # PORT ddr2_256mb_DQSn5 = ddr2_256mb_dqsn_5, UCF_NET_STRING=("LOC=AU15", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1835 | # PORT ddr2_256mb_DQSn6 = ddr2_256mb_dqsn_6, UCF_NET_STRING=("LOC=AU11", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1836 | # PORT ddr2_256mb_DQSn7 = ddr2_256mb_dqsn_7, UCF_NET_STRING=("LOC=AM13", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1837 | # PORT ddr2_256mb_DQ0 = ddr2_256mb_dq_0, UCF_NET_STRING=("LOC=AR27", "IOSTANDARD = SSTL18_I") |
---|
1838 | # PORT ddr2_256mb_DQ1 = ddr2_256mb_dq_1, UCF_NET_STRING=("LOC=AR26", "IOSTANDARD = SSTL18_I") |
---|
1839 | # PORT ddr2_256mb_DQ2 = ddr2_256mb_dq_2, UCF_NET_STRING=("LOC=AM26", "IOSTANDARD = SSTL18_I") |
---|
1840 | # PORT ddr2_256mb_DQ3 = ddr2_256mb_dq_3, UCF_NET_STRING=("LOC=AT24", "IOSTANDARD = SSTL18_I") |
---|
1841 | # PORT ddr2_256mb_DQ4 = ddr2_256mb_dq_4, UCF_NET_STRING=("LOC=AP37", "IOSTANDARD = SSTL18_I") |
---|
1842 | # PORT ddr2_256mb_DQ5 = ddr2_256mb_dq_5, UCF_NET_STRING=("LOC=AR37", "IOSTANDARD = SSTL18_I") |
---|
1843 | # PORT ddr2_256mb_DQ6 = ddr2_256mb_dq_6, UCF_NET_STRING=("LOC=AP32", "IOSTANDARD = SSTL18_I") |
---|
1844 | # PORT ddr2_256mb_DQ7 = ddr2_256mb_dq_7, UCF_NET_STRING=("LOC=AT36", "IOSTANDARD = SSTL18_I") |
---|
1845 | # PORT ddr2_256mb_DQ8 = ddr2_256mb_dq_8, UCF_NET_STRING=("LOC=AR33", "IOSTANDARD = SSTL18_I") |
---|
1846 | # PORT ddr2_256mb_DQ9 = ddr2_256mb_dq_9, UCF_NET_STRING=("LOC=AR24", "IOSTANDARD = SSTL18_I") |
---|
1847 | # PORT ddr2_256mb_DQ10 = ddr2_256mb_dq_10, UCF_NET_STRING=("LOC=AM32", "IOSTANDARD = SSTL18_I") |
---|
1848 | # PORT ddr2_256mb_DQ11 = ddr2_256mb_dq_11, UCF_NET_STRING=("LOC=AN32", "IOSTANDARD = SSTL18_I") |
---|
1849 | # PORT ddr2_256mb_DQ12 = ddr2_256mb_dq_12, UCF_NET_STRING=("LOC=AR36", "IOSTANDARD = SSTL18_I") |
---|
1850 | # PORT ddr2_256mb_DQ13 = ddr2_256mb_dq_13, UCF_NET_STRING=("LOC=AT34", "IOSTANDARD = SSTL18_I") |
---|
1851 | # PORT ddr2_256mb_DQ14 = ddr2_256mb_dq_14, UCF_NET_STRING=("LOC=AP36", "IOSTANDARD = SSTL18_I") |
---|
1852 | # PORT ddr2_256mb_DQ15 = ddr2_256mb_dq_15, UCF_NET_STRING=("LOC=AP26", "IOSTANDARD = SSTL18_I") |
---|
1853 | # PORT ddr2_256mb_DQ16 = ddr2_256mb_dq_16, UCF_NET_STRING=("LOC=AM31", "IOSTANDARD = SSTL18_I") |
---|
1854 | # PORT ddr2_256mb_DQ17 = ddr2_256mb_dq_17, UCF_NET_STRING=("LOC=AL31", "IOSTANDARD = SSTL18_I") |
---|
1855 | # PORT ddr2_256mb_DQ18 = ddr2_256mb_dq_18, UCF_NET_STRING=("LOC=AU28", "IOSTANDARD = SSTL18_I") |
---|
1856 | # PORT ddr2_256mb_DQ19 = ddr2_256mb_dq_19, UCF_NET_STRING=("LOC=AP24", "IOSTANDARD = SSTL18_I") |
---|
1857 | # PORT ddr2_256mb_DQ20 = ddr2_256mb_dq_20, UCF_NET_STRING=("LOC=AR32", "IOSTANDARD = SSTL18_I") |
---|
1858 | # PORT ddr2_256mb_DQ21 = ddr2_256mb_dq_21, UCF_NET_STRING=("LOC=AP31", "IOSTANDARD = SSTL18_I") |
---|
1859 | # PORT ddr2_256mb_DQ22 = ddr2_256mb_dq_22, UCF_NET_STRING=("LOC=AU33", "IOSTANDARD = SSTL18_I") |
---|
1860 | # PORT ddr2_256mb_DQ23 = ddr2_256mb_dq_23, UCF_NET_STRING=("LOC=AM27", "IOSTANDARD = SSTL18_I") |
---|
1861 | # PORT ddr2_256mb_DQ24 = ddr2_256mb_dq_24, UCF_NET_STRING=("LOC=AT33", "IOSTANDARD = SSTL18_I") |
---|
1862 | # PORT ddr2_256mb_DQ25 = ddr2_256mb_dq_25, UCF_NET_STRING=("LOC=AU27", "IOSTANDARD = SSTL18_I") |
---|
1863 | # PORT ddr2_256mb_DQ26 = ddr2_256mb_dq_26, UCF_NET_STRING=("LOC=AN27", "IOSTANDARD = SSTL18_I") |
---|
1864 | # PORT ddr2_256mb_DQ27 = ddr2_256mb_dq_27, UCF_NET_STRING=("LOC=AR31", "IOSTANDARD = SSTL18_I") |
---|
1865 | # PORT ddr2_256mb_DQ28 = ddr2_256mb_dq_28, UCF_NET_STRING=("LOC=AU32", "IOSTANDARD = SSTL18_I") |
---|
1866 | # PORT ddr2_256mb_DQ29 = ddr2_256mb_dq_29, UCF_NET_STRING=("LOC=AU30", "IOSTANDARD = SSTL18_I") |
---|
1867 | # PORT ddr2_256mb_DQ30 = ddr2_256mb_dq_30, UCF_NET_STRING=("LOC=AT30", "IOSTANDARD = SSTL18_I") |
---|
1868 | # PORT ddr2_256mb_DQ31 = ddr2_256mb_dq_31, UCF_NET_STRING=("LOC=AT28", "IOSTANDARD = SSTL18_I") |
---|
1869 | # PORT ddr2_256mb_DQ32 = ddr2_256mb_dq_32, UCF_NET_STRING=("LOC=AR11", "IOSTANDARD = SSTL18_I") |
---|
1870 | # PORT ddr2_256mb_DQ33 = ddr2_256mb_dq_33, UCF_NET_STRING=("LOC=AL10", "IOSTANDARD = SSTL18_I") |
---|
1871 | # PORT ddr2_256mb_DQ34 = ddr2_256mb_dq_34, UCF_NET_STRING=("LOC=AP10", "IOSTANDARD = SSTL18_I") |
---|
1872 | # PORT ddr2_256mb_DQ35 = ddr2_256mb_dq_35, UCF_NET_STRING=("LOC=AR8", "IOSTANDARD = SSTL18_I") |
---|
1873 | # PORT ddr2_256mb_DQ36 = ddr2_256mb_dq_36, UCF_NET_STRING=("LOC=AT18", "IOSTANDARD = SSTL18_I") |
---|
1874 | # PORT ddr2_256mb_DQ37 = ddr2_256mb_dq_37, UCF_NET_STRING=("LOC=AU17", "IOSTANDARD = SSTL18_I") |
---|
1875 | # PORT ddr2_256mb_DQ38 = ddr2_256mb_dq_38, UCF_NET_STRING=("LOC=AH12", "IOSTANDARD = SSTL18_I") |
---|
1876 | # PORT ddr2_256mb_DQ39 = ddr2_256mb_dq_39, UCF_NET_STRING=("LOC=AR14", "IOSTANDARD = SSTL18_I") |
---|
1877 | # PORT ddr2_256mb_DQ40 = ddr2_256mb_dq_40, UCF_NET_STRING=("LOC=AR12", "IOSTANDARD = SSTL18_I") |
---|
1878 | # PORT ddr2_256mb_DQ41 = ddr2_256mb_dq_41, UCF_NET_STRING=("LOC=AP7", "IOSTANDARD = SSTL18_I") |
---|
1879 | # PORT ddr2_256mb_DQ42 = ddr2_256mb_dq_42, UCF_NET_STRING=("LOC=AR9", "IOSTANDARD = SSTL18_I") |
---|
1880 | # PORT ddr2_256mb_DQ43 = ddr2_256mb_dq_43, UCF_NET_STRING=("LOC=AT9", "IOSTANDARD = SSTL18_I") |
---|
1881 | # PORT ddr2_256mb_DQ44 = ddr2_256mb_dq_44, UCF_NET_STRING=("LOC=AL14", "IOSTANDARD = SSTL18_I") |
---|
1882 | # PORT ddr2_256mb_DQ45 = ddr2_256mb_dq_45, UCF_NET_STRING=("LOC=AL11", "IOSTANDARD = SSTL18_I") |
---|
1883 | # PORT ddr2_256mb_DQ46 = ddr2_256mb_dq_46, UCF_NET_STRING=("LOC=AJ14", "IOSTANDARD = SSTL18_I") |
---|
1884 | # PORT ddr2_256mb_DQ47 = ddr2_256mb_dq_47, UCF_NET_STRING=("LOC=AM15", "IOSTANDARD = SSTL18_I") |
---|
1885 | # PORT ddr2_256mb_DQ48 = ddr2_256mb_dq_48, UCF_NET_STRING=("LOC=AM10", "IOSTANDARD = SSTL18_I") |
---|
1886 | # PORT ddr2_256mb_DQ49 = ddr2_256mb_dq_49, UCF_NET_STRING=("LOC=AP9", "IOSTANDARD = SSTL18_I") |
---|
1887 | # PORT ddr2_256mb_DQ50 = ddr2_256mb_dq_50, UCF_NET_STRING=("LOC=AT8", "IOSTANDARD = SSTL18_I") |
---|
1888 | # PORT ddr2_256mb_DQ51 = ddr2_256mb_dq_51, UCF_NET_STRING=("LOC=AL9", "IOSTANDARD = SSTL18_I") |
---|
1889 | # PORT ddr2_256mb_DQ52 = ddr2_256mb_dq_52, UCF_NET_STRING=("LOC=AN15", "IOSTANDARD = SSTL18_I") |
---|
1890 | # PORT ddr2_256mb_DQ53 = ddr2_256mb_dq_53, UCF_NET_STRING=("LOC=AN12", "IOSTANDARD = SSTL18_I") |
---|
1891 | # PORT ddr2_256mb_DQ54 = ddr2_256mb_dq_54, UCF_NET_STRING=("LOC=AN14", "IOSTANDARD = SSTL18_I") |
---|
1892 | # PORT ddr2_256mb_DQ55 = ddr2_256mb_dq_55, UCF_NET_STRING=("LOC=AK13", "IOSTANDARD = SSTL18_I") |
---|
1893 | # PORT ddr2_256mb_DQ56 = ddr2_256mb_dq_56, UCF_NET_STRING=("LOC=AK9", "IOSTANDARD = SSTL18_I") |
---|
1894 | # PORT ddr2_256mb_DQ57 = ddr2_256mb_dq_57, UCF_NET_STRING=("LOC=AU8", "IOSTANDARD = SSTL18_I") |
---|
1895 | # PORT ddr2_256mb_DQ58 = ddr2_256mb_dq_58, UCF_NET_STRING=("LOC=AR7", "IOSTANDARD = SSTL18_I") |
---|
1896 | # PORT ddr2_256mb_DQ59 = ddr2_256mb_dq_59, UCF_NET_STRING=("LOC=AJ10", "IOSTANDARD = SSTL18_I") |
---|
1897 | # PORT ddr2_256mb_DQ60 = ddr2_256mb_dq_60, UCF_NET_STRING=("LOC=AK12", "IOSTANDARD = SSTL18_I") |
---|
1898 | # PORT ddr2_256mb_DQ61 = ddr2_256mb_dq_61, UCF_NET_STRING=("LOC=AN10", "IOSTANDARD = SSTL18_I") |
---|
1899 | # PORT ddr2_256mb_DQ62 = ddr2_256mb_dq_62, UCF_NET_STRING=("LOC=AT10", "IOSTANDARD = SSTL18_I") |
---|
1900 | # PORT ddr2_256mb_DQ63 = ddr2_256mb_dq_63, UCF_NET_STRING=("LOC=AU10", "IOSTANDARD = SSTL18_I") |
---|
1901 | # PORT ddr2_256mb_CLK0 = ddr2_256mb_clk_0, UCF_NET_STRING=("LOC=AP35", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1902 | # PORT ddr2_256mb_CLK1 = ddr2_256mb_clk_1, UCF_NET_STRING=("LOC=AK27", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1903 | # PORT ddr2_256mb_CLKN0 = ddr2_256mb_clkn_0, UCF_NET_STRING=("LOC=AP34", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1904 | # PORT ddr2_256mb_CLKN1 = ddr2_256mb_clkn_1, UCF_NET_STRING=("LOC=AL26", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1905 | |
---|
1906 | ### DDR2 2GB ### |
---|
1907 | PORT ddr2_2gb_ODT_0 = ddr2_2gb_odt_0, UCF_NET_STRING=("LOC=AT16", "IOSTANDARD = SSTL18_I") |
---|
1908 | PORT ddr2_2gb_ODT_1 = ddr2_2gb_odt_1, UCF_NET_STRING=("LOC=AP11", "IOSTANDARD = SSTL18_I") |
---|
1909 | PORT ddr2_2gb_ADDR0 = ddr2_2gb_addr_0, UCF_NET_STRING=("LOC=AH13", "IOSTANDARD = SSTL18_I") |
---|
1910 | PORT ddr2_2gb_ADDR1 = ddr2_2gb_addr_1, UCF_NET_STRING=("LOC=AR16", "IOSTANDARD = SSTL18_I") |
---|
1911 | PORT ddr2_2gb_ADDR2 = ddr2_2gb_addr_2, UCF_NET_STRING=("LOC=AH14", "IOSTANDARD = SSTL18_I") |
---|
1912 | PORT ddr2_2gb_ADDR3 = ddr2_2gb_addr_3, UCF_NET_STRING=("LOC=AU13", "IOSTANDARD = SSTL18_I") |
---|
1913 | PORT ddr2_2gb_ADDR4 = ddr2_2gb_addr_4, UCF_NET_STRING=("LOC=AP25", "IOSTANDARD = SSTL18_I") |
---|
1914 | PORT ddr2_2gb_ADDR5 = ddr2_2gb_addr_5, UCF_NET_STRING=("LOC=AN30", "IOSTANDARD = SSTL18_I") |
---|
1915 | PORT ddr2_2gb_ADDR6 = ddr2_2gb_addr_6, UCF_NET_STRING=("LOC=AR29", "IOSTANDARD = SSTL18_I") |
---|
1916 | PORT ddr2_2gb_ADDR7 = ddr2_2gb_addr_7, UCF_NET_STRING=("LOC=AT29", "IOSTANDARD = SSTL18_I") |
---|
1917 | PORT ddr2_2gb_ADDR8 = ddr2_2gb_addr_8, UCF_NET_STRING=("LOC=AL30", "IOSTANDARD = SSTL18_I") |
---|
1918 | PORT ddr2_2gb_ADDR9 = ddr2_2gb_addr_9, UCF_NET_STRING=("LOC=AP30", "IOSTANDARD = SSTL18_I") |
---|
1919 | PORT ddr2_2gb_ADDR10 = ddr2_2gb_addr_10, UCF_NET_STRING=("LOC=AM30", "IOSTANDARD = SSTL18_I") |
---|
1920 | PORT ddr2_2gb_ADDR11 = ddr2_2gb_addr_11, UCF_NET_STRING=("LOC=AL29", "IOSTANDARD = SSTL18_I") |
---|
1921 | PORT ddr2_2gb_ADDR12 = ddr2_2gb_addr_12, UCF_NET_STRING=("LOC=AN29", "IOSTANDARD = SSTL18_I") |
---|
1922 | PORT ddr2_2gb_ADDR13 = ddr2_2gb_addr_13, UCF_NET_STRING=("LOC=AK29", "IOSTANDARD = SSTL18_I") |
---|
1923 | PORT ddr2_2gb_BANKADDR0 = ddr2_2gb_bankaddr_0, UCF_NET_STRING=("LOC=AP14", "IOSTANDARD = SSTL18_I") |
---|
1924 | PORT ddr2_2gb_BANKADDR1 = ddr2_2gb_bankaddr_1, UCF_NET_STRING=("LOC=AN13", "IOSTANDARD = SSTL18_I") |
---|
1925 | PORT ddr2_2gb_BANKADDR2 = ddr2_2gb_bankaddr_2, UCF_NET_STRING=("LOC=AT14", "IOSTANDARD = SSTL18_I") |
---|
1926 | PORT ddr2_2gb_CASN = ddr2_2gb_casn, UCF_NET_STRING=("LOC=AU12", "IOSTANDARD = SSTL18_I") |
---|
1927 | PORT ddr2_2gb_CKE1 = ddr2_2gb_cke_1, UCF_NET_STRING=("LOC=AK11", "IOSTANDARD = SSTL18_I") |
---|
1928 | PORT ddr2_2gb_CKE0 = ddr2_2gb_cke_0, UCF_NET_STRING=("LOC=AP16", "IOSTANDARD = SSTL18_I") |
---|
1929 | PORT ddr2_2gb_CSN1 = ddr2_2gb_csn_1, UCF_NET_STRING=("LOC=AT13", "IOSTANDARD = SSTL18_I") |
---|
1930 | PORT ddr2_2gb_CSN0 = ddr2_2gb_csn_0, UCF_NET_STRING=("LOC=AK14", "IOSTANDARD = SSTL18_I") |
---|
1931 | PORT ddr2_2gb_RASN = ddr2_2gb_rasn, UCF_NET_STRING=("LOC=AJ11", "IOSTANDARD = SSTL18_I") |
---|
1932 | PORT ddr2_2gb_WEN = ddr2_2gb_wen, UCF_NET_STRING=("LOC=AR13", "IOSTANDARD = SSTL18_I") |
---|
1933 | PORT ddr2_2gb_DM0 = ddr2_2gb_dm_0, UCF_NET_STRING=("LOC=AU36", "IOSTANDARD = SSTL18_I") |
---|
1934 | PORT ddr2_2gb_DM1 = ddr2_2gb_dm_1, UCF_NET_STRING=("LOC=AR34", "IOSTANDARD = SSTL18_I") |
---|
1935 | PORT ddr2_2gb_DM2 = ddr2_2gb_dm_2, UCF_NET_STRING=("LOC=AK31", "IOSTANDARD = SSTL18_I") |
---|
1936 | PORT ddr2_2gb_DM3 = ddr2_2gb_dm_3, UCF_NET_STRING=("LOC=AN28", "IOSTANDARD = SSTL18_I") |
---|
1937 | PORT ddr2_2gb_DM4 = ddr2_2gb_dm_4, UCF_NET_STRING=("LOC=AU16", "IOSTANDARD = SSTL18_I") |
---|
1938 | PORT ddr2_2gb_DM5 = ddr2_2gb_dm_5, UCF_NET_STRING=("LOC=AP12", "IOSTANDARD = SSTL18_I") |
---|
1939 | PORT ddr2_2gb_DM6 = ddr2_2gb_dm_6, UCF_NET_STRING=("LOC=AP15", "IOSTANDARD = SSTL18_I") |
---|
1940 | PORT ddr2_2gb_DM7 = ddr2_2gb_dm_7, UCF_NET_STRING=("LOC=AJ12", "IOSTANDARD = SSTL18_I") |
---|
1941 | PORT ddr2_2gb_DQS0 = ddr2_2gb_dqs_0, UCF_NET_STRING=("LOC=AU26", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1942 | PORT ddr2_2gb_DQS1 = ddr2_2gb_dqs_1, UCF_NET_STRING=("LOC=AT35", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1943 | PORT ddr2_2gb_DQS2 = ddr2_2gb_dqs_2, UCF_NET_STRING=("LOC=AM28", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1944 | PORT ddr2_2gb_DQS3 = ddr2_2gb_dqs_3, UCF_NET_STRING=("LOC=AT31", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1945 | PORT ddr2_2gb_DQS4 = ddr2_2gb_dqs_4, UCF_NET_STRING=("LOC=AN8", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1946 | PORT ddr2_2gb_DQS5 = ddr2_2gb_dqs_5, UCF_NET_STRING=("LOC=AT15", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1947 | PORT ddr2_2gb_DQS6 = ddr2_2gb_dqs_6, UCF_NET_STRING=("LOC=AT11", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1948 | PORT ddr2_2gb_DQS7 = ddr2_2gb_dqs_7, UCF_NET_STRING=("LOC=AL13", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1949 | PORT ddr2_2gb_DQSn0 = ddr2_2gb_dqsn_0, UCF_NET_STRING=("LOC=AT26", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1950 | PORT ddr2_2gb_DQSn1 = ddr2_2gb_dqsn_1, UCF_NET_STRING=("LOC=AU35", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1951 | PORT ddr2_2gb_DQSn2 = ddr2_2gb_dqsn_2, UCF_NET_STRING=("LOC=AL28", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1952 | PORT ddr2_2gb_DQSn3 = ddr2_2gb_dqsn_3, UCF_NET_STRING=("LOC=AU31", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1953 | PORT ddr2_2gb_DQSn4 = ddr2_2gb_dqsn_4, UCF_NET_STRING=("LOC=AN7", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1954 | PORT ddr2_2gb_DQSn5 = ddr2_2gb_dqsn_5, UCF_NET_STRING=("LOC=AU15", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1955 | PORT ddr2_2gb_DQSn6 = ddr2_2gb_dqsn_6, UCF_NET_STRING=("LOC=AU11", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1956 | PORT ddr2_2gb_DQSn7 = ddr2_2gb_dqsn_7, UCF_NET_STRING=("LOC=AM13", "IOSTANDARD = DIFF_SSTL18_II") |
---|
1957 | PORT ddr2_2gb_DQ0 = ddr2_2gb_dq_0, UCF_NET_STRING=("LOC=AR27", "IOSTANDARD = SSTL18_I") |
---|
1958 | PORT ddr2_2gb_DQ1 = ddr2_2gb_dq_1, UCF_NET_STRING=("LOC=AR26", "IOSTANDARD = SSTL18_I") |
---|
1959 | PORT ddr2_2gb_DQ2 = ddr2_2gb_dq_2, UCF_NET_STRING=("LOC=AM26", "IOSTANDARD = SSTL18_I") |
---|
1960 | PORT ddr2_2gb_DQ3 = ddr2_2gb_dq_3, UCF_NET_STRING=("LOC=AT24", "IOSTANDARD = SSTL18_I") |
---|
1961 | PORT ddr2_2gb_DQ4 = ddr2_2gb_dq_4, UCF_NET_STRING=("LOC=AP37", "IOSTANDARD = SSTL18_I") |
---|
1962 | PORT ddr2_2gb_DQ5 = ddr2_2gb_dq_5, UCF_NET_STRING=("LOC=AR37", "IOSTANDARD = SSTL18_I") |
---|
1963 | PORT ddr2_2gb_DQ6 = ddr2_2gb_dq_6, UCF_NET_STRING=("LOC=AP32", "IOSTANDARD = SSTL18_I") |
---|
1964 | PORT ddr2_2gb_DQ7 = ddr2_2gb_dq_7, UCF_NET_STRING=("LOC=AT36", "IOSTANDARD = SSTL18_I") |
---|
1965 | PORT ddr2_2gb_DQ8 = ddr2_2gb_dq_8, UCF_NET_STRING=("LOC=AR33", "IOSTANDARD = SSTL18_I") |
---|
1966 | PORT ddr2_2gb_DQ9 = ddr2_2gb_dq_9, UCF_NET_STRING=("LOC=AR24", "IOSTANDARD = SSTL18_I") |
---|
1967 | PORT ddr2_2gb_DQ10 = ddr2_2gb_dq_10, UCF_NET_STRING=("LOC=AM32", "IOSTANDARD = SSTL18_I") |
---|
1968 | PORT ddr2_2gb_DQ11 = ddr2_2gb_dq_11, UCF_NET_STRING=("LOC=AN32", "IOSTANDARD = SSTL18_I") |
---|
1969 | PORT ddr2_2gb_DQ12 = ddr2_2gb_dq_12, UCF_NET_STRING=("LOC=AR36", "IOSTANDARD = SSTL18_I") |
---|
1970 | PORT ddr2_2gb_DQ13 = ddr2_2gb_dq_13, UCF_NET_STRING=("LOC=AT34", "IOSTANDARD = SSTL18_I") |
---|
1971 | PORT ddr2_2gb_DQ14 = ddr2_2gb_dq_14, UCF_NET_STRING=("LOC=AP36", "IOSTANDARD = SSTL18_I") |
---|
1972 | PORT ddr2_2gb_DQ15 = ddr2_2gb_dq_15, UCF_NET_STRING=("LOC=AP26", "IOSTANDARD = SSTL18_I") |
---|
1973 | PORT ddr2_2gb_DQ16 = ddr2_2gb_dq_16, UCF_NET_STRING=("LOC=AM31", "IOSTANDARD = SSTL18_I") |
---|
1974 | PORT ddr2_2gb_DQ17 = ddr2_2gb_dq_17, UCF_NET_STRING=("LOC=AL31", "IOSTANDARD = SSTL18_I") |
---|
1975 | PORT ddr2_2gb_DQ18 = ddr2_2gb_dq_18, UCF_NET_STRING=("LOC=AU28", "IOSTANDARD = SSTL18_I") |
---|
1976 | PORT ddr2_2gb_DQ19 = ddr2_2gb_dq_19, UCF_NET_STRING=("LOC=AP24", "IOSTANDARD = SSTL18_I") |
---|
1977 | PORT ddr2_2gb_DQ20 = ddr2_2gb_dq_20, UCF_NET_STRING=("LOC=AR32", "IOSTANDARD = SSTL18_I") |
---|
1978 | PORT ddr2_2gb_DQ21 = ddr2_2gb_dq_21, UCF_NET_STRING=("LOC=AP31", "IOSTANDARD = SSTL18_I") |
---|
1979 | PORT ddr2_2gb_DQ22 = ddr2_2gb_dq_22, UCF_NET_STRING=("LOC=AU33", "IOSTANDARD = SSTL18_I") |
---|
1980 | PORT ddr2_2gb_DQ23 = ddr2_2gb_dq_23, UCF_NET_STRING=("LOC=AM27", "IOSTANDARD = SSTL18_I") |
---|
1981 | PORT ddr2_2gb_DQ24 = ddr2_2gb_dq_24, UCF_NET_STRING=("LOC=AT33", "IOSTANDARD = SSTL18_I") |
---|
1982 | PORT ddr2_2gb_DQ25 = ddr2_2gb_dq_25, UCF_NET_STRING=("LOC=AU27", "IOSTANDARD = SSTL18_I") |
---|
1983 | PORT ddr2_2gb_DQ26 = ddr2_2gb_dq_26, UCF_NET_STRING=("LOC=AN27", "IOSTANDARD = SSTL18_I") |
---|
1984 | PORT ddr2_2gb_DQ27 = ddr2_2gb_dq_27, UCF_NET_STRING=("LOC=AR31", "IOSTANDARD = SSTL18_I") |
---|
1985 | PORT ddr2_2gb_DQ28 = ddr2_2gb_dq_28, UCF_NET_STRING=("LOC=AU32", "IOSTANDARD = SSTL18_I") |
---|
1986 | PORT ddr2_2gb_DQ29 = ddr2_2gb_dq_29, UCF_NET_STRING=("LOC=AU30", "IOSTANDARD = SSTL18_I") |
---|
1987 | PORT ddr2_2gb_DQ30 = ddr2_2gb_dq_30, UCF_NET_STRING=("LOC=AT30", "IOSTANDARD = SSTL18_I") |
---|
1988 | PORT ddr2_2gb_DQ31 = ddr2_2gb_dq_31, UCF_NET_STRING=("LOC=AT28", "IOSTANDARD = SSTL18_I") |
---|
1989 | PORT ddr2_2gb_DQ32 = ddr2_2gb_dq_32, UCF_NET_STRING=("LOC=AR11", "IOSTANDARD = SSTL18_I") |
---|
1990 | PORT ddr2_2gb_DQ33 = ddr2_2gb_dq_33, UCF_NET_STRING=("LOC=AL10", "IOSTANDARD = SSTL18_I") |
---|
1991 | PORT ddr2_2gb_DQ34 = ddr2_2gb_dq_34, UCF_NET_STRING=("LOC=AP10", "IOSTANDARD = SSTL18_I") |
---|
1992 | PORT ddr2_2gb_DQ35 = ddr2_2gb_dq_35, UCF_NET_STRING=("LOC=AR8", "IOSTANDARD = SSTL18_I") |
---|
1993 | PORT ddr2_2gb_DQ36 = ddr2_2gb_dq_36, UCF_NET_STRING=("LOC=AT18", "IOSTANDARD = SSTL18_I") |
---|
1994 | PORT ddr2_2gb_DQ37 = ddr2_2gb_dq_37, UCF_NET_STRING=("LOC=AU17", "IOSTANDARD = SSTL18_I") |
---|
1995 | PORT ddr2_2gb_DQ38 = ddr2_2gb_dq_38, UCF_NET_STRING=("LOC=AH12", "IOSTANDARD = SSTL18_I") |
---|
1996 | PORT ddr2_2gb_DQ39 = ddr2_2gb_dq_39, UCF_NET_STRING=("LOC=AR14", "IOSTANDARD = SSTL18_I") |
---|
1997 | PORT ddr2_2gb_DQ40 = ddr2_2gb_dq_40, UCF_NET_STRING=("LOC=AR12", "IOSTANDARD = SSTL18_I") |
---|
1998 | PORT ddr2_2gb_DQ41 = ddr2_2gb_dq_41, UCF_NET_STRING=("LOC=AP7", "IOSTANDARD = SSTL18_I") |
---|
1999 | PORT ddr2_2gb_DQ42 = ddr2_2gb_dq_42, UCF_NET_STRING=("LOC=AR9", "IOSTANDARD = SSTL18_I") |
---|
2000 | PORT ddr2_2gb_DQ43 = ddr2_2gb_dq_43, UCF_NET_STRING=("LOC=AT9", "IOSTANDARD = SSTL18_I") |
---|
2001 | PORT ddr2_2gb_DQ44 = ddr2_2gb_dq_44, UCF_NET_STRING=("LOC=AL14", "IOSTANDARD = SSTL18_I") |
---|
2002 | PORT ddr2_2gb_DQ45 = ddr2_2gb_dq_45, UCF_NET_STRING=("LOC=AL11", "IOSTANDARD = SSTL18_I") |
---|
2003 | PORT ddr2_2gb_DQ46 = ddr2_2gb_dq_46, UCF_NET_STRING=("LOC=AJ14", "IOSTANDARD = SSTL18_I") |
---|
2004 | PORT ddr2_2gb_DQ47 = ddr2_2gb_dq_47, UCF_NET_STRING=("LOC=AM15", "IOSTANDARD = SSTL18_I") |
---|
2005 | PORT ddr2_2gb_DQ48 = ddr2_2gb_dq_48, UCF_NET_STRING=("LOC=AM10", "IOSTANDARD = SSTL18_I") |
---|
2006 | PORT ddr2_2gb_DQ49 = ddr2_2gb_dq_49, UCF_NET_STRING=("LOC=AP9", "IOSTANDARD = SSTL18_I") |
---|
2007 | PORT ddr2_2gb_DQ50 = ddr2_2gb_dq_50, UCF_NET_STRING=("LOC=AT8", "IOSTANDARD = SSTL18_I") |
---|
2008 | PORT ddr2_2gb_DQ51 = ddr2_2gb_dq_51, UCF_NET_STRING=("LOC=AL9", "IOSTANDARD = SSTL18_I") |
---|
2009 | PORT ddr2_2gb_DQ52 = ddr2_2gb_dq_52, UCF_NET_STRING=("LOC=AN15", "IOSTANDARD = SSTL18_I") |
---|
2010 | PORT ddr2_2gb_DQ53 = ddr2_2gb_dq_53, UCF_NET_STRING=("LOC=AN12", "IOSTANDARD = SSTL18_I") |
---|
2011 | PORT ddr2_2gb_DQ54 = ddr2_2gb_dq_54, UCF_NET_STRING=("LOC=AN14", "IOSTANDARD = SSTL18_I") |
---|
2012 | PORT ddr2_2gb_DQ55 = ddr2_2gb_dq_55, UCF_NET_STRING=("LOC=AK13", "IOSTANDARD = SSTL18_I") |
---|
2013 | PORT ddr2_2gb_DQ56 = ddr2_2gb_dq_56, UCF_NET_STRING=("LOC=AK9", "IOSTANDARD = SSTL18_I") |
---|
2014 | PORT ddr2_2gb_DQ57 = ddr2_2gb_dq_57, UCF_NET_STRING=("LOC=AU8", "IOSTANDARD = SSTL18_I") |
---|
2015 | PORT ddr2_2gb_DQ58 = ddr2_2gb_dq_58, UCF_NET_STRING=("LOC=AR7", "IOSTANDARD = SSTL18_I") |
---|
2016 | PORT ddr2_2gb_DQ59 = ddr2_2gb_dq_59, UCF_NET_STRING=("LOC=AJ10", "IOSTANDARD = SSTL18_I") |
---|
2017 | PORT ddr2_2gb_DQ60 = ddr2_2gb_dq_60, UCF_NET_STRING=("LOC=AK12", "IOSTANDARD = SSTL18_I") |
---|
2018 | PORT ddr2_2gb_DQ61 = ddr2_2gb_dq_61, UCF_NET_STRING=("LOC=AN10", "IOSTANDARD = SSTL18_I") |
---|
2019 | PORT ddr2_2gb_DQ62 = ddr2_2gb_dq_62, UCF_NET_STRING=("LOC=AT10", "IOSTANDARD = SSTL18_I") |
---|
2020 | PORT ddr2_2gb_DQ63 = ddr2_2gb_dq_63, UCF_NET_STRING=("LOC=AU10", "IOSTANDARD = SSTL18_I") |
---|
2021 | PORT ddr2_2gb_CLK0 = ddr2_2gb_clk_0, UCF_NET_STRING=("LOC=AP35", "IOSTANDARD = DIFF_SSTL18_II") |
---|
2022 | PORT ddr2_2gb_CLK1 = ddr2_2gb_clk_1, UCF_NET_STRING=("LOC=AK27", "IOSTANDARD = DIFF_SSTL18_II") |
---|
2023 | PORT ddr2_2gb_CLKN0 = ddr2_2gb_clkn_0, UCF_NET_STRING=("LOC=AP34", "IOSTANDARD = DIFF_SSTL18_II") |
---|
2024 | PORT ddr2_2gb_CLKN1 = ddr2_2gb_clkn_1, UCF_NET_STRING=("LOC=AL26", "IOSTANDARD = DIFF_SSTL18_II") |
---|
2025 | |
---|
2026 | |
---|
2027 | ##Radio Bridge for Slot #1 |
---|
2028 | # PORT radio1_conv_clk_p = radio1_conv_clk_p, UCF_NET_STRING=("LOC=E11", "IOSTANDARD=LVDCI_33") |
---|
2029 | PORT radio1_conv_clk_p = radio1_conv_clk_p, UCF_NET_STRING=("LOC=F10", "IOSTANDARD=LVTTL") |
---|
2030 | PORT radio1_EEPROM_IO = radio1_EEPROM_IO, UCF_NET_STRING=("LOC=G12", "IOSTANDARD=LVTTL", "SLEW = SLOW", "DRIVE = 8") |
---|
2031 | PORT dac1_spi_clk_pin = dac1_spi_clk, UCF_NET_STRING=("LOC=K7", "IOSTANDARD=LVTTL") |
---|
2032 | PORT dac1_spi_cs_pin = dac1_spi_cs, UCF_NET_STRING=("LOC=J6", "IOSTANDARD=LVTTL") |
---|
2033 | PORT dac1_spi_data_pin = dac1_spi_data, UCF_NET_STRING=("LOC=N5", "IOSTANDARD=LVTTL") |
---|
2034 | PORT radio1_24PA_pin = radio1_24PA, UCF_NET_STRING=("LOC=G3", "IOSTANDARD=LVTTL") |
---|
2035 | PORT radio1_5PA_pin = radio1_5PA, UCF_NET_STRING=("LOC=F3", "IOSTANDARD=LVTTL") |
---|
2036 | PORT radio1_ANTSW0_pin = radio1_ANTSW0, UCF_NET_STRING=("LOC=H3", "IOSTANDARD=LVTTL") |
---|
2037 | PORT radio1_ANTSW1_pin = radio1_ANTSW1, UCF_NET_STRING=("LOC=C5", "IOSTANDARD=LVTTL") |
---|
2038 | PORT radio1_dac1_PLL_LOCK_pin = radio1_dac1_PLL_LOCK, UCF_NET_STRING=("LOC=K8", "IOSTANDARD=LVTTL") |
---|
2039 | PORT radio1_dac1_RESET_pin = radio1_dac1_RESET, UCF_NET_STRING=("LOC=P7", "IOSTANDARD=LVTTL") |
---|
2040 | PORT radio1_DIPSW0_pin = radio1_DIPSW0, UCF_NET_STRING=("LOC=J5", "IOSTANDARD=LVTTL") |
---|
2041 | PORT radio1_DIPSW1_pin = radio1_DIPSW1, UCF_NET_STRING=("LOC=K3", "IOSTANDARD=LVTTL") |
---|
2042 | PORT radio1_DIPSW2_pin = radio1_DIPSW2, UCF_NET_STRING=("LOC=P6", "IOSTANDARD=LVTTL") |
---|
2043 | PORT radio1_DIPSW3_pin = radio1_DIPSW3, UCF_NET_STRING=("LOC=J4", "IOSTANDARD=LVTTL") |
---|
2044 | PORT radio1_LD_pin = radio1_LD, UCF_NET_STRING=("LOC=L3", "IOSTANDARD=LVTTL") |
---|
2045 | PORT radio1_LED0_pin = radio1_LED0, UCF_NET_STRING=("LOC=H4", "IOSTANDARD=LVTTL") |
---|
2046 | PORT radio1_LED1_pin = radio1_LED1, UCF_NET_STRING=("LOC=C4", "IOSTANDARD=LVTTL") |
---|
2047 | PORT radio1_LED2_pin = radio1_LED2, UCF_NET_STRING=("LOC=C8", "IOSTANDARD=LVTTL") |
---|
2048 | PORT radio1_rssi_ADC_clk_pin = radio1_rssi_ADC_clk, UCF_NET_STRING=("LOC=H9", "IOSTANDARD=LVTTL") |
---|
2049 | PORT radio1_RSSI_ADC_CLAMP_pin = radio1_RSSI_ADC_CLAMP, UCF_NET_STRING=("LOC=U12", "IOSTANDARD=LVTTL") |
---|
2050 | PORT radio1_RSSI_ADC_D0_pin = radio1_RSSI_ADC_D0, UCF_NET_STRING=("LOC=T9", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2051 | PORT radio1_RSSI_ADC_D1_pin = radio1_RSSI_ADC_D1, UCF_NET_STRING=("LOC=L10", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2052 | PORT radio1_RSSI_ADC_D2_pin = radio1_RSSI_ADC_D2, UCF_NET_STRING=("LOC=U8", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2053 | PORT radio1_RSSI_ADC_D3_pin = radio1_RSSI_ADC_D3, UCF_NET_STRING=("LOC=T4", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2054 | PORT radio1_RSSI_ADC_D4_pin = radio1_RSSI_ADC_D4, UCF_NET_STRING=("LOC=K11", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2055 | PORT radio1_RSSI_ADC_D5_pin = radio1_RSSI_ADC_D5, UCF_NET_STRING=("LOC=T13", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2056 | PORT radio1_RSSI_ADC_D6_pin = radio1_RSSI_ADC_D6, UCF_NET_STRING=("LOC=N8", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2057 | PORT radio1_RSSI_ADC_D7_pin = radio1_RSSI_ADC_D7, UCF_NET_STRING=("LOC=R11", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2058 | PORT radio1_RSSI_ADC_D8_pin = radio1_RSSI_ADC_D8, UCF_NET_STRING=("LOC=U10", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2059 | PORT radio1_RSSI_ADC_D9_pin = radio1_RSSI_ADC_D9, UCF_NET_STRING=("LOC=J14", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2060 | PORT radio1_RSSI_ADC_HIZ_pin = radio1_RSSI_ADC_HIZ, UCF_NET_STRING=("LOC=U11", "IOSTANDARD=LVTTL") |
---|
2061 | PORT radio1_RSSI_ADC_OTR_pin = radio1_RSSI_ADC_OTR, UCF_NET_STRING=("LOC=V9", "IOSTANDARD=LVTTL") |
---|
2062 | PORT radio1_RSSI_ADC_SLEEP_pin = radio1_RSSI_ADC_SLEEP, UCF_NET_STRING=("LOC=T5", "IOSTANDARD=LVTTL") |
---|
2063 | PORT radio1_RX_ADC_DCS_pin = radio1_RX_ADC_DCS, UCF_NET_STRING=("LOC=D14", "IOSTANDARD=LVTTL") |
---|
2064 | PORT radio1_RX_ADC_DFS_pin = radio1_RX_ADC_DFS, UCF_NET_STRING=("LOC=G11", "IOSTANDARD=LVTTL") |
---|
2065 | PORT radio1_RX_ADC_OTRA_pin = radio1_RX_ADC_OTRA, UCF_NET_STRING=("LOC=C7", "IOSTANDARD=LVTTL") |
---|
2066 | PORT radio1_RX_ADC_OTRB_pin = radio1_RX_ADC_OTRB, UCF_NET_STRING=("LOC=C9", "IOSTANDARD=LVTTL") |
---|
2067 | PORT radio1_RX_ADC_PWDNA_pin = radio1_RX_ADC_PWDNA, UCF_NET_STRING=("LOC=G5", "IOSTANDARD=LVTTL") |
---|
2068 | PORT radio1_RX_ADC_PWDNB_pin = radio1_RX_ADC_PWDNB, UCF_NET_STRING=("LOC=G10", "IOSTANDARD=LVTTL") |
---|
2069 | PORT radio1_RxEn_pin = radio1_RxEn, UCF_NET_STRING=("LOC=G13", "IOSTANDARD=LVTTL") |
---|
2070 | PORT radio1_RxHP_pin = radio1_RxHP, UCF_NET_STRING=("LOC=F6", "IOSTANDARD=LVTTL") |
---|
2071 | PORT radio1_SHDN_pin = radio1_SHDN, UCF_NET_STRING=("LOC=F11", "IOSTANDARD=LVTTL") |
---|
2072 | PORT radio1_spi_clk_pin = radio1_spi_clk, UCF_NET_STRING=("LOC=P9", "IOSTANDARD=LVTTL") |
---|
2073 | PORT radio1_spi_cs_pin = radio1_spi_cs, UCF_NET_STRING=("LOC=N3", "IOSTANDARD=LVTTL") |
---|
2074 | PORT radio1_spi_data_pin = radio1_spi_data, UCF_NET_STRING=("LOC=K4", "IOSTANDARD=LVTTL") |
---|
2075 | PORT radio1_TxEn_pin = radio1_TxEn, UCF_NET_STRING=("LOC=R6", "IOSTANDARD=LVTTL") |
---|
2076 | |
---|
2077 | PORT radio1_b0_pin = radio1_b0, UCF_NET_STRING=("LOC=F16", "IOSTANDARD = LVTTL") #Radio_B1 |
---|
2078 | PORT radio1_b1_pin = radio1_b1, UCF_NET_STRING=("LOC=H13", "IOSTANDARD = LVTTL") #Radio_B2 |
---|
2079 | PORT radio1_b2_pin = radio1_b2, UCF_NET_STRING=("LOC=E16", "IOSTANDARD = LVTTL") #Radio_B3 |
---|
2080 | PORT radio1_b3_pin = radio1_b3, UCF_NET_STRING=("LOC=D15", "IOSTANDARD = LVTTL") #Radio_B4 |
---|
2081 | PORT radio1_b4_pin = radio1_b4, UCF_NET_STRING=("LOC=H10", "IOSTANDARD = LVTTL") #Radio_B5 |
---|
2082 | PORT radio1_b5_pin = radio1_b5, UCF_NET_STRING=("LOC=D16", "IOSTANDARD = LVTTL") #Radio_B6 |
---|
2083 | PORT radio1_b6_pin = radio1_b6, UCF_NET_STRING=("LOC=H8", "IOSTANDARD = LVTTL") #Radio_B7 |
---|
2084 | |
---|
2085 | PORT radio1_DAC_I0_pin = radio1_DAC_I0, UCF_NET_STRING=("LOC=N10", "IOSTANDARD = LVTTL") |
---|
2086 | PORT radio1_DAC_I1_pin = radio1_DAC_I1, UCF_NET_STRING=("LOC=R4", "IOSTANDARD = LVTTL") |
---|
2087 | PORT radio1_DAC_I2_pin = radio1_DAC_I2, UCF_NET_STRING=("LOC=R3", "IOSTANDARD = LVTTL") |
---|
2088 | PORT radio1_DAC_I3_pin = radio1_DAC_I3, UCF_NET_STRING=("LOC=N9", "IOSTANDARD = LVTTL") |
---|
2089 | PORT radio1_DAC_I4_pin = radio1_DAC_I4, UCF_NET_STRING=("LOC=R8", "IOSTANDARD = LVTTL") |
---|
2090 | PORT radio1_DAC_I5_pin = radio1_DAC_I5, UCF_NET_STRING=("LOC=T3", "IOSTANDARD = LVTTL") |
---|
2091 | PORT radio1_DAC_I6_pin = radio1_DAC_I6, UCF_NET_STRING=("LOC=T11", "IOSTANDARD = LVTTL") |
---|
2092 | PORT radio1_DAC_I7_pin = radio1_DAC_I7, UCF_NET_STRING=("LOC=P5", "IOSTANDARD = LVTTL") |
---|
2093 | PORT radio1_DAC_I8_pin = radio1_DAC_I8, UCF_NET_STRING=("LOC=R12", "IOSTANDARD = LVTTL") |
---|
2094 | PORT radio1_DAC_I9_pin = radio1_DAC_I9, UCF_NET_STRING=("LOC=P12", "IOSTANDARD = LVTTL") |
---|
2095 | PORT radio1_DAC_I10_pin = radio1_DAC_I10, UCF_NET_STRING=("LOC=T10", "IOSTANDARD = LVTTL") |
---|
2096 | PORT radio1_DAC_I11_pin = radio1_DAC_I11, UCF_NET_STRING=("LOC=T8", "IOSTANDARD = LVTTL") |
---|
2097 | PORT radio1_DAC_I12_pin = radio1_DAC_I12, UCF_NET_STRING=("LOC=P10", "IOSTANDARD = LVTTL") |
---|
2098 | PORT radio1_DAC_I13_pin = radio1_DAC_I13, UCF_NET_STRING=("LOC=P11", "IOSTANDARD = LVTTL") |
---|
2099 | PORT radio1_DAC_I14_pin = radio1_DAC_I14, UCF_NET_STRING=("LOC=N12", "IOSTANDARD = LVTTL") |
---|
2100 | PORT radio1_DAC_I15_pin = radio1_DAC_I15, UCF_NET_STRING=("LOC=T6", "IOSTANDARD = LVTTL") |
---|
2101 | |
---|
2102 | PORT radio1_DAC_Q0_pin = radio1_DAC_Q0, UCF_NET_STRING=("LOC=N7", "IOSTANDARD = LVTTL") |
---|
2103 | PORT radio1_DAC_Q1_pin = radio1_DAC_Q1, UCF_NET_STRING=("LOC=M11", "IOSTANDARD = LVTTL") |
---|
2104 | PORT radio1_DAC_Q2_pin = radio1_DAC_Q2, UCF_NET_STRING=("LOC=L4", "IOSTANDARD = LVTTL") |
---|
2105 | PORT radio1_DAC_Q3_pin = radio1_DAC_Q3, UCF_NET_STRING=("LOC=M5", "IOSTANDARD = LVTTL") |
---|
2106 | PORT radio1_DAC_Q4_pin = radio1_DAC_Q4, UCF_NET_STRING=("LOC=L5", "IOSTANDARD = LVTTL") |
---|
2107 | PORT radio1_DAC_Q5_pin = radio1_DAC_Q5, UCF_NET_STRING=("LOC=J10", "IOSTANDARD = LVTTL") |
---|
2108 | PORT radio1_DAC_Q6_pin = radio1_DAC_Q6, UCF_NET_STRING=("LOC=J11", "IOSTANDARD = LVTTL") |
---|
2109 | PORT radio1_DAC_Q7_pin = radio1_DAC_Q7, UCF_NET_STRING=("LOC=J9", "IOSTANDARD = LVTTL") |
---|
2110 | PORT radio1_DAC_Q8_pin = radio1_DAC_Q8, UCF_NET_STRING=("LOC=M7", "IOSTANDARD = LVTTL") |
---|
2111 | PORT radio1_DAC_Q9_pin = radio1_DAC_Q9, UCF_NET_STRING=("LOC=M6", "IOSTANDARD = LVTTL") |
---|
2112 | PORT radio1_DAC_Q10_pin = radio1_DAC_Q10, UCF_NET_STRING=("LOC=M3", "IOSTANDARD = LVTTL") |
---|
2113 | PORT radio1_DAC_Q11_pin = radio1_DAC_Q11, UCF_NET_STRING=("LOC=M10", "IOSTANDARD = LVTTL") |
---|
2114 | PORT radio1_DAC_Q12_pin = radio1_DAC_Q12, UCF_NET_STRING=("LOC=K9", "IOSTANDARD = LVTTL") |
---|
2115 | PORT radio1_DAC_Q13_pin = radio1_DAC_Q13, UCF_NET_STRING=("LOC=J12", "IOSTANDARD = LVTTL") |
---|
2116 | PORT radio1_DAC_Q14_pin = radio1_DAC_Q14, UCF_NET_STRING=("LOC=L6", "IOSTANDARD = LVTTL") |
---|
2117 | PORT radio1_DAC_Q15_pin = radio1_DAC_Q15, UCF_NET_STRING=("LOC=L8", "IOSTANDARD = LVTTL") |
---|
2118 | PORT radio1_ADC_I0_pin = radio1_ADC_I0, UCF_NET_STRING=("LOC=E7", "IOSTANDARD = LVTTL") |
---|
2119 | PORT radio1_ADC_I1_pin = radio1_ADC_I1, UCF_NET_STRING=("LOC=E8", "IOSTANDARD = LVTTL") |
---|
2120 | PORT radio1_ADC_I2_pin = radio1_ADC_I2, UCF_NET_STRING=("LOC=D10", "IOSTANDARD = LVTTL") |
---|
2121 | PORT radio1_ADC_I3_pin = radio1_ADC_I3, UCF_NET_STRING=("LOC=AG20", "IOSTANDARD = LVTTL") |
---|
2122 | PORT radio1_ADC_I4_pin = radio1_ADC_I4, UCF_NET_STRING=("LOC=D11", "IOSTANDARD = LVTTL") |
---|
2123 | PORT radio1_ADC_I5_pin = radio1_ADC_I5, UCF_NET_STRING=("LOC=C15", "IOSTANDARD = LVTTL") |
---|
2124 | PORT radio1_ADC_I6_pin = radio1_ADC_I6, UCF_NET_STRING=("LOC=E6", "IOSTANDARD = LVTTL") |
---|
2125 | PORT radio1_ADC_I7_pin = radio1_ADC_I7, UCF_NET_STRING=("LOC=E4", "IOSTANDARD = LVTTL") |
---|
2126 | PORT radio1_ADC_I8_pin = radio1_ADC_I8, UCF_NET_STRING=("LOC=D4", "IOSTANDARD = LVTTL") |
---|
2127 | PORT radio1_ADC_I9_pin = radio1_ADC_I9, UCF_NET_STRING=("LOC=C10", "IOSTANDARD = LVTTL") |
---|
2128 | PORT radio1_ADC_I10_pin = radio1_ADC_I10, UCF_NET_STRING=("LOC=G6", "IOSTANDARD = LVTTL") |
---|
2129 | PORT radio1_ADC_I11_pin = radio1_ADC_I11, UCF_NET_STRING=("LOC=D7", "IOSTANDARD = LVTTL") |
---|
2130 | PORT radio1_ADC_I12_pin = radio1_ADC_I12, UCF_NET_STRING=("LOC=F4", "IOSTANDARD = LVTTL") |
---|
2131 | PORT radio1_ADC_I13_pin = radio1_ADC_I13, UCF_NET_STRING=("LOC=E3", "IOSTANDARD = LVTTL") |
---|
2132 | PORT radio1_ADC_Q0_pin = radio1_ADC_Q0, UCF_NET_STRING=("LOC=G7", "IOSTANDARD = LVTTL") |
---|
2133 | PORT radio1_ADC_Q1_pin = radio1_ADC_Q1, UCF_NET_STRING=("LOC=E12", "IOSTANDARD = LVTTL") |
---|
2134 | PORT radio1_ADC_Q2_pin = radio1_ADC_Q2, UCF_NET_STRING=("LOC=E13", "IOSTANDARD = LVTTL") |
---|
2135 | PORT radio1_ADC_Q3_pin = radio1_ADC_Q3, UCF_NET_STRING=("LOC=D12", "IOSTANDARD = LVTTL") |
---|
2136 | PORT radio1_ADC_Q4_pin = radio1_ADC_Q4, UCF_NET_STRING=("LOC=F9", "IOSTANDARD = LVTTL") |
---|
2137 | PORT radio1_ADC_Q5_pin = radio1_ADC_Q5, UCF_NET_STRING=("LOC=H7", "IOSTANDARD = LVTTL") |
---|
2138 | PORT radio1_ADC_Q6_pin = radio1_ADC_Q6, UCF_NET_STRING=("LOC=G8", "IOSTANDARD = LVTTL") |
---|
2139 | PORT radio1_ADC_Q7_pin = radio1_ADC_Q7, UCF_NET_STRING=("LOC=E9", "IOSTANDARD = LVTTL") |
---|
2140 | PORT radio1_ADC_Q8_pin = radio1_ADC_Q8, UCF_NET_STRING=("LOC=C12", "IOSTANDARD = LVTTL") |
---|
2141 | PORT radio1_ADC_Q9_pin = radio1_ADC_Q9, UCF_NET_STRING=("LOC=F5", "IOSTANDARD = LVTTL") |
---|
2142 | PORT radio1_ADC_Q10_pin = radio1_ADC_Q10, UCF_NET_STRING=("LOC=F8", "IOSTANDARD = LVTTL") |
---|
2143 | PORT radio1_ADC_Q11_pin = radio1_ADC_Q11, UCF_NET_STRING=("LOC=D6", "IOSTANDARD = LVTTL") |
---|
2144 | PORT radio1_ADC_Q12_pin = radio1_ADC_Q12, UCF_NET_STRING=("LOC=C13", "IOSTANDARD = LVTTL") |
---|
2145 | PORT radio1_ADC_Q13_pin = radio1_ADC_Q13, UCF_NET_STRING=("LOC=D9", "IOSTANDARD = LVTTL") |
---|
2146 | |
---|
2147 | #Radio Bridge for Slot #2 |
---|
2148 | # PORT radio2_conv_clk_p = radio2_conv_clk_p, UCF_NET_STRING=("LOC=Y14", "IOSTANDARD=LVDCI_33") |
---|
2149 | PORT radio2_conv_clk_p = radio2_conv_clk_p, UCF_NET_STRING=("LOC=AD5", "IOSTANDARD=LVTTL") |
---|
2150 | PORT radio2_EEPROM_IO = radio2_EEPROM_IO, UCF_NET_STRING=("LOC=AE6", "IOSTANDARD=LVTTL", "SLEW = SLOW", "DRIVE = 8") |
---|
2151 | PORT dac2_spi_clk_pin = dac2_spi_clk, UCF_NET_STRING=("LOC=AK7", "IOSTANDARD=LVTTL") |
---|
2152 | PORT dac2_spi_cs_pin = dac2_spi_cs, UCF_NET_STRING=("LOC=AK8", "IOSTANDARD=LVTTL") |
---|
2153 | PORT dac2_spi_data_pin = dac2_spi_data, UCF_NET_STRING=("LOC=AC9", "IOSTANDARD=LVTTL") |
---|
2154 | PORT radio2_24PA_pin = radio2_24PA, UCF_NET_STRING=("LOC=W7", "IOSTANDARD=LVTTL") |
---|
2155 | PORT radio2_5PA_pin = radio2_5PA, UCF_NET_STRING=("LOC=AC8", "IOSTANDARD=LVTTL") |
---|
2156 | PORT radio2_ANTSW0_pin = radio2_ANTSW0, UCF_NET_STRING=("LOC=U3", "IOSTANDARD=LVTTL") |
---|
2157 | PORT radio2_ANTSW1_pin = radio2_ANTSW1, UCF_NET_STRING=("LOC=Y7", "IOSTANDARD=LVTTL") |
---|
2158 | PORT radio2_dac2_PLL_LOCK_pin = radio2_dac2_PLL_LOCK, UCF_NET_STRING=("LOC=AL3", "IOSTANDARD=LVTTL") |
---|
2159 | PORT radio2_dac2_RESET_pin = radio2_dac2_RESET, UCF_NET_STRING=("LOC=AC10", "IOSTANDARD=LVTTL") |
---|
2160 | PORT radio2_DIPSW0_pin = radio2_DIPSW0, UCF_NET_STRING=("LOC=Y13", "IOSTANDARD=LVTTL") |
---|
2161 | PORT radio2_DIPSW1_pin = radio2_DIPSW1, UCF_NET_STRING=("LOC=AH3", "IOSTANDARD=LVTTL") |
---|
2162 | PORT radio2_DIPSW2_pin = radio2_DIPSW2, UCF_NET_STRING=("LOC=W15", "IOSTANDARD=LVTTL") |
---|
2163 | PORT radio2_DIPSW3_pin = radio2_DIPSW3, UCF_NET_STRING=("LOC=AA13", "IOSTANDARD=LVTTL") |
---|
2164 | PORT radio2_LD_pin = radio2_LD, UCF_NET_STRING=("LOC=AD9", "IOSTANDARD=LVTTL") |
---|
2165 | PORT radio2_LED0_pin = radio2_LED0, UCF_NET_STRING=("LOC=AA8", "IOSTANDARD=LVTTL") |
---|
2166 | PORT radio2_LED1_pin = radio2_LED1, UCF_NET_STRING=("LOC=W10", "IOSTANDARD=LVTTL") |
---|
2167 | PORT radio2_LED2_pin = radio2_LED2, UCF_NET_STRING=("LOC=V4", "IOSTANDARD=LVTTL") |
---|
2168 | PORT radio2_rssi_ADC_clk_pin = radio2_rssi_ADC_clk, UCF_NET_STRING=("LOC=AF5", "IOSTANDARD=LVTTL") |
---|
2169 | PORT radio2_RSSI_ADC_CLAMP_pin = radio2_RSSI_ADC_CLAMP, UCF_NET_STRING=("LOC=AB13", "IOSTANDARD=LVTTL") |
---|
2170 | PORT radio2_RSSI_ADC_D0_pin = radio2_RSSI_ADC_D0, UCF_NET_STRING=("LOC=AD10", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2171 | PORT radio2_RSSI_ADC_D1_pin = radio2_RSSI_ADC_D1, UCF_NET_STRING=("LOC=AD11", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2172 | PORT radio2_RSSI_ADC_D2_pin = radio2_RSSI_ADC_D2, UCF_NET_STRING=("LOC=AE3", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2173 | PORT radio2_RSSI_ADC_D3_pin = radio2_RSSI_ADC_D3, UCF_NET_STRING=("LOC=AC13", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2174 | PORT radio2_RSSI_ADC_D4_pin = radio2_RSSI_ADC_D4, UCF_NET_STRING=("LOC=AF3", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2175 | PORT radio2_RSSI_ADC_D5_pin = radio2_RSSI_ADC_D5, UCF_NET_STRING=("LOC=AM3", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2176 | PORT radio2_RSSI_ADC_D6_pin = radio2_RSSI_ADC_D6, UCF_NET_STRING=("LOC=AG10", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2177 | PORT radio2_RSSI_ADC_D7_pin = radio2_RSSI_ADC_D7, UCF_NET_STRING=("LOC=AF10", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2178 | PORT radio2_RSSI_ADC_D8_pin = radio2_RSSI_ADC_D8, UCF_NET_STRING=("LOC=AL5", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2179 | PORT radio2_RSSI_ADC_D9_pin = radio2_RSSI_ADC_D9, UCF_NET_STRING=("LOC=AM8", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2180 | PORT radio2_RSSI_ADC_HIZ_pin = radio2_RSSI_ADC_HIZ, UCF_NET_STRING=("LOC=AK3", "IOSTANDARD=LVTTL") |
---|
2181 | PORT radio2_RSSI_ADC_OTR_pin = radio2_RSSI_ADC_OTR, UCF_NET_STRING=("LOC=AC12", "IOSTANDARD=LVTTL") |
---|
2182 | PORT radio2_RSSI_ADC_SLEEP_pin = radio2_RSSI_ADC_SLEEP, UCF_NET_STRING=("LOC=AH9", "IOSTANDARD=LVTTL") |
---|
2183 | PORT radio2_RX_ADC_DCS_pin = radio2_RX_ADC_DCS, UCF_NET_STRING=("LOC=AA5", "IOSTANDARD=LVTTL") |
---|
2184 | PORT radio2_RX_ADC_DFS_pin = radio2_RX_ADC_DFS, UCF_NET_STRING=("LOC=AF4", "IOSTANDARD=LVTTL") |
---|
2185 | PORT radio2_RX_ADC_OTRA_pin = radio2_RX_ADC_OTRA, UCF_NET_STRING=("LOC=V13", "IOSTANDARD=LVTTL") |
---|
2186 | PORT radio2_RX_ADC_OTRB_pin = radio2_RX_ADC_OTRB, UCF_NET_STRING=("LOC=Y9", "IOSTANDARD=LVTTL") |
---|
2187 | PORT radio2_RX_ADC_PWDNA_pin = radio2_RX_ADC_PWDNA, UCF_NET_STRING=("LOC=Y8", "IOSTANDARD=LVTTL") |
---|
2188 | PORT radio2_RX_ADC_PWDNB_pin = radio2_RX_ADC_PWDNB, UCF_NET_STRING=("LOC=AA14", "IOSTANDARD=LVTTL") |
---|
2189 | PORT radio2_RxEn_pin = radio2_RxEn, UCF_NET_STRING=("LOC=AB10", "IOSTANDARD=LVTTL") |
---|
2190 | PORT radio2_RxHP_pin = radio2_RxHP, UCF_NET_STRING=("LOC=AC4", "IOSTANDARD=LVTTL") |
---|
2191 | PORT radio2_SHDN_pin = radio2_SHDN, UCF_NET_STRING=("LOC=AB3", "IOSTANDARD=LVTTL") |
---|
2192 | PORT radio2_spi_clk_pin = radio2_spi_clk, UCF_NET_STRING=("LOC=AB12", "IOSTANDARD=LVTTL") |
---|
2193 | PORT radio2_spi_cs_pin = radio2_spi_cs, UCF_NET_STRING=("LOC=AE8", "IOSTANDARD=LVTTL") |
---|
2194 | PORT radio2_spi_data_pin = radio2_spi_data, UCF_NET_STRING=("LOC=AG3", "IOSTANDARD=LVTTL") |
---|
2195 | PORT radio2_TxEn_pin = radio2_TxEn, UCF_NET_STRING=("LOC=W16", "IOSTANDARD=LVTTL") |
---|
2196 | |
---|
2197 | PORT radio2_b0_pin = radio2_b0, UCF_NET_STRING=("LOC=AA4", "IOSTANDARD = LVTTL") #Radio_B1 |
---|
2198 | PORT radio2_b1_pin = radio2_b1, UCF_NET_STRING=("LOC=AH5", "IOSTANDARD = LVTTL") #Radio_B2 |
---|
2199 | PORT radio2_b2_pin = radio2_b2, UCF_NET_STRING=("LOC=Y4", "IOSTANDARD = LVTTL") #Radio_B3 |
---|
2200 | PORT radio2_b3_pin = radio2_b3, UCF_NET_STRING=("LOC=V17", "IOSTANDARD = LVTTL") #Radio_B4 |
---|
2201 | PORT radio2_b4_pin = radio2_b4, UCF_NET_STRING=("LOC=AC3", "IOSTANDARD = LVTTL") #Radio_B5 |
---|
2202 | PORT radio2_b5_pin = radio2_b5, UCF_NET_STRING=("LOC=Y6", "IOSTANDARD = LVTTL") #Radio_B6 |
---|
2203 | PORT radio2_b6_pin = radio2_b6, UCF_NET_STRING=("LOC=AH4", "IOSTANDARD = LVTTL") #Radio_B7 |
---|
2204 | |
---|
2205 | PORT radio2_DAC_I0_pin = radio2_DAC_I0, UCF_NET_STRING=("LOC=AP4", "IOSTANDARD = LVTTL") |
---|
2206 | PORT radio2_DAC_I1_pin = radio2_DAC_I1, UCF_NET_STRING=("LOC=AR3", "IOSTANDARD = LVTTL") |
---|
2207 | PORT radio2_DAC_I2_pin = radio2_DAC_I2, UCF_NET_STRING=("LOC=AT4", "IOSTANDARD = LVTTL") |
---|
2208 | PORT radio2_DAC_I3_pin = radio2_DAC_I3, UCF_NET_STRING=("LOC=AR4", "IOSTANDARD = LVTTL") |
---|
2209 | PORT radio2_DAC_I4_pin = radio2_DAC_I4, UCF_NET_STRING=("LOC=AT5", "IOSTANDARD = LVTTL") |
---|
2210 | PORT radio2_DAC_I5_pin = radio2_DAC_I5, UCF_NET_STRING=("LOC=AN3", "IOSTANDARD = LVTTL") |
---|
2211 | PORT radio2_DAC_I6_pin = radio2_DAC_I6, UCF_NET_STRING=("LOC=AT3", "IOSTANDARD = LVTTL") |
---|
2212 | PORT radio2_DAC_I7_pin = radio2_DAC_I7, UCF_NET_STRING=("LOC=AU5", "IOSTANDARD = LVTTL") |
---|
2213 | PORT radio2_DAC_I8_pin = radio2_DAC_I8, UCF_NET_STRING=("LOC=AM7", "IOSTANDARD = LVTTL") |
---|
2214 | PORT radio2_DAC_I9_pin = radio2_DAC_I9, UCF_NET_STRING=("LOC=AU6", "IOSTANDARD = LVTTL") |
---|
2215 | PORT radio2_DAC_I10_pin = radio2_DAC_I10, UCF_NET_STRING=("LOC=AP5", "IOSTANDARD = LVTTL") |
---|
2216 | PORT radio2_DAC_I11_pin = radio2_DAC_I11, UCF_NET_STRING=("LOC=AN5", "IOSTANDARD = LVTTL") |
---|
2217 | PORT radio2_DAC_I12_pin = radio2_DAC_I12, UCF_NET_STRING=("LOC=AT6", "IOSTANDARD = LVTTL") |
---|
2218 | PORT radio2_DAC_I13_pin = radio2_DAC_I13, UCF_NET_STRING=("LOC=AM6", "IOSTANDARD = LVTTL") |
---|
2219 | PORT radio2_DAC_I14_pin = radio2_DAC_I14, UCF_NET_STRING=("LOC=AL6", "IOSTANDARD = LVTTL") |
---|
2220 | PORT radio2_DAC_I15_pin = radio2_DAC_I15, UCF_NET_STRING=("LOC=AL8", "IOSTANDARD = LVTTL") |
---|
2221 | |
---|
2222 | PORT radio2_DAC_Q0_pin = radio2_DAC_Q0, UCF_NET_STRING=("LOC=AF8", "IOSTANDARD = LVTTL") |
---|
2223 | PORT radio2_DAC_Q1_pin = radio2_DAC_Q1, UCF_NET_STRING=("LOC=AF9", "IOSTANDARD = LVTTL") |
---|
2224 | PORT radio2_DAC_Q2_pin = radio2_DAC_Q2, UCF_NET_STRING=("LOC=AH8", "IOSTANDARD = LVTTL") |
---|
2225 | PORT radio2_DAC_Q3_pin = radio2_DAC_Q3, UCF_NET_STRING=("LOC=AG7", "IOSTANDARD = LVTTL") |
---|
2226 | PORT radio2_DAC_Q4_pin = radio2_DAC_Q4, UCF_NET_STRING=("LOC=AJ6", "IOSTANDARD = LVTTL") |
---|
2227 | PORT radio2_DAC_Q5_pin = radio2_DAC_Q5, UCF_NET_STRING=("LOC=AN4", "IOSTANDARD = LVTTL") |
---|
2228 | PORT radio2_DAC_Q6_pin = radio2_DAC_Q6, UCF_NET_STRING=("LOC=AG8", "IOSTANDARD = LVTTL") |
---|
2229 | PORT radio2_DAC_Q7_pin = radio2_DAC_Q7, UCF_NET_STRING=("LOC=AM5", "IOSTANDARD = LVTTL") |
---|
2230 | PORT radio2_DAC_Q8_pin = radio2_DAC_Q8, UCF_NET_STRING=("LOC=AJ5", "IOSTANDARD = LVTTL") |
---|
2231 | PORT radio2_DAC_Q9_pin = radio2_DAC_Q9, UCF_NET_STRING=("LOC=AK6", "IOSTANDARD = LVTTL") |
---|
2232 | PORT radio2_DAC_Q10_pin = radio2_DAC_Q10, UCF_NET_STRING=("LOC=AH7", "IOSTANDARD = LVTTL") |
---|
2233 | PORT radio2_DAC_Q11_pin = radio2_DAC_Q11, UCF_NET_STRING=("LOC=AJ4", "IOSTANDARD = LVTTL") |
---|
2234 | PORT radio2_DAC_Q12_pin = radio2_DAC_Q12, UCF_NET_STRING=("LOC=AL4", "IOSTANDARD = LVTTL") |
---|
2235 | PORT radio2_DAC_Q13_pin = radio2_DAC_Q13, UCF_NET_STRING=("LOC=AB15", "IOSTANDARD = LVTTL") |
---|
2236 | PORT radio2_DAC_Q14_pin = radio2_DAC_Q14, UCF_NET_STRING=("LOC=AC14", "IOSTANDARD = LVTTL") |
---|
2237 | PORT radio2_DAC_Q15_pin = radio2_DAC_Q15, UCF_NET_STRING=("LOC=AK4", "IOSTANDARD = LVTTL") |
---|
2238 | |
---|
2239 | PORT radio2_ADC_I0_pin = radio2_ADC_I0, UCF_NET_STRING=("LOC=V14", "IOSTANDARD = LVTTL") |
---|
2240 | PORT radio2_ADC_I1_pin = radio2_ADC_I1, UCF_NET_STRING=("LOC=U15", "IOSTANDARD = LVTTL") |
---|
2241 | PORT radio2_ADC_I2_pin = radio2_ADC_I2, UCF_NET_STRING=("LOC=W6", "IOSTANDARD = LVTTL") |
---|
2242 | PORT radio2_ADC_I3_pin = radio2_ADC_I3, UCF_NET_STRING=("LOC=AG18", "IOSTANDARD = LVTTL") |
---|
2243 | PORT radio2_ADC_I4_pin = radio2_ADC_I4, UCF_NET_STRING=("LOC=V15", "IOSTANDARD = LVTTL") |
---|
2244 | PORT radio2_ADC_I5_pin = radio2_ADC_I5, UCF_NET_STRING=("LOC=V5", "IOSTANDARD = LVTTL") |
---|
2245 | PORT radio2_ADC_I6_pin = radio2_ADC_I6, UCF_NET_STRING=("LOC=AA10", "IOSTANDARD = LVTTL") |
---|
2246 | PORT radio2_ADC_I7_pin = radio2_ADC_I7, UCF_NET_STRING=("LOC=Y11", "IOSTANDARD = LVTTL") |
---|
2247 | PORT radio2_ADC_I8_pin = radio2_ADC_I8, UCF_NET_STRING=("LOC=AA9", "IOSTANDARD = LVTTL") |
---|
2248 | PORT radio2_ADC_I9_pin = radio2_ADC_I9, UCF_NET_STRING=("LOC=V7", "IOSTANDARD = LVTTL") |
---|
2249 | PORT radio2_ADC_I10_pin = radio2_ADC_I10, UCF_NET_STRING=("LOC=U6", "IOSTANDARD = LVTTL") |
---|
2250 | PORT radio2_ADC_I11_pin = radio2_ADC_I11, UCF_NET_STRING=("LOC=AB11", "IOSTANDARD = LVTTL") |
---|
2251 | PORT radio2_ADC_I12_pin = radio2_ADC_I12, UCF_NET_STRING=("LOC=W4", "IOSTANDARD = LVTTL") |
---|
2252 | PORT radio2_ADC_I13_pin = radio2_ADC_I13, UCF_NET_STRING=("LOC=V12", "IOSTANDARD = LVTTL") |
---|
2253 | |
---|
2254 | PORT radio2_ADC_Q0_pin = radio2_ADC_Q0, UCF_NET_STRING=("LOC=AB7", "IOSTANDARD = LVTTL") |
---|
2255 | PORT radio2_ADC_Q1_pin = radio2_ADC_Q1, UCF_NET_STRING=("LOC=AE7", "IOSTANDARD = LVTTL") |
---|
2256 | PORT radio2_ADC_Q2_pin = radio2_ADC_Q2, UCF_NET_STRING=("LOC=AC7", "IOSTANDARD = LVTTL") |
---|
2257 | PORT radio2_ADC_Q3_pin = radio2_ADC_Q3, UCF_NET_STRING=("LOC=AC5", "IOSTANDARD = LVTTL") |
---|
2258 | PORT radio2_ADC_Q4_pin = radio2_ADC_Q4, UCF_NET_STRING=("LOC=AE4", "IOSTANDARD = LVTTL") |
---|
2259 | PORT radio2_ADC_Q5_pin = radio2_ADC_Q5, UCF_NET_STRING=("LOC=AD4", "IOSTANDARD = LVTTL") |
---|
2260 | PORT radio2_ADC_Q6_pin = radio2_ADC_Q6, UCF_NET_STRING=("LOC=AD7", "IOSTANDARD = LVTTL") |
---|
2261 | PORT radio2_ADC_Q7_pin = radio2_ADC_Q7, UCF_NET_STRING=("LOC=AD6", "IOSTANDARD = LVTTL") |
---|
2262 | PORT radio2_ADC_Q8_pin = radio2_ADC_Q8, UCF_NET_STRING=("LOC=W14", "IOSTANDARD = LVTTL") |
---|
2263 | PORT radio2_ADC_Q9_pin = radio2_ADC_Q9, UCF_NET_STRING=("LOC=U5", "IOSTANDARD = LVTTL") |
---|
2264 | PORT radio2_ADC_Q10_pin = radio2_ADC_Q10, UCF_NET_STRING=("LOC=W5", "IOSTANDARD = LVTTL") |
---|
2265 | PORT radio2_ADC_Q11_pin = radio2_ADC_Q11, UCF_NET_STRING=("LOC=AA11", "IOSTANDARD = LVTTL") |
---|
2266 | PORT radio2_ADC_Q12_pin = radio2_ADC_Q12, UCF_NET_STRING=("LOC=W9", "IOSTANDARD = LVTTL") |
---|
2267 | PORT radio2_ADC_Q13_pin = radio2_ADC_Q13, UCF_NET_STRING=("LOC=Y12", "IOSTANDARD = LVTTL") |
---|
2268 | |
---|
2269 | ##Radio Bridge for Slot #3 |
---|
2270 | # PORT radio3_conv_clk_p = radio3_conv_clk_p, UCF_NET_STRING=("LOC=AD30", "IOSTANDARD=LVDCI_33") |
---|
2271 | PORT radio3_conv_clk_p = radio3_conv_clk_p, UCF_NET_STRING=("LOC=AC29", "IOSTANDARD=LVTTL") |
---|
2272 | PORT radio3_EEPROM_IO = radio3_EEPROM_IO, UCF_NET_STRING=("LOC=AE32", "IOSTANDARD=LVTTL", "SLEW = SLOW", "DRIVE = 8") |
---|
2273 | PORT dac3_spi_clk_pin = dac3_spi_clk, UCF_NET_STRING=("LOC=AA36", "IOSTANDARD=LVTTL") |
---|
2274 | PORT dac3_spi_cs_pin = dac3_spi_cs, UCF_NET_STRING=("LOC=W35", "IOSTANDARD=LVTTL") |
---|
2275 | PORT dac3_spi_data_pin = dac3_spi_data, UCF_NET_STRING=("LOC=T36", "IOSTANDARD=LVTTL") |
---|
2276 | PORT radio3_24PA_pin = radio3_24PA, UCF_NET_STRING=("LOC=AM36", "IOSTANDARD=LVTTL") |
---|
2277 | PORT radio3_5PA_pin = radio3_5PA, UCF_NET_STRING=("LOC=AN35", "IOSTANDARD=LVTTL") |
---|
2278 | PORT radio3_ANTSW0_pin = radio3_ANTSW0, UCF_NET_STRING=("LOC=AN37", "IOSTANDARD=LVTTL") |
---|
2279 | PORT radio3_ANTSW1_pin = radio3_ANTSW1, UCF_NET_STRING=("LOC=AJ37", "IOSTANDARD=LVTTL") |
---|
2280 | PORT radio3_dac3_PLL_LOCK_pin = radio3_dac3_PLL_LOCK, UCF_NET_STRING=("LOC=AG35", "IOSTANDARD=LVTTL") |
---|
2281 | PORT radio3_dac3_RESET_pin = radio3_dac3_RESET, UCF_NET_STRING=("LOC=AE36", "IOSTANDARD=LVTTL") |
---|
2282 | PORT radio3_DIPSW0_pin = radio3_DIPSW0, UCF_NET_STRING=("LOC=AG36", "IOSTANDARD=LVTTL") |
---|
2283 | PORT radio3_DIPSW1_pin = radio3_DIPSW1, UCF_NET_STRING=("LOC=AG37", "IOSTANDARD=LVTTL") |
---|
2284 | PORT radio3_DIPSW2_pin = radio3_DIPSW2, UCF_NET_STRING=("LOC=T34", "IOSTANDARD=LVTTL") |
---|
2285 | PORT radio3_DIPSW3_pin = radio3_DIPSW3, UCF_NET_STRING=("LOC=AH37", "IOSTANDARD=LVTTL") |
---|
2286 | PORT radio3_LD_pin = radio3_LD, UCF_NET_STRING=("LOC=AB37", "IOSTANDARD=LVTTL") |
---|
2287 | PORT radio3_LED0_pin = radio3_LED0, UCF_NET_STRING=("LOC=AL35", "IOSTANDARD=LVTTL") |
---|
2288 | PORT radio3_LED1_pin = radio3_LED1, UCF_NET_STRING=("LOC=AE33", "IOSTANDARD=LVTTL") |
---|
2289 | PORT radio3_LED2_pin = radio3_LED2, UCF_NET_STRING=("LOC=AM35", "IOSTANDARD=LVTTL") |
---|
2290 | PORT radio3_rssi_ADC_clk_pin = radio3_rssi_ADC_clk, UCF_NET_STRING=("LOC=AD32", "IOSTANDARD=LVTTL") |
---|
2291 | PORT radio3_RSSI_ADC_CLAMP_pin = radio3_RSSI_ADC_CLAMP, UCF_NET_STRING=("LOC=K36", "IOSTANDARD=LVTTL") |
---|
2292 | PORT radio3_RSSI_ADC_D0_pin = radio3_RSSI_ADC_D0, UCF_NET_STRING=("LOC=P35", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2293 | PORT radio3_RSSI_ADC_D1_pin = radio3_RSSI_ADC_D1, UCF_NET_STRING=("LOC=AB28", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2294 | PORT radio3_RSSI_ADC_D2_pin = radio3_RSSI_ADC_D2, UCF_NET_STRING=("LOC=M36", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2295 | PORT radio3_RSSI_ADC_D3_pin = radio3_RSSI_ADC_D3, UCF_NET_STRING=("LOC=AF35", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2296 | PORT radio3_RSSI_ADC_D4_pin = radio3_RSSI_ADC_D4, UCF_NET_STRING=("LOC=L36", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2297 | PORT radio3_RSSI_ADC_D5_pin = radio3_RSSI_ADC_D5, UCF_NET_STRING=("LOC=M37", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2298 | PORT radio3_RSSI_ADC_D6_pin = radio3_RSSI_ADC_D6, UCF_NET_STRING=("LOC=R37", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2299 | PORT radio3_RSSI_ADC_D7_pin = radio3_RSSI_ADC_D7, UCF_NET_STRING=("LOC=P36", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2300 | PORT radio3_RSSI_ADC_D8_pin = radio3_RSSI_ADC_D8, UCF_NET_STRING=("LOC=AE34", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2301 | PORT radio3_RSSI_ADC_D9_pin = radio3_RSSI_ADC_D9, UCF_NET_STRING=("LOC=Y31", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2302 | PORT radio3_RSSI_ADC_HIZ_pin = radio3_RSSI_ADC_HIZ, UCF_NET_STRING=("LOC=W29", "IOSTANDARD=LVTTL") |
---|
2303 | PORT radio3_RSSI_ADC_OTR_pin = radio3_RSSI_ADC_OTR, UCF_NET_STRING=("LOC=U36", "IOSTANDARD=LVTTL") |
---|
2304 | PORT radio3_RSSI_ADC_SLEEP_pin = radio3_RSSI_ADC_SLEEP, UCF_NET_STRING=("LOC=K37", "IOSTANDARD=LVTTL") |
---|
2305 | PORT radio3_RX_ADC_DCS_pin = radio3_RX_ADC_DCS, UCF_NET_STRING=("LOC=AF28", "IOSTANDARD=LVTTL") |
---|
2306 | PORT radio3_RX_ADC_DFS_pin = radio3_RX_ADC_DFS, UCF_NET_STRING=("LOC=AD34", "IOSTANDARD=LVTTL") |
---|
2307 | PORT radio3_RX_ADC_OTRA_pin = radio3_RX_ADC_OTRA, UCF_NET_STRING=("LOC=AM37", "IOSTANDARD=LVTTL") |
---|
2308 | PORT radio3_RX_ADC_OTRB_pin = radio3_RX_ADC_OTRB, UCF_NET_STRING=("LOC=AL36", "IOSTANDARD=LVTTL") |
---|
2309 | PORT radio3_RX_ADC_PWDNA_pin = radio3_RX_ADC_PWDNA, UCF_NET_STRING=("LOC=AK36", "IOSTANDARD=LVTTL") |
---|
2310 | PORT radio3_RX_ADC_PWDNB_pin = radio3_RX_ADC_PWDNB, UCF_NET_STRING=("LOC=AE28", "IOSTANDARD=LVTTL") |
---|
2311 | PORT radio3_RxEn_pin = radio3_RxEn, UCF_NET_STRING=("LOC=Y26", "IOSTANDARD=LVTTL") |
---|
2312 | PORT radio3_RxHP_pin = radio3_RxHP, UCF_NET_STRING=("LOC=AC25", "IOSTANDARD=LVTTL") |
---|
2313 | PORT radio3_SHDN_pin = radio3_SHDN, UCF_NET_STRING=("LOC=AD27", "IOSTANDARD=LVTTL") |
---|
2314 | PORT radio3_spi_clk_pin = radio3_spi_clk, UCF_NET_STRING=("LOC=AC37", "IOSTANDARD=LVTTL") |
---|
2315 | PORT radio3_spi_cs_pin = radio3_spi_cs, UCF_NET_STRING=("LOC=AF36", "IOSTANDARD=LVTTL") |
---|
2316 | PORT radio3_spi_data_pin = radio3_spi_data, UCF_NET_STRING=("LOC=AD37", "IOSTANDARD=LVTTL") |
---|
2317 | PORT radio3_TxEn_pin = radio3_TxEn, UCF_NET_STRING=("LOC=AE37", "IOSTANDARD=LVTTL") |
---|
2318 | |
---|
2319 | PORT radio3_b0_pin = radio3_b0, UCF_NET_STRING=("LOC=AG28", "IOSTANDARD = LVTTL") #Radio_B1 |
---|
2320 | PORT radio3_b1_pin = radio3_b1, UCF_NET_STRING=("LOC=AC24", "IOSTANDARD = LVTTL") #Radio_B2 |
---|
2321 | PORT radio3_b2_pin = radio3_b2, UCF_NET_STRING=("LOC=AD31", "IOSTANDARD = LVTTL") #Radio_B3 |
---|
2322 | PORT radio3_b3_pin = radio3_b3, UCF_NET_STRING=("LOC=AA24", "IOSTANDARD = LVTTL") #Radio_B4 |
---|
2323 | PORT radio3_b4_pin = radio3_b4, UCF_NET_STRING=("LOC=AG30", "IOSTANDARD = LVTTL") #Radio_B5 |
---|
2324 | PORT radio3_b5_pin = radio3_b5, UCF_NET_STRING=("LOC=AB23", "IOSTANDARD = LVTTL") #Radio_B6 |
---|
2325 | PORT radio3_b6_pin = radio3_b6, UCF_NET_STRING=("LOC=AH29", "IOSTANDARD = LVTTL") #Radio_B7 |
---|
2326 | |
---|
2327 | PORT radio3_DAC_I0_pin = radio3_DAC_I0, UCF_NET_STRING=("LOC=AB35", "IOSTANDARD = LVTTL") |
---|
2328 | PORT radio3_DAC_I1_pin = radio3_DAC_I1, UCF_NET_STRING=("LOC=AC34", "IOSTANDARD = LVTTL") |
---|
2329 | PORT radio3_DAC_I2_pin = radio3_DAC_I2, UCF_NET_STRING=("LOC=AA30", "IOSTANDARD = LVTTL") |
---|
2330 | PORT radio3_DAC_I3_pin = radio3_DAC_I3, UCF_NET_STRING=("LOC=Y27", "IOSTANDARD = LVTTL") |
---|
2331 | PORT radio3_DAC_I4_pin = radio3_DAC_I4, UCF_NET_STRING=("LOC=AB31", "IOSTANDARD = LVTTL") |
---|
2332 | PORT radio3_DAC_I5_pin = radio3_DAC_I5, UCF_NET_STRING=("LOC=N37", "IOSTANDARD = LVTTL") |
---|
2333 | PORT radio3_DAC_I6_pin = radio3_DAC_I6, UCF_NET_STRING=("LOC=AA31", "IOSTANDARD = LVTTL") |
---|
2334 | PORT radio3_DAC_I7_pin = radio3_DAC_I7, UCF_NET_STRING=("LOC=R34", "IOSTANDARD = LVTTL") |
---|
2335 | PORT radio3_DAC_I8_pin = radio3_DAC_I8, UCF_NET_STRING=("LOC=AC32", "IOSTANDARD = LVTTL") |
---|
2336 | PORT radio3_DAC_I9_pin = radio3_DAC_I9, UCF_NET_STRING=("LOC=Y32", "IOSTANDARD = LVTTL") |
---|
2337 | PORT radio3_DAC_I10_pin = radio3_DAC_I10, UCF_NET_STRING=("LOC=AD35", "IOSTANDARD = LVTTL") |
---|
2338 | PORT radio3_DAC_I11_pin = radio3_DAC_I11, UCF_NET_STRING=("LOC=Y34", "IOSTANDARD = LVTTL") |
---|
2339 | PORT radio3_DAC_I12_pin = radio3_DAC_I12, UCF_NET_STRING=("LOC=P37", "IOSTANDARD = LVTTL") |
---|
2340 | PORT radio3_DAC_I13_pin = radio3_DAC_I13, UCF_NET_STRING=("LOC=R36", "IOSTANDARD = LVTTL") |
---|
2341 | PORT radio3_DAC_I14_pin = radio3_DAC_I14, UCF_NET_STRING=("LOC=T35", "IOSTANDARD = LVTTL") |
---|
2342 | PORT radio3_DAC_I15_pin = radio3_DAC_I15, UCF_NET_STRING=("LOC=Y33", "IOSTANDARD = LVTTL") |
---|
2343 | |
---|
2344 | PORT radio3_DAC_Q0_pin = radio3_DAC_Q0, UCF_NET_STRING=("LOC=V34", "IOSTANDARD = LVTTL") |
---|
2345 | PORT radio3_DAC_Q1_pin = radio3_DAC_Q1, UCF_NET_STRING=("LOC=AC35", "IOSTANDARD = LVTTL") |
---|
2346 | PORT radio3_DAC_Q2_pin = radio3_DAC_Q2, UCF_NET_STRING=("LOC=V33", "IOSTANDARD = LVTTL") |
---|
2347 | PORT radio3_DAC_Q3_pin = radio3_DAC_Q3, UCF_NET_STRING=("LOC=Y36", "IOSTANDARD = LVTTL") |
---|
2348 | PORT radio3_DAC_Q4_pin = radio3_DAC_Q4, UCF_NET_STRING=("LOC=U37", "IOSTANDARD = LVTTL") |
---|
2349 | PORT radio3_DAC_Q5_pin = radio3_DAC_Q5, UCF_NET_STRING=("LOC=AB36", "IOSTANDARD = LVTTL") |
---|
2350 | PORT radio3_DAC_Q6_pin = radio3_DAC_Q6, UCF_NET_STRING=("LOC=U35", "IOSTANDARD = LVTTL") |
---|
2351 | PORT radio3_DAC_Q7_pin = radio3_DAC_Q7, UCF_NET_STRING=("LOC=Y37", "IOSTANDARD = LVTTL") |
---|
2352 | PORT radio3_DAC_Q8_pin = radio3_DAC_Q8, UCF_NET_STRING=("LOC=W37", "IOSTANDARD = LVTTL") |
---|
2353 | PORT radio3_DAC_Q9_pin = radio3_DAC_Q9, UCF_NET_STRING=("LOC=AA34", "IOSTANDARD = LVTTL") |
---|
2354 | PORT radio3_DAC_Q10_pin = radio3_DAC_Q10, UCF_NET_STRING=("LOC=W36", "IOSTANDARD = LVTTL") |
---|
2355 | PORT radio3_DAC_Q11_pin = radio3_DAC_Q11, UCF_NET_STRING=("LOC=AA35", "IOSTANDARD = LVTTL") |
---|
2356 | PORT radio3_DAC_Q12_pin = radio3_DAC_Q12, UCF_NET_STRING=("LOC=W30", "IOSTANDARD = LVTTL") |
---|
2357 | PORT radio3_DAC_Q13_pin = radio3_DAC_Q13, UCF_NET_STRING=("LOC=W32", "IOSTANDARD = LVTTL") |
---|
2358 | PORT radio3_DAC_Q14_pin = radio3_DAC_Q14, UCF_NET_STRING=("LOC=V35", "IOSTANDARD = LVTTL") |
---|
2359 | PORT radio3_DAC_Q15_pin = radio3_DAC_Q15, UCF_NET_STRING=("LOC=W34", "IOSTANDARD = LVTTL") |
---|
2360 | PORT radio3_ADC_I0_pin = radio3_ADC_I0, UCF_NET_STRING=("LOC=AM33", "IOSTANDARD = LVTTL") |
---|
2361 | PORT radio3_ADC_I1_pin = radio3_ADC_I1, UCF_NET_STRING=("LOC=AF33", "IOSTANDARD = LVTTL") |
---|
2362 | PORT radio3_ADC_I2_pin = radio3_ADC_I2, UCF_NET_STRING=("LOC=AG31", "IOSTANDARD = LVTTL") |
---|
2363 | PORT radio3_ADC_I3_pin = radio3_ADC_I3, UCF_NET_STRING=("LOC=AM22", "IOSTANDARD = LVTTL") |
---|
2364 | PORT radio3_ADC_I4_pin = radio3_ADC_I4, UCF_NET_STRING=("LOC=AH30", "IOSTANDARD = LVTTL") |
---|
2365 | PORT radio3_ADC_I5_pin = radio3_ADC_I5, UCF_NET_STRING=("LOC=AG32", "IOSTANDARD = LVTTL") |
---|
2366 | PORT radio3_ADC_I6_pin = radio3_ADC_I6, UCF_NET_STRING=("LOC=AF31", "IOSTANDARD = LVTTL") |
---|
2367 | PORT radio3_ADC_I7_pin = radio3_ADC_I7, UCF_NET_STRING=("LOC=AH34", "IOSTANDARD = LVTTL") |
---|
2368 | PORT radio3_ADC_I8_pin = radio3_ADC_I8, UCF_NET_STRING=("LOC=AK32", "IOSTANDARD = LVTTL") |
---|
2369 | PORT radio3_ADC_I9_pin = radio3_ADC_I9, UCF_NET_STRING=("LOC=AF34", "IOSTANDARD = LVTTL") |
---|
2370 | PORT radio3_ADC_I10_pin = radio3_ADC_I10, UCF_NET_STRING=("LOC=AN34", "IOSTANDARD = LVTTL") |
---|
2371 | PORT radio3_ADC_I11_pin = radio3_ADC_I11, UCF_NET_STRING=("LOC=AJ36", "IOSTANDARD = LVTTL") |
---|
2372 | PORT radio3_ADC_I12_pin = radio3_ADC_I12, UCF_NET_STRING=("LOC=AN33", "IOSTANDARD = LVTTL") |
---|
2373 | PORT radio3_ADC_I13_pin = radio3_ADC_I13, UCF_NET_STRING=("LOC=AH35", "IOSTANDARD = LVTTL") |
---|
2374 | PORT radio3_ADC_Q0_pin = radio3_ADC_Q0, UCF_NET_STRING=("LOC=AA26", "IOSTANDARD = LVTTL") |
---|
2375 | PORT radio3_ADC_Q1_pin = radio3_ADC_Q1, UCF_NET_STRING=("LOC=AE29", "IOSTANDARD = LVTTL") |
---|
2376 | PORT radio3_ADC_Q2_pin = radio3_ADC_Q2, UCF_NET_STRING=("LOC=AA29", "IOSTANDARD = LVTTL") |
---|
2377 | PORT radio3_ADC_Q3_pin = radio3_ADC_Q3, UCF_NET_STRING=("LOC=AD29", "IOSTANDARD = LVTTL") |
---|
2378 | PORT radio3_ADC_Q4_pin = radio3_ADC_Q4, UCF_NET_STRING=("LOC=AB26", "IOSTANDARD = LVTTL") |
---|
2379 | PORT radio3_ADC_Q5_pin = radio3_ADC_Q5, UCF_NET_STRING=("LOC=AB27", "IOSTANDARD = LVTTL") |
---|
2380 | PORT radio3_ADC_Q6_pin = radio3_ADC_Q6, UCF_NET_STRING=("LOC=AA28", "IOSTANDARD = LVTTL") |
---|
2381 | PORT radio3_ADC_Q7_pin = radio3_ADC_Q7, UCF_NET_STRING=("LOC=AC28", "IOSTANDARD = LVTTL") |
---|
2382 | PORT radio3_ADC_Q8_pin = radio3_ADC_Q8, UCF_NET_STRING=("LOC=AL34", "IOSTANDARD = LVTTL") |
---|
2383 | PORT radio3_ADC_Q9_pin = radio3_ADC_Q9, UCF_NET_STRING=("LOC=AJ34", "IOSTANDARD = LVTTL") |
---|
2384 | PORT radio3_ADC_Q10_pin = radio3_ADC_Q10, UCF_NET_STRING=("LOC=AK33", "IOSTANDARD = LVTTL") |
---|
2385 | PORT radio3_ADC_Q11_pin = radio3_ADC_Q11, UCF_NET_STRING=("LOC=AK34", "IOSTANDARD = LVTTL") |
---|
2386 | PORT radio3_ADC_Q12_pin = radio3_ADC_Q12, UCF_NET_STRING=("LOC=AJ35", "IOSTANDARD = LVTTL") |
---|
2387 | PORT radio3_ADC_Q13_pin = radio3_ADC_Q13, UCF_NET_STRING=("LOC=AG33", "IOSTANDARD = LVTTL") |
---|
2388 | |
---|
2389 | ##Radio Bridge for Slot #4 |
---|
2390 | # PORT radio4_conv_clk_p = radio4_conv_clk_p, UCF_NET_STRING=("LOC=N30", "IOSTANDARD=LVDCI_33") |
---|
2391 | PORT radio4_conv_clk_p = radio4_conv_clk_p, UCF_NET_STRING=("LOC=H33", "IOSTANDARD=LVTTL") |
---|
2392 | PORT radio4_EEPROM_IO = radio4_EEPROM_IO, UCF_NET_STRING=("LOC=L31", "IOSTANDARD=LVTTL", "SLEW = SLOW", "DRIVE = 8") |
---|
2393 | PORT dac4_spi_clk_pin = dac4_spi_clk, UCF_NET_STRING=("LOC=G28", "IOSTANDARD=LVTTL") |
---|
2394 | PORT dac4_spi_cs_pin = dac4_spi_cs, UCF_NET_STRING=("LOC=D25", "IOSTANDARD=LVTTL") |
---|
2395 | PORT dac4_spi_data_pin = dac4_spi_data, UCF_NET_STRING=("LOC=C28", "IOSTANDARD=LVTTL") |
---|
2396 | PORT radio4_24PA_pin = radio4_24PA, UCF_NET_STRING=("LOC=H27", "IOSTANDARD=LVTTL") |
---|
2397 | PORT radio4_5PA_pin = radio4_5PA, UCF_NET_STRING=("LOC=L26", "IOSTANDARD=LVTTL") |
---|
2398 | PORT radio4_ANTSW0_pin = radio4_ANTSW0, UCF_NET_STRING=("LOC=U31", "IOSTANDARD=LVTTL") |
---|
2399 | PORT radio4_ANTSW1_pin = radio4_ANTSW1, UCF_NET_STRING=("LOC=V29", "IOSTANDARD=LVTTL") |
---|
2400 | PORT radio4_dac4_PLL_LOCK_pin = radio4_dac4_PLL_LOCK, UCF_NET_STRING=("LOC=F30", "IOSTANDARD=LVTTL") |
---|
2401 | PORT radio4_dac4_RESET_pin = radio4_dac4_RESET, UCF_NET_STRING=("LOC=G26", "IOSTANDARD=LVTTL") |
---|
2402 | PORT radio4_DIPSW0_pin = radio4_DIPSW0, UCF_NET_STRING=("LOC=C30", "IOSTANDARD=LVTTL") |
---|
2403 | PORT radio4_DIPSW1_pin = radio4_DIPSW1, UCF_NET_STRING=("LOC=H25", "IOSTANDARD=LVTTL") |
---|
2404 | PORT radio4_DIPSW2_pin = radio4_DIPSW2, UCF_NET_STRING=("LOC=C24", "IOSTANDARD=LVTTL") |
---|
2405 | PORT radio4_DIPSW3_pin = radio4_DIPSW3, UCF_NET_STRING=("LOC=J27", "IOSTANDARD=LVTTL") |
---|
2406 | PORT radio4_LD_pin = radio4_LD, UCF_NET_STRING=("LOC=E24", "IOSTANDARD=LVTTL") |
---|
2407 | PORT radio4_LED0_pin = radio4_LED0, UCF_NET_STRING=("LOC=U26", "IOSTANDARD=LVTTL") |
---|
2408 | PORT radio4_LED1_pin = radio4_LED1, UCF_NET_STRING=("LOC=N35", "IOSTANDARD=LVTTL") |
---|
2409 | PORT radio4_LED2_pin = radio4_LED2, UCF_NET_STRING=("LOC=N34", "IOSTANDARD=LVTTL") |
---|
2410 | PORT radio4_rssi_ADC_clk_pin = radio4_rssi_ADC_clk, UCF_NET_STRING=("LOC=L33", "IOSTANDARD=LVTTL") |
---|
2411 | PORT radio4_RSSI_ADC_CLAMP_pin = radio4_RSSI_ADC_CLAMP, UCF_NET_STRING=("LOC=J37", "IOSTANDARD=LVTTL") |
---|
2412 | PORT radio4_RSSI_ADC_D0_pin = radio4_RSSI_ADC_D0, UCF_NET_STRING=("LOC=J36", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2413 | PORT radio4_RSSI_ADC_D1_pin = radio4_RSSI_ADC_D1, UCF_NET_STRING=("LOC=C33", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2414 | PORT radio4_RSSI_ADC_D2_pin = radio4_RSSI_ADC_D2, UCF_NET_STRING=("LOC=G37", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2415 | PORT radio4_RSSI_ADC_D3_pin = radio4_RSSI_ADC_D3, UCF_NET_STRING=("LOC=C32", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2416 | PORT radio4_RSSI_ADC_D4_pin = radio4_RSSI_ADC_D4, UCF_NET_STRING=("LOC=G36", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2417 | PORT radio4_RSSI_ADC_D5_pin = radio4_RSSI_ADC_D5, UCF_NET_STRING=("LOC=D36", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2418 | PORT radio4_RSSI_ADC_D6_pin = radio4_RSSI_ADC_D6, UCF_NET_STRING=("LOC=D34", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2419 | PORT radio4_RSSI_ADC_D7_pin = radio4_RSSI_ADC_D7, UCF_NET_STRING=("LOC=E36", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2420 | PORT radio4_RSSI_ADC_D8_pin = radio4_RSSI_ADC_D8, UCF_NET_STRING=("LOC=E34", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2421 | PORT radio4_RSSI_ADC_D9_pin = radio4_RSSI_ADC_D9, UCF_NET_STRING=("LOC=H35", "IOSTANDARD=LVTTL", "PULLDOWN") |
---|
2422 | PORT radio4_RSSI_ADC_HIZ_pin = radio4_RSSI_ADC_HIZ, UCF_NET_STRING=("LOC=H37", "IOSTANDARD=LVTTL") |
---|
2423 | PORT radio4_RSSI_ADC_OTR_pin = radio4_RSSI_ADC_OTR, UCF_NET_STRING=("LOC=D35", "IOSTANDARD=LVTTL") |
---|
2424 | PORT radio4_RSSI_ADC_SLEEP_pin = radio4_RSSI_ADC_SLEEP, UCF_NET_STRING=("LOC=C35", "IOSTANDARD=LVTTL") |
---|
2425 | PORT radio4_RX_ADC_DCS_pin = radio4_RX_ADC_DCS, UCF_NET_STRING=("LOC=K32", "IOSTANDARD=LVTTL") |
---|
2426 | PORT radio4_RX_ADC_DFS_pin = radio4_RX_ADC_DFS, UCF_NET_STRING=("LOC=G31", "IOSTANDARD=LVTTL") |
---|
2427 | PORT radio4_RX_ADC_OTRA_pin = radio4_RX_ADC_OTRA, UCF_NET_STRING=("LOC=N32", "IOSTANDARD=LVTTL") |
---|
2428 | PORT radio4_RX_ADC_OTRB_pin = radio4_RX_ADC_OTRB, UCF_NET_STRING=("LOC=V27", "IOSTANDARD=LVTTL") |
---|
2429 | PORT radio4_RX_ADC_PWDNA_pin = radio4_RX_ADC_PWDNA, UCF_NET_STRING=("LOC=U30", "IOSTANDARD=LVTTL") |
---|
2430 | PORT radio4_RX_ADC_PWDNB_pin = radio4_RX_ADC_PWDNB, UCF_NET_STRING=("LOC=M32", "IOSTANDARD=LVTTL") |
---|
2431 | PORT radio4_RxEn_pin = radio4_RxEn, UCF_NET_STRING=("LOC=L34", "IOSTANDARD=LVTTL") |
---|
2432 | PORT radio4_RxHP_pin = radio4_RxHP, UCF_NET_STRING=("LOC=J26", "IOSTANDARD=LVTTL") |
---|
2433 | PORT radio4_SHDN_pin = radio4_SHDN, UCF_NET_STRING=("LOC=K34", "IOSTANDARD=LVTTL") |
---|
2434 | PORT radio4_spi_clk_pin = radio4_spi_clk, UCF_NET_STRING=("LOC=J29", "IOSTANDARD=LVTTL") |
---|
2435 | PORT radio4_spi_cs_pin = radio4_spi_cs, UCF_NET_STRING=("LOC=H28", "IOSTANDARD=LVTTL") |
---|
2436 | PORT radio4_spi_data_pin = radio4_spi_data, UCF_NET_STRING=("LOC=D24", "IOSTANDARD=LVTTL") |
---|
2437 | PORT radio4_TxEn_pin = radio4_TxEn, UCF_NET_STRING=("LOC=H30", "IOSTANDARD=LVTTL") |
---|
2438 | |
---|
2439 | PORT radio4_b0_pin = radio4_b0, UCF_NET_STRING=("LOC=G30", "IOSTANDARD = LVTTL") #Radio_B1 |
---|
2440 | PORT radio4_b1_pin = radio4_b1, UCF_NET_STRING=("LOC=U33", "IOSTANDARD = LVTTL") #Radio_B2 |
---|
2441 | PORT radio4_b2_pin = radio4_b2, UCF_NET_STRING=("LOC=G32", "IOSTANDARD = LVTTL") #Radio_B3 |
---|
2442 | PORT radio4_b3_pin = radio4_b3, UCF_NET_STRING=("LOC=J34", "IOSTANDARD = LVTTL") #Radio_B4 |
---|
2443 | PORT radio4_b4_pin = radio4_b4, UCF_NET_STRING=("LOC=K29", "IOSTANDARD = LVTTL") #Radio_B5 |
---|
2444 | PORT radio4_b5_pin = radio4_b5, UCF_NET_STRING=("LOC=J35", "IOSTANDARD = LVTTL") #Radio_B6 |
---|
2445 | PORT radio4_b6_pin = radio4_b6, UCF_NET_STRING=("LOC=U32", "IOSTANDARD = LVTTL") #Radio_B7 |
---|
2446 | |
---|
2447 | PORT radio4_DAC_I0_pin = radio4_DAC_I0, UCF_NET_STRING=("LOC=E32", "IOSTANDARD = LVTTL") |
---|
2448 | PORT radio4_DAC_I1_pin = radio4_DAC_I1, UCF_NET_STRING=("LOC=D27", "IOSTANDARD = LVTTL") |
---|
2449 | PORT radio4_DAC_I2_pin = radio4_DAC_I2, UCF_NET_STRING=("LOC=E33", "IOSTANDARD = LVTTL") |
---|
2450 | PORT radio4_DAC_I3_pin = radio4_DAC_I3, UCF_NET_STRING=("LOC=F34", "IOSTANDARD = LVTTL") |
---|
2451 | PORT radio4_DAC_I4_pin = radio4_DAC_I4, UCF_NET_STRING=("LOC=F35", "IOSTANDARD = LVTTL") |
---|
2452 | PORT radio4_DAC_I5_pin = radio4_DAC_I5, UCF_NET_STRING=("LOC=F33", "IOSTANDARD = LVTTL") |
---|
2453 | PORT radio4_DAC_I6_pin = radio4_DAC_I6, UCF_NET_STRING=("LOC=D31", "IOSTANDARD = LVTTL") |
---|
2454 | PORT radio4_DAC_I7_pin = radio4_DAC_I7, UCF_NET_STRING=("LOC=D30", "IOSTANDARD = LVTTL") |
---|
2455 | PORT radio4_DAC_I8_pin = radio4_DAC_I8, UCF_NET_STRING=("LOC=E28", "IOSTANDARD = LVTTL") |
---|
2456 | PORT radio4_DAC_I9_pin = radio4_DAC_I9, UCF_NET_STRING=("LOC=F36", "IOSTANDARD = LVTTL") |
---|
2457 | PORT radio4_DAC_I10_pin = radio4_DAC_I10, UCF_NET_STRING=("LOC=G33", "IOSTANDARD = LVTTL") |
---|
2458 | PORT radio4_DAC_I11_pin = radio4_DAC_I11, UCF_NET_STRING=("LOC=G35", "IOSTANDARD = LVTTL") |
---|
2459 | PORT radio4_DAC_I12_pin = radio4_DAC_I12, UCF_NET_STRING=("LOC=D29", "IOSTANDARD = LVTTL") |
---|
2460 | PORT radio4_DAC_I13_pin = radio4_DAC_I13, UCF_NET_STRING=("LOC=C29", "IOSTANDARD = LVTTL") |
---|
2461 | PORT radio4_DAC_I14_pin = radio4_DAC_I14, UCF_NET_STRING=("LOC=D37", "IOSTANDARD = LVTTL") |
---|
2462 | PORT radio4_DAC_I15_pin = radio4_DAC_I15, UCF_NET_STRING=("LOC=E37", "IOSTANDARD = LVTTL") |
---|
2463 | |
---|
2464 | PORT radio4_DAC_Q0_pin = radio4_DAC_Q0, UCF_NET_STRING=("LOC=D26", "IOSTANDARD = LVTTL") |
---|
2465 | PORT radio4_DAC_Q1_pin = radio4_DAC_Q1, UCF_NET_STRING=("LOC=C27", "IOSTANDARD = LVTTL") |
---|
2466 | PORT radio4_DAC_Q2_pin = radio4_DAC_Q2, UCF_NET_STRING=("LOC=G25", "IOSTANDARD = LVTTL") |
---|
2467 | PORT radio4_DAC_Q3_pin = radio4_DAC_Q3, UCF_NET_STRING=("LOC=C25", "IOSTANDARD = LVTTL") |
---|
2468 | PORT radio4_DAC_Q4_pin = radio4_DAC_Q4, UCF_NET_STRING=("LOC=F29", "IOSTANDARD = LVTTL") |
---|
2469 | PORT radio4_DAC_Q5_pin = radio4_DAC_Q5, UCF_NET_STRING=("LOC=F24", "IOSTANDARD = LVTTL") |
---|
2470 | PORT radio4_DAC_Q6_pin = radio4_DAC_Q6, UCF_NET_STRING=("LOC=E26", "IOSTANDARD = LVTTL") |
---|
2471 | PORT radio4_DAC_Q7_pin = radio4_DAC_Q7, UCF_NET_STRING=("LOC=D32", "IOSTANDARD = LVTTL") |
---|
2472 | PORT radio4_DAC_Q8_pin = radio4_DAC_Q8, UCF_NET_STRING=("LOC=F28", "IOSTANDARD = LVTTL") |
---|
2473 | PORT radio4_DAC_Q9_pin = radio4_DAC_Q9, UCF_NET_STRING=("LOC=F31", "IOSTANDARD = LVTTL") |
---|
2474 | PORT radio4_DAC_Q10_pin = radio4_DAC_Q10, UCF_NET_STRING=("LOC=E27", "IOSTANDARD = LVTTL") |
---|
2475 | PORT radio4_DAC_Q11_pin = radio4_DAC_Q11, UCF_NET_STRING=("LOC=F26", "IOSTANDARD = LVTTL") |
---|
2476 | PORT radio4_DAC_Q12_pin = radio4_DAC_Q12, UCF_NET_STRING=("LOC=H34", "IOSTANDARD = LVTTL") |
---|
2477 | PORT radio4_DAC_Q13_pin = radio4_DAC_Q13, UCF_NET_STRING=("LOC=E31", "IOSTANDARD = LVTTL") |
---|
2478 | PORT radio4_DAC_Q14_pin = radio4_DAC_Q14, UCF_NET_STRING=("LOC=F25", "IOSTANDARD = LVTTL") |
---|
2479 | PORT radio4_DAC_Q15_pin = radio4_DAC_Q15, UCF_NET_STRING=("LOC=E29", "IOSTANDARD = LVTTL") |
---|
2480 | PORT radio4_ADC_I0_pin = radio4_ADC_I0, UCF_NET_STRING=("LOC=K26", "IOSTANDARD = LVTTL") |
---|
2481 | PORT radio4_ADC_I1_pin = radio4_ADC_I1, UCF_NET_STRING=("LOC=P30", "IOSTANDARD = LVTTL") |
---|
2482 | PORT radio4_ADC_I2_pin = radio4_ADC_I2, UCF_NET_STRING=("LOC=M27", "IOSTANDARD = LVTTL") |
---|
2483 | PORT radio4_ADC_I3_pin = radio4_ADC_I3, UCF_NET_STRING=("LOC=AF23", "IOSTANDARD = LVTTL") |
---|
2484 | PORT radio4_ADC_I4_pin = radio4_ADC_I4, UCF_NET_STRING=("LOC=T29", "IOSTANDARD = LVTTL") |
---|
2485 | PORT radio4_ADC_I5_pin = radio4_ADC_I5, UCF_NET_STRING=("LOC=R31", "IOSTANDARD = LVTTL") |
---|
2486 | PORT radio4_ADC_I6_pin = radio4_ADC_I6, UCF_NET_STRING=("LOC=V30", "IOSTANDARD = LVTTL") |
---|
2487 | PORT radio4_ADC_I7_pin = radio4_ADC_I7, UCF_NET_STRING=("LOC=M31", "IOSTANDARD = LVTTL") |
---|
2488 | PORT radio4_ADC_I8_pin = radio4_ADC_I8, UCF_NET_STRING=("LOC=W26", "IOSTANDARD = LVTTL") |
---|
2489 | PORT radio4_ADC_I9_pin = radio4_ADC_I9, UCF_NET_STRING=("LOC=K27", "IOSTANDARD = LVTTL") |
---|
2490 | PORT radio4_ADC_I10_pin = radio4_ADC_I10, UCF_NET_STRING=("LOC=M26", "IOSTANDARD = LVTTL") |
---|
2491 | PORT radio4_ADC_I11_pin = radio4_ADC_I11, UCF_NET_STRING=("LOC=L29", "IOSTANDARD = LVTTL") |
---|
2492 | PORT radio4_ADC_I12_pin = radio4_ADC_I12, UCF_NET_STRING=("LOC=V25", "IOSTANDARD = LVTTL") |
---|
2493 | PORT radio4_ADC_I13_pin = radio4_ADC_I13, UCF_NET_STRING=("LOC=W27", "IOSTANDARD = LVTTL") |
---|
2494 | PORT radio4_ADC_Q0_pin = radio4_ADC_Q0, UCF_NET_STRING=("LOC=K28", "IOSTANDARD = LVTTL") |
---|
2495 | PORT radio4_ADC_Q1_pin = radio4_ADC_Q1, UCF_NET_STRING=("LOC=J32", "IOSTANDARD = LVTTL") |
---|
2496 | PORT radio4_ADC_Q2_pin = radio4_ADC_Q2, UCF_NET_STRING=("LOC=K33", "IOSTANDARD = LVTTL") |
---|
2497 | PORT radio4_ADC_Q3_pin = radio4_ADC_Q3, UCF_NET_STRING=("LOC=H32", "IOSTANDARD = LVTTL") |
---|
2498 | PORT radio4_ADC_Q4_pin = radio4_ADC_Q4, UCF_NET_STRING=("LOC=L30", "IOSTANDARD = LVTTL") |
---|
2499 | PORT radio4_ADC_Q5_pin = radio4_ADC_Q5, UCF_NET_STRING=("LOC=M33", "IOSTANDARD = LVTTL") |
---|
2500 | PORT radio4_ADC_Q6_pin = radio4_ADC_Q6, UCF_NET_STRING=("LOC=M35", "IOSTANDARD = LVTTL") |
---|
2501 | PORT radio4_ADC_Q7_pin = radio4_ADC_Q7, UCF_NET_STRING=("LOC=P32", "IOSTANDARD = LVTTL") |
---|
2502 | PORT radio4_ADC_Q8_pin = radio4_ADC_Q8, UCF_NET_STRING=("LOC=U28", "IOSTANDARD = LVTTL") |
---|
2503 | PORT radio4_ADC_Q9_pin = radio4_ADC_Q9, UCF_NET_STRING=("LOC=N33", "IOSTANDARD = LVTTL") |
---|
2504 | PORT radio4_ADC_Q10_pin = radio4_ADC_Q10, UCF_NET_STRING=("LOC=U27", "IOSTANDARD = LVTTL") |
---|
2505 | PORT radio4_ADC_Q11_pin = radio4_ADC_Q11, UCF_NET_STRING=("LOC=L28", "IOSTANDARD = LVTTL") |
---|
2506 | PORT radio4_ADC_Q12_pin = radio4_ADC_Q12, UCF_NET_STRING=("LOC=V28", "IOSTANDARD = LVTTL") |
---|
2507 | PORT radio4_ADC_Q13_pin = radio4_ADC_Q13, UCF_NET_STRING=("LOC=M28", "IOSTANDARD = LVTTL") |
---|
2508 | |
---|
2509 | ### Analog Bridge slot4 ### |
---|
2510 | PORT analog4_clock_out_pin = analog4_clock_out, UCF_NET_STRING=("LOC=E29", "IOSTANDARD = LVTTL") |
---|
2511 | |
---|
2512 | PORT analog4_DAC1_A0_pin = analog4_DAC1_A0, UCF_NET_STRING=("LOC=U31", "IOSTANDARD = LVTTL") |
---|
2513 | PORT analog4_DAC1_A1_pin = analog4_DAC1_A1, UCF_NET_STRING=("LOC=V29", "IOSTANDARD = LVTTL") |
---|
2514 | PORT analog4_DAC1_A2_pin = analog4_DAC1_A2, UCF_NET_STRING=("LOC=H27", "IOSTANDARD = LVTTL") |
---|
2515 | PORT analog4_DAC1_A3_pin = analog4_DAC1_A3, UCF_NET_STRING=("LOC=L26", "IOSTANDARD = LVTTL") |
---|
2516 | PORT analog4_DAC1_A4_pin = analog4_DAC1_A4, UCF_NET_STRING=("LOC=T30", "IOSTANDARD = LVTTL") |
---|
2517 | PORT analog4_DAC1_A5_pin = analog4_DAC1_A5, UCF_NET_STRING=("LOC=U26", "IOSTANDARD = LVTTL") |
---|
2518 | PORT analog4_DAC1_A6_pin = analog4_DAC1_A6, UCF_NET_STRING=("LOC=N35", "IOSTANDARD = LVTTL") |
---|
2519 | PORT analog4_DAC1_A7_pin = analog4_DAC1_A7, UCF_NET_STRING=("LOC=N34", "IOSTANDARD = LVTTL") |
---|
2520 | PORT analog4_DAC1_A8_pin = analog4_DAC1_A8, UCF_NET_STRING=("LOC=U30", "IOSTANDARD = LVTTL") |
---|
2521 | PORT analog4_DAC1_A9_pin = analog4_DAC1_A9, UCF_NET_STRING=("LOC=N32", "IOSTANDARD = LVTTL") |
---|
2522 | PORT analog4_DAC1_A10_pin = analog4_DAC1_A10, UCF_NET_STRING=("LOC=W27", "IOSTANDARD = LVTTL") |
---|
2523 | PORT analog4_DAC1_A11_pin = analog4_DAC1_A11, UCF_NET_STRING=("LOC=V25", "IOSTANDARD = LVTTL") |
---|
2524 | PORT analog4_DAC1_A12_pin = analog4_DAC1_A12, UCF_NET_STRING=("LOC=M26", "IOSTANDARD = LVTTL") |
---|
2525 | PORT analog4_DAC1_A13_pin = analog4_DAC1_A13, UCF_NET_STRING=("LOC=K27", "IOSTANDARD = LVTTL") |
---|
2526 | |
---|
2527 | PORT analog4_DAC1_B0_pin = analog4_DAC1_B0, UCF_NET_STRING=("LOC=T31", "IOSTANDARD = LVTTL") |
---|
2528 | PORT analog4_DAC1_B1_pin = analog4_DAC1_B1, UCF_NET_STRING=("LOC=L35", "IOSTANDARD = LVTTL") |
---|
2529 | PORT analog4_DAC1_B2_pin = analog4_DAC1_B2, UCF_NET_STRING=("LOC=P31", "IOSTANDARD = LVTTL") |
---|
2530 | PORT analog4_DAC1_B3_pin = analog4_DAC1_B3, UCF_NET_STRING=("LOC=L33", "IOSTANDARD = LVTTL") |
---|
2531 | PORT analog4_DAC1_B4_pin = analog4_DAC1_B4, UCF_NET_STRING=("LOC=H29", "IOSTANDARD = LVTTL") |
---|
2532 | PORT analog4_DAC1_B5_pin = analog4_DAC1_B5, UCF_NET_STRING=("LOC=R32", "IOSTANDARD = LVTTL") |
---|
2533 | PORT analog4_DAC1_B6_pin = analog4_DAC1_B6, UCF_NET_STRING=("LOC=J30", "IOSTANDARD = LVTTL") |
---|
2534 | PORT analog4_DAC1_B7_pin = analog4_DAC1_B7, UCF_NET_STRING=("LOC=G30", "IOSTANDARD = LVTTL") |
---|
2535 | PORT analog4_DAC1_B8_pin = analog4_DAC1_B8, UCF_NET_STRING=("LOC=U33", "IOSTANDARD = LVTTL") |
---|
2536 | PORT analog4_DAC1_B9_pin = analog4_DAC1_B9, UCF_NET_STRING=("LOC=G32", "IOSTANDARD = LVTTL") |
---|
2537 | PORT analog4_DAC1_B10_pin = analog4_DAC1_B10, UCF_NET_STRING=("LOC=J34", "IOSTANDARD = LVTTL") |
---|
2538 | PORT analog4_DAC1_B11_pin = analog4_DAC1_B11, UCF_NET_STRING=("LOC=K29", "IOSTANDARD = LVTTL") |
---|
2539 | PORT analog4_DAC1_B12_pin = analog4_DAC1_B12, UCF_NET_STRING=("LOC=J35", "IOSTANDARD = LVTTL") |
---|
2540 | PORT analog4_DAC1_B13_pin = analog4_DAC1_B13, UCF_NET_STRING=("LOC=U32", "IOSTANDARD = LVTTL") |
---|
2541 | |
---|
2542 | PORT analog4_DAC2_A0_pin = analog4_DAC2_A0, UCF_NET_STRING=("LOC=J26", "IOSTANDARD = LVTTL") |
---|
2543 | PORT analog4_DAC2_A1_pin = analog4_DAC2_A1, UCF_NET_STRING=("LOC=L34", "IOSTANDARD = LVTTL") |
---|
2544 | PORT analog4_DAC2_A2_pin = analog4_DAC2_A2, UCF_NET_STRING=("LOC=K34", "IOSTANDARD = LVTTL") |
---|
2545 | PORT analog4_DAC2_A3_pin = analog4_DAC2_A3, UCF_NET_STRING=("LOC=K32", "IOSTANDARD = LVTTL") |
---|
2546 | PORT analog4_DAC2_A4_pin = analog4_DAC2_A4, UCF_NET_STRING=("LOC=G31", "IOSTANDARD = LVTTL") |
---|
2547 | PORT analog4_DAC2_A5_pin = analog4_DAC2_A5, UCF_NET_STRING=("LOC=M32", "IOSTANDARD = LVTTL") |
---|
2548 | PORT analog4_DAC2_A6_pin = analog4_DAC2_A6, UCF_NET_STRING=("LOC=K28", "IOSTANDARD = LVTTL") |
---|
2549 | PORT analog4_DAC2_A7_pin = analog4_DAC2_A7, UCF_NET_STRING=("LOC=J32", "IOSTANDARD = LVTTL") |
---|
2550 | PORT analog4_DAC2_A8_pin = analog4_DAC2_A8, UCF_NET_STRING=("LOC=K33", "IOSTANDARD = LVTTL") |
---|
2551 | PORT analog4_DAC2_A9_pin = analog4_DAC2_A9, UCF_NET_STRING=("LOC=H32", "IOSTANDARD = LVTTL") |
---|
2552 | PORT analog4_DAC2_A10_pin = analog4_DAC2_A10, UCF_NET_STRING=("LOC=L30", "IOSTANDARD = LVTTL") |
---|
2553 | PORT analog4_DAC2_A11_pin = analog4_DAC2_A11, UCF_NET_STRING=("LOC=M33", "IOSTANDARD = LVTTL") |
---|
2554 | PORT analog4_DAC2_A12_pin = analog4_DAC2_A12, UCF_NET_STRING=("LOC=M35", "IOSTANDARD = LVTTL") |
---|
2555 | PORT analog4_DAC2_A13_pin = analog4_DAC2_A13, UCF_NET_STRING=("LOC=P32", "IOSTANDARD = LVTTL") |
---|
2556 | |
---|
2557 | PORT analog4_DAC2_B0_pin = analog4_DAC2_B0, UCF_NET_STRING=("LOC=F24", "IOSTANDARD = LVTTL") |
---|
2558 | PORT analog4_DAC2_B1_pin = analog4_DAC2_B1, UCF_NET_STRING=("LOC=F29", "IOSTANDARD = LVTTL") |
---|
2559 | PORT analog4_DAC2_B2_pin = analog4_DAC2_B2, UCF_NET_STRING=("LOC=C25", "IOSTANDARD = LVTTL") |
---|
2560 | PORT analog4_DAC2_B3_pin = analog4_DAC2_B3, UCF_NET_STRING=("LOC=G25", "IOSTANDARD = LVTTL") |
---|
2561 | PORT analog4_DAC2_B4_pin = analog4_DAC2_B4, UCF_NET_STRING=("LOC=C27", "IOSTANDARD = LVTTL") |
---|
2562 | PORT analog4_DAC2_B5_pin = analog4_DAC2_B5, UCF_NET_STRING=("LOC=D26", "IOSTANDARD = LVTTL") |
---|
2563 | PORT analog4_DAC2_B6_pin = analog4_DAC2_B6, UCF_NET_STRING=("LOC=G27", "IOSTANDARD = LVTTL") |
---|
2564 | PORT analog4_DAC2_B7_pin = analog4_DAC2_B7, UCF_NET_STRING=("LOC=C28", "IOSTANDARD = LVTTL") |
---|
2565 | PORT analog4_DAC2_B8_pin = analog4_DAC2_B8, UCF_NET_STRING=("LOC=G28", "IOSTANDARD = LVTTL") |
---|
2566 | PORT analog4_DAC2_B9_pin = analog4_DAC2_B9, UCF_NET_STRING=("LOC=D25", "IOSTANDARD = LVTTL") |
---|
2567 | PORT analog4_DAC2_B10_pin = analog4_DAC2_B10, UCF_NET_STRING=("LOC=G26", "IOSTANDARD = LVTTL") |
---|
2568 | PORT analog4_DAC2_B11_pin = analog4_DAC2_B11, UCF_NET_STRING=("LOC=E24", "IOSTANDARD = LVTTL") |
---|
2569 | PORT analog4_DAC2_B12_pin = analog4_DAC2_B12, UCF_NET_STRING=("LOC=H28", "IOSTANDARD = LVTTL") |
---|
2570 | PORT analog4_DAC2_B13_pin = analog4_DAC2_B13, UCF_NET_STRING=("LOC=J29", "IOSTANDARD = LVTTL") |
---|
2571 | |
---|
2572 | PORT analog4_DAC1_sleep_pin = analog4_DAC1_sleep, UCF_NET_STRING=("LOC=L29", "IOSTANDARD = LVTTL") |
---|
2573 | PORT analog4_DAC2_sleep_pin = analog4_DAC2_sleep, UCF_NET_STRING=("LOC=M31", "IOSTANDARD = LVTTL") |
---|
2574 | |
---|
2575 | PORT analog4_ADC_A0_pin = analog4_ADC_A0, UCF_NET_STRING=("LOC=E34", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2576 | PORT analog4_ADC_A1_pin = analog4_ADC_A1, UCF_NET_STRING=("LOC=E37", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2577 | PORT analog4_ADC_A2_pin = analog4_ADC_A2, UCF_NET_STRING=("LOC=D37", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2578 | PORT analog4_ADC_A3_pin = analog4_ADC_A3, UCF_NET_STRING=("LOC=C29", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2579 | PORT analog4_ADC_A4_pin = analog4_ADC_A4, UCF_NET_STRING=("LOC=D29", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2580 | PORT analog4_ADC_A5_pin = analog4_ADC_A5, UCF_NET_STRING=("LOC=G35", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2581 | PORT analog4_ADC_A6_pin = analog4_ADC_A6, UCF_NET_STRING=("LOC=G33", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2582 | PORT analog4_ADC_A7_pin = analog4_ADC_A7, UCF_NET_STRING=("LOC=F36", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2583 | PORT analog4_ADC_A8_pin = analog4_ADC_A8, UCF_NET_STRING=("LOC=E28", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2584 | PORT analog4_ADC_A9_pin = analog4_ADC_A9, UCF_NET_STRING=("LOC=D30", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2585 | PORT analog4_ADC_A10_pin = analog4_ADC_A10, UCF_NET_STRING=("LOC=C30", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2586 | PORT analog4_ADC_A11_pin = analog4_ADC_A11, UCF_NET_STRING=("LOC=H25", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2587 | PORT analog4_ADC_A12_pin = analog4_ADC_A12, UCF_NET_STRING=("LOC=J27", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2588 | PORT analog4_ADC_A13_pin = analog4_ADC_A13, UCF_NET_STRING=("LOC=F34", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2589 | |
---|
2590 | PORT analog4_ADC_B0_pin = analog4_ADC_B0, UCF_NET_STRING=("LOC=J37", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2591 | PORT analog4_ADC_B1_pin = analog4_ADC_B1, UCF_NET_STRING=("LOC=C34", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2592 | PORT analog4_ADC_B2_pin = analog4_ADC_B2, UCF_NET_STRING=("LOC=C35", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2593 | PORT analog4_ADC_B3_pin = analog4_ADC_B3, UCF_NET_STRING=("LOC=H37", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2594 | PORT analog4_ADC_B4_pin = analog4_ADC_B4, UCF_NET_STRING=("LOC=D36", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2595 | PORT analog4_ADC_B5_pin = analog4_ADC_B5, UCF_NET_STRING=("LOC=G36", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2596 | PORT analog4_ADC_B6_pin = analog4_ADC_B6, UCF_NET_STRING=("LOC=C32", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2597 | PORT analog4_ADC_B7_pin = analog4_ADC_B7, UCF_NET_STRING=("LOC=G37", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2598 | PORT analog4_ADC_B8_pin = analog4_ADC_B8, UCF_NET_STRING=("LOC=C33", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2599 | PORT analog4_ADC_B9_pin = analog4_ADC_B9, UCF_NET_STRING=("LOC=J36", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2600 | PORT analog4_ADC_B10_pin = analog4_ADC_B10, UCF_NET_STRING=("LOC=D34", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2601 | PORT analog4_ADC_B11_pin = analog4_ADC_B11, UCF_NET_STRING=("LOC=E36", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2602 | PORT analog4_ADC_B12_pin = analog4_ADC_B12, UCF_NET_STRING=("LOC=D35", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2603 | PORT analog4_ADC_B13_pin = analog4_ADC_B13, UCF_NET_STRING=("LOC=H35", "IOSTANDARD = LVTTL", "PULLDOWN") |
---|
2604 | |
---|
2605 | PORT analog4_ADC_DFS_pin = analog4_ADC_DFS, UCF_NET_STRING=("LOC=F33", "IOSTANDARD = LVTTL") |
---|
2606 | PORT analog4_ADC_DCS_pin = analog4_ADC_DCS, UCF_NET_STRING=("LOC=F35", "IOSTANDARD = LVTTL") |
---|
2607 | PORT analog4_ADC_pdwnA_pin = analog4_ADC_pdwnA, UCF_NET_STRING=("LOC=H30", "IOSTANDARD = LVTTL") |
---|
2608 | PORT analog4_ADC_pdwnB_pin = analog4_ADC_pdwnB, UCF_NET_STRING=("LOC=D31", "IOSTANDARD = LVTTL") |
---|
2609 | PORT analog4_ADC_otrA_pin = analog4_ADC_otrA, UCF_NET_STRING=("LOC=D24", "IOSTANDARD = LVTTL") |
---|
2610 | PORT analog4_ADC_otrB_pin = analog4_ADC_otrB, UCF_NET_STRING=("LOC=C24", "IOSTANDARD = LVTTL") |
---|
2611 | |
---|
2612 | PORT analog4_LED0_pin = analog4_LED0, UCF_NET_STRING=("LOC=T29", "IOSTANDARD = LVTTL") |
---|
2613 | PORT analog4_LED1_pin = analog4_LED1, UCF_NET_STRING=("LOC=M27", "IOSTANDARD = LVTTL") |
---|
2614 | PORT analog4_LED2_pin = analog4_LED2, UCF_NET_STRING=("LOC=AF23", "IOSTANDARD = LVTTL") |
---|
2615 | |
---|
2616 | ### USER I/O Board in Slot 1 |
---|
2617 | #LCD SPI interface |
---|
2618 | PORT user_ioboard_slot1_sdi = user_ioboard_slot1_sdi, UCF_NET_STRING=("LOC=L8", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2619 | PORT userio_board_slot1_scl = userio_board_slot1_scl, UCF_NET_STRING=("LOC=L6", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2620 | PORT userio_board_slot1_resetlcd = userio_board_slot1_resetlcd, UCF_NET_STRING=("LOC=K8", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2621 | PORT userio_board_slot1_cs = userio_board_slot1_cs, UCF_NET_STRING=("LOC=J12", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2622 | |
---|
2623 | #Buzzer output |
---|
2624 | PORT userio_board_slot1_buzzer = userio_board_slot1_buzzer, UCF_NET_STRING=("LOC=K3", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2625 | |
---|
2626 | #Trackball I/O |
---|
2627 | PORT userio_board_slot1_trackball_yscn = userio_board_slot1_trackball_yscn, UCF_NET_STRING=("LOC=J10", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2628 | PORT userio_board_slot1_trackball_sel1 = userio_board_slot1_trackball_sel1, UCF_NET_STRING=("LOC=J9", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2629 | PORT userio_board_slot1_trackball_xscn = userio_board_slot1_trackball_xscn, UCF_NET_STRING=("LOC=K9", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2630 | PORT userio_board_slot1_trackball_sel2 = userio_board_slot1_trackball_sel2, UCF_NET_STRING=("LOC=M6", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2631 | PORT userio_board_slot1_trackball_oyn = userio_board_slot1_trackball_oyn, UCF_NET_STRING=("LOC=M7", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2632 | PORT userio_board_slot1_trackball_oy = userio_board_slot1_trackball_oy, UCF_NET_STRING=("LOC=J11", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2633 | PORT userio_board_slot1_trackball_oxn = userio_board_slot1_trackball_oxn, UCF_NET_STRING=("LOC=M3", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2634 | PORT userio_board_slot1_trackball_ox = userio_board_slot1_trackball_ox, UCF_NET_STRING=("LOC=M10", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2635 | |
---|
2636 | #Eight LEDs |
---|
2637 | PORT userio_board_slot1_leds_0 = userio_board_slot1_leds_0, UCF_NET_STRING=("LOC=E16", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2638 | PORT userio_board_slot1_leds_1 = userio_board_slot1_leds_1, UCF_NET_STRING=("LOC=H13", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2639 | PORT userio_board_slot1_leds_2 = userio_board_slot1_leds_2, UCF_NET_STRING=("LOC=F16", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2640 | PORT userio_board_slot1_leds_3 = userio_board_slot1_leds_3, UCF_NET_STRING=("LOC=C14", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2641 | PORT userio_board_slot1_leds_4 = userio_board_slot1_leds_4, UCF_NET_STRING=("LOC=H5", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2642 | PORT userio_board_slot1_leds_5 = userio_board_slot1_leds_5, UCF_NET_STRING=("LOC=H14", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2643 | PORT userio_board_slot1_leds_6 = userio_board_slot1_leds_6, UCF_NET_STRING=("LOC=F15", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2644 | PORT userio_board_slot1_leds_7 = userio_board_slot1_leds_7, UCF_NET_STRING=("LOC=H12", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2645 | |
---|
2646 | #DIP switch |
---|
2647 | PORT userio_board_slot1_dip_switch_0 = userio_board_slot1_dip_switch_0, UCF_NET_STRING=("LOC=H8", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2648 | PORT userio_board_slot1_dip_switch_1 = userio_board_slot1_dip_switch_1, UCF_NET_STRING=("LOC=D16", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2649 | PORT userio_board_slot1_dip_switch_2 = userio_board_slot1_dip_switch_2, UCF_NET_STRING=("LOC=H10", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2650 | PORT userio_board_slot1_dip_switch_3 = userio_board_slot1_dip_switch_3, UCF_NET_STRING=("LOC=D15", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2651 | |
---|
2652 | #Six small push buttons |
---|
2653 | PORT userio_board_slot1_buttons_small_0 = userio_board_slot1_buttons_small_0, UCF_NET_STRING=("LOC=G7", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2654 | PORT userio_board_slot1_buttons_small_1 = userio_board_slot1_buttons_small_1, UCF_NET_STRING=("LOC=G10", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2655 | PORT userio_board_slot1_buttons_small_2 = userio_board_slot1_buttons_small_2, UCF_NET_STRING=("LOC=G11", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2656 | PORT userio_board_slot1_buttons_small_3 = userio_board_slot1_buttons_small_3, UCF_NET_STRING=("LOC=D14", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2657 | PORT userio_board_slot1_buttons_small_4 = userio_board_slot1_buttons_small_4, UCF_NET_STRING=("LOC=F11", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2658 | PORT userio_board_slot1_buttons_small_5 = userio_board_slot1_buttons_small_5, UCF_NET_STRING=("LOC=G13", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2659 | |
---|
2660 | #Two big push buttons |
---|
2661 | PORT userio_board_slot1_buttons_big_0 = userio_board_slot1_buttons_big_0, UCF_NET_STRING=("LOC=P6", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2662 | PORT userio_board_slot1_buttons_big_1 = userio_board_slot1_buttons_big_1, UCF_NET_STRING=("LOC=J4", "SLEW=SLOW", "IOSTANDARD=LVTTL") |
---|
2663 | |
---|
2664 | ### FPGA BOARD EEPROM Serial Number and Memory interface |
---|
2665 | PORT DQ0 = EEPROM_0_DQ0, UCF_NET_STRING=("LOC=AH22", "IOSTANDARD = LVTTL", "SLEW = SLOW", "DRIVE = 8") |
---|
2666 | |
---|
2667 | END |
---|