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wlan_mac_time_hw.mdl

Last change on this file was 5005, checked in by murphpo, 8 years ago
Fixed differing latencies for integer and fractional parts of timestamps
File size: 343.0 KB

Line
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911	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label("
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944	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label("
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1124	"_hw/Registers/From Register3','wlan_mac_time_hw/Registers/From Register2','wlan_mac_time_hw/Registers/From Regis"
1125	"ter1','wlan_mac_time_hw/Registers/To Register4','wlan_mac_time_hw/Registers/To Register3','wlan_mac_time_hw/Regi"
1126	"sters/To Register2','wlan_mac_time_hw/Registers/To Register1'],'mlname'=>['\\\\'NEW_MAC_TIME_MSB\\\\'','\\\\'NEW"
1127	"_MAC_TIME_LSB\\\\'','\\\\'Control\\\\'','\\\\'SYSTEM_TIME_USEC_MSB\\\\'','\\\\'SYSTEM_TIME_USEC_LSB\\\\'','\\\\'"
1128	"MAC_TIME_USEC_MSB\\\\'','\\\\'MAC_TIME_USEC_LSB\\\\''],'mlstate'=>[0.00000000000000000,0.00000000000000000,0.000"
1129	"00000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000]}\|{}\|off\|\|default"
1130	"\|0\|-1,-1,-1,-1\|edkprocessor\|2.7\|46,46,-1,-1,white,blue,0,07734,right,,[ ],[ ]\|fprintf('','COMMENT: begin icon gr"
1131	"aphics');\npatch([0 46 46 0 0 ],[0 0 46 46 0 ],[0.77 0.82 0.91 ]);\nplot([0 46 46 0 0 ],[0 0 46 46 0 ]);\npatch("
1132	"[9.65 18.32 24.32 30.32 36.32 24.32 15.65 9.65 ],[29.66 29.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\n"
1133	"patch([15.65 24.32 18.32 9.65 15.65 ],[23.66 23.66 29.66 29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([9.65 18.32"
1134	" 24.32 15.65 9.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npatch([15.65 36.32 30.32 24.32 18.32 9.65 15.65"
1135	" ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics')"
1136	";\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\|{'table'=>{'AvailableMemories'"
1137	"=>'popup(<empty>)'}}\|"
1138	System {
1139	Name "EDK Processor"
1140	Location [514, 91, 900, 269]
1141	Open off
1142	ModelBrowserVisibility off
1143	ModelBrowserWidth 200
1144	ScreenColor "white"
1145	PaperOrientation "landscape"
1146	PaperPositionMode "auto"
1147	PaperType "usletter"
1148	PaperUnits "inches"
1149	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
1150	TiledPageScale 1
1151	ShowPageBoundaries off
1152	ZoomFactor "100"
1153	SIDHighWatermark "281"
1154	Block {
1155	BlockType Reference
1156	Name "AXI_ARESETN"
1157	SID "215:211"
1158	Ports [1, 1]
1159	Position [145, 50, 210, 70]
1160	LibraryVersion "1.2"
1161	SourceBlock "xbsIndex_r4/Gateway In"
1162	SourceType "Xilinx Gateway In Block"
1163	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
1164	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
1165	"orts."
1166	gui_display_data_type "Fixed-point"
1167	arith_type "Boolean"
1168	n_bits "16"
1169	bin_pt "14"
1170	preci_type "Single"
1171	exp_width "8"
1172	frac_width "24"
1173	quantization "Round (unbiased: +/- Inf)"
1174	overflow "Saturate"
1175	period "xlGetNormalizedPeriod()"
1176	dbl_ovrd off
1177	timing_constraint "None"
1178	locs_specified off
1179	LOCs "{}"
1180	UseAsADC off
1181	ADCChannel "'1'"
1182	xl_use_area off
1183	xl_area "[0,0,0,0,0,0,0]"
1184	inherit_from_input off
1185	hdl_port "on"
1186	has_advanced_control "0"
1187	sggui_pos "-1,-1,-1,-1"
1188	block_type "gatewayin"
1189	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
1190	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
1191	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
1192	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
1193	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
1194	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
1195	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
1196	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
1197	"on text');"
1198	}
1199	Block {
1200	BlockType Constant
1201	Name "Constant"
1202	SID "215:210"
1203	Position [20, 50, 40, 70]
1204	ShowName off
1205	MaskIconFrame on
1206	MaskIconOpaque on
1207	MaskIconRotate "none"
1208	MaskPortRotate "default"
1209	MaskIconUnits "autoscale"
1210	}
1211	Block {
1212	BlockType Constant
1213	Name "Constant1"
1214	SID "215:212"
1215	Position [20, 115, 40, 135]
1216	ShowName off
1217	MaskIconFrame on
1218	MaskIconOpaque on
1219	MaskIconRotate "none"
1220	MaskPortRotate "default"
1221	MaskIconUnits "autoscale"
1222	}
1223	Block {
1224	BlockType Constant
1225	Name "Constant10"
1226	SID "215:230"
1227	Position [20, 730, 40, 750]
1228	ShowName off
1229	MaskIconFrame on
1230	MaskIconOpaque on
1231	MaskIconRotate "none"
1232	MaskPortRotate "default"
1233	MaskIconUnits "autoscale"
1234	}
1235	Block {
1236	BlockType Constant
1237	Name "Constant11"
1238	SID "215:232"
1239	Position [20, 795, 40, 815]
1240	ShowName off
1241	MaskIconFrame on
1242	MaskIconOpaque on
1243	MaskIconRotate "none"
1244	MaskPortRotate "default"
1245	MaskIconUnits "autoscale"
1246	}
1247	Block {
1248	BlockType Constant
1249	Name "Constant12"
1250	SID "215:234"
1251	Position [20, 865, 40, 885]
1252	ShowName off
1253	MaskIconFrame on
1254	MaskIconOpaque on
1255	MaskIconRotate "none"
1256	MaskPortRotate "default"
1257	MaskIconUnits "autoscale"
1258	}
1259	Block {
1260	BlockType Constant
1261	Name "Constant13"
1262	SID "215:236"
1263	Position [20, 935, 40, 955]
1264	ShowName off
1265	MaskIconFrame on
1266	MaskIconOpaque on
1267	MaskIconRotate "none"
1268	MaskPortRotate "default"
1269	MaskIconUnits "autoscale"
1270	}
1271	Block {
1272	BlockType Constant
1273	Name "Constant14"
1274	SID "215:238"
1275	Position [20, 1000, 40, 1020]
1276	ShowName off
1277	MaskIconFrame on
1278	MaskIconOpaque on
1279	MaskIconRotate "none"
1280	MaskPortRotate "default"
1281	MaskIconUnits "autoscale"
1282	}
1283	Block {
1284	BlockType Constant
1285	Name "Constant15"
1286	SID "215:240"
1287	Position [20, 1070, 40, 1090]
1288	ShowName off
1289	MaskIconFrame on
1290	MaskIconOpaque on
1291	MaskIconRotate "none"
1292	MaskPortRotate "default"
1293	MaskIconUnits "autoscale"
1294	}
1295	Block {
1296	BlockType Constant
1297	Name "Constant16"
1298	SID "215:242"
1299	Position [20, 1135, 40, 1155]
1300	ShowName off
1301	MaskIconFrame on
1302	MaskIconOpaque on
1303	MaskIconRotate "none"
1304	MaskPortRotate "default"
1305	MaskIconUnits "autoscale"
1306	}
1307	Block {
1308	BlockType Constant
1309	Name "Constant17"
1310	SID "215:244"
1311	Position [20, 1205, 40, 1225]
1312	ShowName off
1313	MaskIconFrame on
1314	MaskIconOpaque on
1315	MaskIconRotate "none"
1316	MaskPortRotate "default"
1317	MaskIconUnits "autoscale"
1318	}
1319	Block {
1320	BlockType Constant
1321	Name "Constant18"
1322	SID "215:246"
1323	Position [20, 1275, 40, 1295]
1324	ShowName off
1325	MaskIconFrame on
1326	MaskIconOpaque on
1327	MaskIconRotate "none"
1328	MaskPortRotate "default"
1329	MaskIconUnits "autoscale"
1330	}
1331	Block {
1332	BlockType Constant
1333	Name "Constant19"
1334	SID "215:248"
1335	Position [20, 1340, 40, 1360]
1336	ShowName off
1337	MaskIconFrame on
1338	MaskIconOpaque on
1339	MaskIconRotate "none"
1340	MaskPortRotate "default"
1341	MaskIconUnits "autoscale"
1342	}
1343	Block {
1344	BlockType Constant
1345	Name "Constant2"
1346	SID "215:214"
1347	Position [20, 185, 40, 205]
1348	ShowName off
1349	MaskIconFrame on
1350	MaskIconOpaque on
1351	MaskIconRotate "none"
1352	MaskPortRotate "default"
1353	MaskIconUnits "autoscale"
1354	}
1355	Block {
1356	BlockType Constant
1357	Name "Constant20"
1358	SID "215:250"
1359	Position [20, 1410, 40, 1430]
1360	ShowName off
1361	MaskIconFrame on
1362	MaskIconOpaque on
1363	MaskIconRotate "none"
1364	MaskPortRotate "default"
1365	MaskIconUnits "autoscale"
1366	}
1367	Block {
1368	BlockType Constant
1369	Name "Constant21"
1370	SID "215:252"
1371	Position [20, 1475, 40, 1495]
1372	ShowName off
1373	MaskIconFrame on
1374	MaskIconOpaque on
1375	MaskIconRotate "none"
1376	MaskPortRotate "default"
1377	MaskIconUnits "autoscale"
1378	}
1379	Block {
1380	BlockType Constant
1381	Name "Constant22"
1382	SID "215:254"
1383	Position [20, 1545, 40, 1565]
1384	ShowName off
1385	MaskIconFrame on
1386	MaskIconOpaque on
1387	MaskIconRotate "none"
1388	MaskPortRotate "default"
1389	MaskIconUnits "autoscale"
1390	}
1391	Block {
1392	BlockType Constant
1393	Name "Constant23"
1394	SID "215:256"
1395	Position [20, 1615, 40, 1635]
1396	ShowName off
1397	MaskIconFrame on
1398	MaskIconOpaque on
1399	MaskIconRotate "none"
1400	MaskPortRotate "default"
1401	MaskIconUnits "autoscale"
1402	}
1403	Block {
1404	BlockType Constant
1405	Name "Constant24"
1406	SID "215:258"
1407	Position [20, 1680, 40, 1700]
1408	ShowName off
1409	MaskIconFrame on
1410	MaskIconOpaque on
1411	MaskIconRotate "none"
1412	MaskPortRotate "default"
1413	MaskIconUnits "autoscale"
1414	}
1415	Block {
1416	BlockType Constant
1417	Name "Constant3"
1418	SID "215:216"
1419	Position [20, 255, 40, 275]
1420	ShowName off
1421	MaskIconFrame on
1422	MaskIconOpaque on
1423	MaskIconRotate "none"
1424	MaskPortRotate "default"
1425	MaskIconUnits "autoscale"
1426	}
1427	Block {
1428	BlockType Constant
1429	Name "Constant4"
1430	SID "215:218"
1431	Position [20, 320, 40, 340]
1432	ShowName off
1433	MaskIconFrame on
1434	MaskIconOpaque on
1435	MaskIconRotate "none"
1436	MaskPortRotate "default"
1437	MaskIconUnits "autoscale"
1438	}
1439	Block {
1440	BlockType Constant
1441	Name "Constant5"
1442	SID "215:220"
1443	Position [20, 390, 40, 410]
1444	ShowName off
1445	MaskIconFrame on
1446	MaskIconOpaque on
1447	MaskIconRotate "none"
1448	MaskPortRotate "default"
1449	MaskIconUnits "autoscale"
1450	}
1451	Block {
1452	BlockType Constant
1453	Name "Constant6"
1454	SID "215:222"
1455	Position [20, 455, 40, 475]
1456	ShowName off
1457	MaskIconFrame on
1458	MaskIconOpaque on
1459	MaskIconRotate "none"
1460	MaskPortRotate "default"
1461	MaskIconUnits "autoscale"
1462	}
1463	Block {
1464	BlockType Constant
1465	Name "Constant7"
1466	SID "215:224"
1467	Position [20, 525, 40, 545]
1468	ShowName off
1469	MaskIconFrame on
1470	MaskIconOpaque on
1471	MaskIconRotate "none"
1472	MaskPortRotate "default"
1473	MaskIconUnits "autoscale"
1474	}
1475	Block {
1476	BlockType Constant
1477	Name "Constant8"
1478	SID "215:226"
1479	Position [20, 595, 40, 615]
1480	ShowName off
1481	MaskIconFrame on
1482	MaskIconOpaque on
1483	MaskIconRotate "none"
1484	MaskPortRotate "default"
1485	MaskIconUnits "autoscale"
1486	}
1487	Block {
1488	BlockType Constant
1489	Name "Constant9"
1490	SID "215:228"
1491	Position [20, 660, 40, 680]
1492	ShowName off
1493	MaskIconFrame on
1494	MaskIconOpaque on
1495	MaskIconRotate "none"
1496	MaskPortRotate "default"
1497	MaskIconUnits "autoscale"
1498	}
1499	Block {
1500	BlockType Reference
1501	Name "From Register"
1502	SID "215:203"
1503	Ports [0, 1]
1504	Position [145, 1752, 205, 1808]
1505	AttributesFormatString "<< %<shared_memory_name> >>"
1506	LibraryVersion "1.2"
1507	SourceBlock "xbsIndex_r4/From Register"
1508	SourceType "Xilinx Shared Memory Based From Register Block"
1509	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
1510	shared_memory_name "'SYSTEM_TIME_USEC_MSB'"
1511	init "0"
1512	period "xlGetNormalizedPeriod()"
1513	ownership "Owned and initialized elsewhere"
1514	gui_display_data_type "Fixed-point"
1515	arith_type "Unsigned"
1516	n_bits "32"
1517	bin_pt "0"
1518	preci_type "Single"
1519	dbl_ovrd off
1520	xl_use_area off
1521	xl_area "[0,0,0,0,0,0,0]"
1522	has_advanced_control "0"
1523	sggui_pos "-1,-1,-1,-1"
1524	block_type "fromreg"
1525	sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
1526	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
1527	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
1528	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
1529	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
1530	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
1531	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
1532	"out');\nfprintf('','COMMENT: end icon text');"
1533	}
1534	Block {
1535	BlockType Reference
1536	Name "From Register1"
1537	SID "215:204"
1538	Ports [0, 1]
1539	Position [145, 1857, 205, 1913]
1540	AttributesFormatString "<< %<shared_memory_name> >>"
1541	LibraryVersion "1.2"
1542	SourceBlock "xbsIndex_r4/From Register"
1543	SourceType "Xilinx Shared Memory Based From Register Block"
1544	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
1545	shared_memory_name "'SYSTEM_TIME_USEC_LSB'"
1546	init "0"
1547	period "xlGetNormalizedPeriod()"
1548	ownership "Owned and initialized elsewhere"
1549	gui_display_data_type "Fixed-point"
1550	arith_type "Unsigned"
1551	n_bits "32"
1552	bin_pt "0"
1553	preci_type "Single"
1554	dbl_ovrd off
1555	xl_use_area off
1556	xl_area "[0,0,0,0,0,0,0]"
1557	has_advanced_control "0"
1558	sggui_pos "-1,-1,-1,-1"
1559	block_type "fromreg"
1560	sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
1561	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
1562	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
1563	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
1564	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
1565	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
1566	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
1567	"out');\nfprintf('','COMMENT: end icon text');"
1568	}
1569	Block {
1570	BlockType Reference
1571	Name "From Register2"
1572	SID "215:205"
1573	Ports [0, 1]
1574	Position [145, 1962, 205, 2018]
1575	AttributesFormatString "<< %<shared_memory_name> >>"
1576	LibraryVersion "1.2"
1577	SourceBlock "xbsIndex_r4/From Register"
1578	SourceType "Xilinx Shared Memory Based From Register Block"
1579	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
1580	shared_memory_name "'MAC_TIME_USEC_MSB'"
1581	init "0"
1582	period "xlGetNormalizedPeriod()"
1583	ownership "Owned and initialized elsewhere"
1584	gui_display_data_type "Fixed-point"
1585	arith_type "Unsigned"
1586	n_bits "32"
1587	bin_pt "0"
1588	preci_type "Single"
1589	dbl_ovrd off
1590	xl_use_area off
1591	xl_area "[0,0,0,0,0,0,0]"
1592	has_advanced_control "0"
1593	sggui_pos "-1,-1,-1,-1"
1594	block_type "fromreg"
1595	sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
1596	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
1597	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
1598	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
1599	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
1600	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
1601	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
1602	"out');\nfprintf('','COMMENT: end icon text');"
1603	}
1604	Block {
1605	BlockType Reference
1606	Name "From Register3"
1607	SID "215:206"
1608	Ports [0, 1]
1609	Position [145, 2067, 205, 2123]
1610	AttributesFormatString "<< %<shared_memory_name> >>"
1611	LibraryVersion "1.2"
1612	SourceBlock "xbsIndex_r4/From Register"
1613	SourceType "Xilinx Shared Memory Based From Register Block"
1614	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
1615	shared_memory_name "'MAC_TIME_USEC_LSB'"
1616	init "0"
1617	period "xlGetNormalizedPeriod()"
1618	ownership "Owned and initialized elsewhere"
1619	gui_display_data_type "Fixed-point"
1620	arith_type "Unsigned"
1621	n_bits "32"
1622	bin_pt "0"
1623	preci_type "Single"
1624	dbl_ovrd off
1625	xl_use_area off
1626	xl_area "[0,0,0,0,0,0,0]"
1627	has_advanced_control "0"
1628	sggui_pos "-1,-1,-1,-1"
1629	block_type "fromreg"
1630	sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
1631	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
1632	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
1633	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
1634	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
1635	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
1636	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d"
1637	"out');\nfprintf('','COMMENT: end icon text');"
1638	}
1639	Block {
1640	BlockType Reference
1641	Name "S_AXI_ARADDR"
1642	SID "215:213"
1643	Ports [1, 1]
1644	Position [145, 115, 210, 135]
1645	LibraryVersion "1.2"
1646	SourceBlock "xbsIndex_r4/Gateway In"
1647	SourceType "Xilinx Gateway In Block"
1648	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
1649	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
1650	"orts."
1651	gui_display_data_type "Fixed-point"
1652	arith_type "Unsigned"
1653	n_bits "32"
1654	bin_pt "0"
1655	preci_type "Single"
1656	exp_width "8"
1657	frac_width "24"
1658	quantization "Round (unbiased: +/- Inf)"
1659	overflow "Saturate"
1660	period "xlGetNormalizedPeriod()"
1661	dbl_ovrd off
1662	timing_constraint "None"
1663	locs_specified off
1664	LOCs "{}"
1665	UseAsADC off
1666	ADCChannel "'1'"
1667	xl_use_area off
1668	xl_area "[0,0,0,0,0,0,0]"
1669	inherit_from_input off
1670	hdl_port "on"
1671	has_advanced_control "0"
1672	sggui_pos "-1,-1,-1,-1"
1673	block_type "gatewayin"
1674	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
1675	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
1676	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
1677	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
1678	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
1679	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
1680	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
1681	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
1682	"on text');"
1683	}
1684	Block {
1685	BlockType Reference
1686	Name "S_AXI_ARBURST"
1687	SID "215:215"
1688	Ports [1, 1]
1689	Position [145, 185, 210, 205]
1690	LibraryVersion "1.2"
1691	SourceBlock "xbsIndex_r4/Gateway In"
1692	SourceType "Xilinx Gateway In Block"
1693	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
1694	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
1695	"orts."
1696	gui_display_data_type "Fixed-point"
1697	arith_type "Unsigned"
1698	n_bits "2"
1699	bin_pt "0"
1700	preci_type "Single"
1701	exp_width "8"
1702	frac_width "24"
1703	quantization "Round (unbiased: +/- Inf)"
1704	overflow "Saturate"
1705	period "xlGetNormalizedPeriod()"
1706	dbl_ovrd off
1707	timing_constraint "None"
1708	locs_specified off
1709	LOCs "{}"
1710	UseAsADC off
1711	ADCChannel "'1'"
1712	xl_use_area off
1713	xl_area "[0,0,0,0,0,0,0]"
1714	inherit_from_input off
1715	hdl_port "on"
1716	has_advanced_control "0"
1717	sggui_pos "-1,-1,-1,-1"
1718	block_type "gatewayin"
1719	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
1720	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
1721	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
1722	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
1723	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
1724	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
1725	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
1726	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
1727	"on text');"
1728	}
1729	Block {
1730	BlockType Reference
1731	Name "S_AXI_ARCACHE"
1732	SID "215:217"
1733	Ports [1, 1]
1734	Position [145, 255, 210, 275]
1735	LibraryVersion "1.2"
1736	SourceBlock "xbsIndex_r4/Gateway In"
1737	SourceType "Xilinx Gateway In Block"
1738	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
1739	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
1740	"orts."
1741	gui_display_data_type "Fixed-point"
1742	arith_type "Unsigned"
1743	n_bits "4"
1744	bin_pt "0"
1745	preci_type "Single"
1746	exp_width "8"
1747	frac_width "24"
1748	quantization "Round (unbiased: +/- Inf)"
1749	overflow "Saturate"
1750	period "xlGetNormalizedPeriod()"
1751	dbl_ovrd off
1752	timing_constraint "None"
1753	locs_specified off
1754	LOCs "{}"
1755	UseAsADC off
1756	ADCChannel "'1'"
1757	xl_use_area off
1758	xl_area "[0,0,0,0,0,0,0]"
1759	inherit_from_input off
1760	hdl_port "on"
1761	has_advanced_control "0"
1762	sggui_pos "-1,-1,-1,-1"
1763	block_type "gatewayin"
1764	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
1765	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
1766	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
1767	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
1768	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
1769	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
1770	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
1771	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
1772	"on text');"
1773	}
1774	Block {
1775	BlockType Reference
1776	Name "S_AXI_ARID"
1777	SID "215:219"
1778	Ports [1, 1]
1779	Position [145, 320, 210, 340]
1780	LibraryVersion "1.2"
1781	SourceBlock "xbsIndex_r4/Gateway In"
1782	SourceType "Xilinx Gateway In Block"
1783	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
1784	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
1785	"orts."
1786	gui_display_data_type "Fixed-point"
1787	arith_type "Unsigned"
1788	n_bits "8"
1789	bin_pt "0"
1790	preci_type "Single"
1791	exp_width "8"
1792	frac_width "24"
1793	quantization "Round (unbiased: +/- Inf)"
1794	overflow "Saturate"
1795	period "xlGetNormalizedPeriod()"
1796	dbl_ovrd off
1797	timing_constraint "None"
1798	locs_specified off
1799	LOCs "{}"
1800	UseAsADC off
1801	ADCChannel "'1'"
1802	xl_use_area off
1803	xl_area "[0,0,0,0,0,0,0]"
1804	inherit_from_input off
1805	hdl_port "on"
1806	has_advanced_control "0"
1807	sggui_pos "-1,-1,-1,-1"
1808	block_type "gatewayin"
1809	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
1810	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
1811	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
1812	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
1813	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
1814	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
1815	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
1816	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
1817	"on text');"
1818	}
1819	Block {
1820	BlockType Reference
1821	Name "S_AXI_ARLEN"
1822	SID "215:221"
1823	Ports [1, 1]
1824	Position [145, 390, 210, 410]
1825	LibraryVersion "1.2"
1826	SourceBlock "xbsIndex_r4/Gateway In"
1827	SourceType "Xilinx Gateway In Block"
1828	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
1829	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
1830	"orts."
1831	gui_display_data_type "Fixed-point"
1832	arith_type "Unsigned"
1833	n_bits "8"
1834	bin_pt "0"
1835	preci_type "Single"
1836	exp_width "8"
1837	frac_width "24"
1838	quantization "Round (unbiased: +/- Inf)"
1839	overflow "Saturate"
1840	period "xlGetNormalizedPeriod()"
1841	dbl_ovrd off
1842	timing_constraint "None"
1843	locs_specified off
1844	LOCs "{}"
1845	UseAsADC off
1846	ADCChannel "'1'"
1847	xl_use_area off
1848	xl_area "[0,0,0,0,0,0,0]"
1849	inherit_from_input off
1850	hdl_port "on"
1851	has_advanced_control "0"
1852	sggui_pos "-1,-1,-1,-1"
1853	block_type "gatewayin"
1854	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
1855	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
1856	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
1857	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
1858	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
1859	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
1860	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
1861	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
1862	"on text');"
1863	}
1864	Block {
1865	BlockType Reference
1866	Name "S_AXI_ARLOCK"
1867	SID "215:223"
1868	Ports [1, 1]
1869	Position [145, 455, 210, 475]
1870	LibraryVersion "1.2"
1871	SourceBlock "xbsIndex_r4/Gateway In"
1872	SourceType "Xilinx Gateway In Block"
1873	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
1874	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
1875	"orts."
1876	gui_display_data_type "Fixed-point"
1877	arith_type "Unsigned"
1878	n_bits "2"
1879	bin_pt "0"
1880	preci_type "Single"
1881	exp_width "8"
1882	frac_width "24"
1883	quantization "Round (unbiased: +/- Inf)"
1884	overflow "Saturate"
1885	period "xlGetNormalizedPeriod()"
1886	dbl_ovrd off
1887	timing_constraint "None"
1888	locs_specified off
1889	LOCs "{}"
1890	UseAsADC off
1891	ADCChannel "'1'"
1892	xl_use_area off
1893	xl_area "[0,0,0,0,0,0,0]"
1894	inherit_from_input off
1895	hdl_port "on"
1896	has_advanced_control "0"
1897	sggui_pos "-1,-1,-1,-1"
1898	block_type "gatewayin"
1899	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
1900	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
1901	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
1902	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
1903	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
1904	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
1905	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
1906	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
1907	"on text');"
1908	}
1909	Block {
1910	BlockType Reference
1911	Name "S_AXI_ARPROT"
1912	SID "215:225"
1913	Ports [1, 1]
1914	Position [145, 525, 210, 545]
1915	LibraryVersion "1.2"
1916	SourceBlock "xbsIndex_r4/Gateway In"
1917	SourceType "Xilinx Gateway In Block"
1918	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
1919	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
1920	"orts."
1921	gui_display_data_type "Fixed-point"
1922	arith_type "Unsigned"
1923	n_bits "3"
1924	bin_pt "0"
1925	preci_type "Single"
1926	exp_width "8"
1927	frac_width "24"
1928	quantization "Round (unbiased: +/- Inf)"
1929	overflow "Saturate"
1930	period "xlGetNormalizedPeriod()"
1931	dbl_ovrd off
1932	timing_constraint "None"
1933	locs_specified off
1934	LOCs "{}"
1935	UseAsADC off
1936	ADCChannel "'1'"
1937	xl_use_area off
1938	xl_area "[0,0,0,0,0,0,0]"
1939	inherit_from_input off
1940	hdl_port "on"
1941	has_advanced_control "0"
1942	sggui_pos "-1,-1,-1,-1"
1943	block_type "gatewayin"
1944	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
1945	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
1946	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
1947	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
1948	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
1949	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
1950	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
1951	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
1952	"on text');"
1953	}
1954	Block {
1955	BlockType Reference
1956	Name "S_AXI_ARREADY"
1957	SID "215:261"
1958	Ports [1, 1]
1959	Position [660, 520, 720, 540]
1960	LibraryVersion "1.2"
1961	SourceBlock "xbsIndex_r4/Gateway Out"
1962	SourceType "Xilinx Gateway Out Block"
1963	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
1964	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
1965	"put ports or are discarded, depending on how they are configured."
1966	inherit_from_input off
1967	hdl_port on
1968	timing_constraint "None"
1969	locs_specified off
1970	LOCs "{}"
1971	UseAsDAC off
1972	DACChannel "'1'"
1973	xl_use_area off
1974	xl_area "[0,0,0,0,0,0,0]"
1975	has_advanced_control "0"
1976	sggui_pos "-1,-1,-1,-1"
1977	block_type "gatewayout"
1978	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
1979	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
1980	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
1981	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
1982	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
1983	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
1984	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
1985	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
1986	"con text');"
1987	}
1988	Block {
1989	BlockType Reference
1990	Name "S_AXI_ARSIZE"
1991	SID "215:227"
1992	Ports [1, 1]
1993	Position [145, 595, 210, 615]
1994	LibraryVersion "1.2"
1995	SourceBlock "xbsIndex_r4/Gateway In"
1996	SourceType "Xilinx Gateway In Block"
1997	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
1998	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
1999	"orts."
2000	gui_display_data_type "Fixed-point"
2001	arith_type "Unsigned"
2002	n_bits "3"
2003	bin_pt "0"
2004	preci_type "Single"
2005	exp_width "8"
2006	frac_width "24"
2007	quantization "Round (unbiased: +/- Inf)"
2008	overflow "Saturate"
2009	period "xlGetNormalizedPeriod()"
2010	dbl_ovrd off
2011	timing_constraint "None"
2012	locs_specified off
2013	LOCs "{}"
2014	UseAsADC off
2015	ADCChannel "'1'"
2016	xl_use_area off
2017	xl_area "[0,0,0,0,0,0,0]"
2018	inherit_from_input off
2019	hdl_port "on"
2020	has_advanced_control "0"
2021	sggui_pos "-1,-1,-1,-1"
2022	block_type "gatewayin"
2023	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2024	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2025	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2026	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2027	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2028	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2029	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2030	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2031	"on text');"
2032	}
2033	Block {
2034	BlockType Reference
2035	Name "S_AXI_ARVALID"
2036	SID "215:229"
2037	Ports [1, 1]
2038	Position [145, 660, 210, 680]
2039	LibraryVersion "1.2"
2040	SourceBlock "xbsIndex_r4/Gateway In"
2041	SourceType "Xilinx Gateway In Block"
2042	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2043	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2044	"orts."
2045	gui_display_data_type "Fixed-point"
2046	arith_type "Boolean"
2047	n_bits "16"
2048	bin_pt "14"
2049	preci_type "Single"
2050	exp_width "8"
2051	frac_width "24"
2052	quantization "Round (unbiased: +/- Inf)"
2053	overflow "Saturate"
2054	period "xlGetNormalizedPeriod()"
2055	dbl_ovrd off
2056	timing_constraint "None"
2057	locs_specified off
2058	LOCs "{}"
2059	UseAsADC off
2060	ADCChannel "'1'"
2061	xl_use_area off
2062	xl_area "[0,0,0,0,0,0,0]"
2063	inherit_from_input off
2064	hdl_port "on"
2065	has_advanced_control "0"
2066	sggui_pos "-1,-1,-1,-1"
2067	block_type "gatewayin"
2068	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2069	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2070	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2071	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2072	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2073	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2074	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2075	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2076	"on text');"
2077	}
2078	Block {
2079	BlockType Reference
2080	Name "S_AXI_AWADDR"
2081	SID "215:231"
2082	Ports [1, 1]
2083	Position [145, 730, 210, 750]
2084	LibraryVersion "1.2"
2085	SourceBlock "xbsIndex_r4/Gateway In"
2086	SourceType "Xilinx Gateway In Block"
2087	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2088	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2089	"orts."
2090	gui_display_data_type "Fixed-point"
2091	arith_type "Unsigned"
2092	n_bits "32"
2093	bin_pt "0"
2094	preci_type "Single"
2095	exp_width "8"
2096	frac_width "24"
2097	quantization "Round (unbiased: +/- Inf)"
2098	overflow "Saturate"
2099	period "xlGetNormalizedPeriod()"
2100	dbl_ovrd off
2101	timing_constraint "None"
2102	locs_specified off
2103	LOCs "{}"
2104	UseAsADC off
2105	ADCChannel "'1'"
2106	xl_use_area off
2107	xl_area "[0,0,0,0,0,0,0]"
2108	inherit_from_input off
2109	hdl_port "on"
2110	has_advanced_control "0"
2111	sggui_pos "-1,-1,-1,-1"
2112	block_type "gatewayin"
2113	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2114	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2115	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2116	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2117	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2118	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2119	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2120	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2121	"on text');"
2122	}
2123	Block {
2124	BlockType Reference
2125	Name "S_AXI_AWBURST"
2126	SID "215:233"
2127	Ports [1, 1]
2128	Position [145, 795, 210, 815]
2129	LibraryVersion "1.2"
2130	SourceBlock "xbsIndex_r4/Gateway In"
2131	SourceType "Xilinx Gateway In Block"
2132	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2133	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2134	"orts."
2135	gui_display_data_type "Fixed-point"
2136	arith_type "Unsigned"
2137	n_bits "2"
2138	bin_pt "0"
2139	preci_type "Single"
2140	exp_width "8"
2141	frac_width "24"
2142	quantization "Round (unbiased: +/- Inf)"
2143	overflow "Saturate"
2144	period "xlGetNormalizedPeriod()"
2145	dbl_ovrd off
2146	timing_constraint "None"
2147	locs_specified off
2148	LOCs "{}"
2149	UseAsADC off
2150	ADCChannel "'1'"
2151	xl_use_area off
2152	xl_area "[0,0,0,0,0,0,0]"
2153	inherit_from_input off
2154	hdl_port "on"
2155	has_advanced_control "0"
2156	sggui_pos "-1,-1,-1,-1"
2157	block_type "gatewayin"
2158	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2159	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2160	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2161	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2162	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2163	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2164	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2165	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2166	"on text');"
2167	}
2168	Block {
2169	BlockType Reference
2170	Name "S_AXI_AWCACHE"
2171	SID "215:235"
2172	Ports [1, 1]
2173	Position [145, 865, 210, 885]
2174	LibraryVersion "1.2"
2175	SourceBlock "xbsIndex_r4/Gateway In"
2176	SourceType "Xilinx Gateway In Block"
2177	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2178	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2179	"orts."
2180	gui_display_data_type "Fixed-point"
2181	arith_type "Unsigned"
2182	n_bits "4"
2183	bin_pt "0"
2184	preci_type "Single"
2185	exp_width "8"
2186	frac_width "24"
2187	quantization "Round (unbiased: +/- Inf)"
2188	overflow "Saturate"
2189	period "xlGetNormalizedPeriod()"
2190	dbl_ovrd off
2191	timing_constraint "None"
2192	locs_specified off
2193	LOCs "{}"
2194	UseAsADC off
2195	ADCChannel "'1'"
2196	xl_use_area off
2197	xl_area "[0,0,0,0,0,0,0]"
2198	inherit_from_input off
2199	hdl_port "on"
2200	has_advanced_control "0"
2201	sggui_pos "-1,-1,-1,-1"
2202	block_type "gatewayin"
2203	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2204	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2205	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2206	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2207	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2208	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2209	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2210	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2211	"on text');"
2212	}
2213	Block {
2214	BlockType Reference
2215	Name "S_AXI_AWID"
2216	SID "215:237"
2217	Ports [1, 1]
2218	Position [145, 935, 210, 955]
2219	LibraryVersion "1.2"
2220	SourceBlock "xbsIndex_r4/Gateway In"
2221	SourceType "Xilinx Gateway In Block"
2222	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2223	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2224	"orts."
2225	gui_display_data_type "Fixed-point"
2226	arith_type "Unsigned"
2227	n_bits "8"
2228	bin_pt "0"
2229	preci_type "Single"
2230	exp_width "8"
2231	frac_width "24"
2232	quantization "Round (unbiased: +/- Inf)"
2233	overflow "Saturate"
2234	period "xlGetNormalizedPeriod()"
2235	dbl_ovrd off
2236	timing_constraint "None"
2237	locs_specified off
2238	LOCs "{}"
2239	UseAsADC off
2240	ADCChannel "'1'"
2241	xl_use_area off
2242	xl_area "[0,0,0,0,0,0,0]"
2243	inherit_from_input off
2244	hdl_port "on"
2245	has_advanced_control "0"
2246	sggui_pos "-1,-1,-1,-1"
2247	block_type "gatewayin"
2248	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2249	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2250	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2251	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2252	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2253	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2254	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2255	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2256	"on text');"
2257	}
2258	Block {
2259	BlockType Reference
2260	Name "S_AXI_AWLEN"
2261	SID "215:239"
2262	Ports [1, 1]
2263	Position [145, 1000, 210, 1020]
2264	LibraryVersion "1.2"
2265	SourceBlock "xbsIndex_r4/Gateway In"
2266	SourceType "Xilinx Gateway In Block"
2267	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2268	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2269	"orts."
2270	gui_display_data_type "Fixed-point"
2271	arith_type "Unsigned"
2272	n_bits "8"
2273	bin_pt "0"
2274	preci_type "Single"
2275	exp_width "8"
2276	frac_width "24"
2277	quantization "Round (unbiased: +/- Inf)"
2278	overflow "Saturate"
2279	period "xlGetNormalizedPeriod()"
2280	dbl_ovrd off
2281	timing_constraint "None"
2282	locs_specified off
2283	LOCs "{}"
2284	UseAsADC off
2285	ADCChannel "'1'"
2286	xl_use_area off
2287	xl_area "[0,0,0,0,0,0,0]"
2288	inherit_from_input off
2289	hdl_port "on"
2290	has_advanced_control "0"
2291	sggui_pos "-1,-1,-1,-1"
2292	block_type "gatewayin"
2293	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2294	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2295	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2296	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2297	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2298	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2299	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2300	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2301	"on text');"
2302	}
2303	Block {
2304	BlockType Reference
2305	Name "S_AXI_AWLOCK"
2306	SID "215:241"
2307	Ports [1, 1]
2308	Position [145, 1070, 210, 1090]
2309	LibraryVersion "1.2"
2310	SourceBlock "xbsIndex_r4/Gateway In"
2311	SourceType "Xilinx Gateway In Block"
2312	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2313	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2314	"orts."
2315	gui_display_data_type "Fixed-point"
2316	arith_type "Unsigned"
2317	n_bits "2"
2318	bin_pt "0"
2319	preci_type "Single"
2320	exp_width "8"
2321	frac_width "24"
2322	quantization "Round (unbiased: +/- Inf)"
2323	overflow "Saturate"
2324	period "xlGetNormalizedPeriod()"
2325	dbl_ovrd off
2326	timing_constraint "None"
2327	locs_specified off
2328	LOCs "{}"
2329	UseAsADC off
2330	ADCChannel "'1'"
2331	xl_use_area off
2332	xl_area "[0,0,0,0,0,0,0]"
2333	inherit_from_input off
2334	hdl_port "on"
2335	has_advanced_control "0"
2336	sggui_pos "-1,-1,-1,-1"
2337	block_type "gatewayin"
2338	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2339	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2340	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2341	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2342	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2343	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2344	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2345	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2346	"on text');"
2347	}
2348	Block {
2349	BlockType Reference
2350	Name "S_AXI_AWPROT"
2351	SID "215:243"
2352	Ports [1, 1]
2353	Position [145, 1135, 210, 1155]
2354	LibraryVersion "1.2"
2355	SourceBlock "xbsIndex_r4/Gateway In"
2356	SourceType "Xilinx Gateway In Block"
2357	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2358	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2359	"orts."
2360	gui_display_data_type "Fixed-point"
2361	arith_type "Unsigned"
2362	n_bits "3"
2363	bin_pt "0"
2364	preci_type "Single"
2365	exp_width "8"
2366	frac_width "24"
2367	quantization "Round (unbiased: +/- Inf)"
2368	overflow "Saturate"
2369	period "xlGetNormalizedPeriod()"
2370	dbl_ovrd off
2371	timing_constraint "None"
2372	locs_specified off
2373	LOCs "{}"
2374	UseAsADC off
2375	ADCChannel "'1'"
2376	xl_use_area off
2377	xl_area "[0,0,0,0,0,0,0]"
2378	inherit_from_input off
2379	hdl_port "on"
2380	has_advanced_control "0"
2381	sggui_pos "-1,-1,-1,-1"
2382	block_type "gatewayin"
2383	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2384	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2385	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2386	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2387	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2388	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2389	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2390	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2391	"on text');"
2392	}
2393	Block {
2394	BlockType Reference
2395	Name "S_AXI_AWREADY"
2396	SID "215:263"
2397	Ports [1, 1]
2398	Position [660, 585, 720, 605]
2399	LibraryVersion "1.2"
2400	SourceBlock "xbsIndex_r4/Gateway Out"
2401	SourceType "Xilinx Gateway Out Block"
2402	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
2403	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
2404	"put ports or are discarded, depending on how they are configured."
2405	inherit_from_input off
2406	hdl_port on
2407	timing_constraint "None"
2408	locs_specified off
2409	LOCs "{}"
2410	UseAsDAC off
2411	DACChannel "'1'"
2412	xl_use_area off
2413	xl_area "[0,0,0,0,0,0,0]"
2414	has_advanced_control "0"
2415	sggui_pos "-1,-1,-1,-1"
2416	block_type "gatewayout"
2417	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
2418	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2419	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
2420	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
2421	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2422	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2423	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2424	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
2425	"con text');"
2426	}
2427	Block {
2428	BlockType Reference
2429	Name "S_AXI_AWSIZE"
2430	SID "215:245"
2431	Ports [1, 1]
2432	Position [145, 1205, 210, 1225]
2433	LibraryVersion "1.2"
2434	SourceBlock "xbsIndex_r4/Gateway In"
2435	SourceType "Xilinx Gateway In Block"
2436	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2437	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2438	"orts."
2439	gui_display_data_type "Fixed-point"
2440	arith_type "Unsigned"
2441	n_bits "3"
2442	bin_pt "0"
2443	preci_type "Single"
2444	exp_width "8"
2445	frac_width "24"
2446	quantization "Round (unbiased: +/- Inf)"
2447	overflow "Saturate"
2448	period "xlGetNormalizedPeriod()"
2449	dbl_ovrd off
2450	timing_constraint "None"
2451	locs_specified off
2452	LOCs "{}"
2453	UseAsADC off
2454	ADCChannel "'1'"
2455	xl_use_area off
2456	xl_area "[0,0,0,0,0,0,0]"
2457	inherit_from_input off
2458	hdl_port "on"
2459	has_advanced_control "0"
2460	sggui_pos "-1,-1,-1,-1"
2461	block_type "gatewayin"
2462	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2463	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2464	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2465	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2466	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2467	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2468	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2469	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2470	"on text');"
2471	}
2472	Block {
2473	BlockType Reference
2474	Name "S_AXI_AWVALID"
2475	SID "215:247"
2476	Ports [1, 1]
2477	Position [145, 1275, 210, 1295]
2478	LibraryVersion "1.2"
2479	SourceBlock "xbsIndex_r4/Gateway In"
2480	SourceType "Xilinx Gateway In Block"
2481	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2482	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2483	"orts."
2484	gui_display_data_type "Fixed-point"
2485	arith_type "Boolean"
2486	n_bits "16"
2487	bin_pt "14"
2488	preci_type "Single"
2489	exp_width "8"
2490	frac_width "24"
2491	quantization "Round (unbiased: +/- Inf)"
2492	overflow "Saturate"
2493	period "xlGetNormalizedPeriod()"
2494	dbl_ovrd off
2495	timing_constraint "None"
2496	locs_specified off
2497	LOCs "{}"
2498	UseAsADC off
2499	ADCChannel "'1'"
2500	xl_use_area off
2501	xl_area "[0,0,0,0,0,0,0]"
2502	inherit_from_input off
2503	hdl_port "on"
2504	has_advanced_control "0"
2505	sggui_pos "-1,-1,-1,-1"
2506	block_type "gatewayin"
2507	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2508	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2509	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2510	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2511	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2512	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2513	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2514	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2515	"on text');"
2516	}
2517	Block {
2518	BlockType Reference
2519	Name "S_AXI_BID"
2520	SID "215:265"
2521	Ports [1, 1]
2522	Position [660, 655, 720, 675]
2523	LibraryVersion "1.2"
2524	SourceBlock "xbsIndex_r4/Gateway Out"
2525	SourceType "Xilinx Gateway Out Block"
2526	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
2527	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
2528	"put ports or are discarded, depending on how they are configured."
2529	inherit_from_input off
2530	hdl_port on
2531	timing_constraint "None"
2532	locs_specified off
2533	LOCs "{}"
2534	UseAsDAC off
2535	DACChannel "'1'"
2536	xl_use_area off
2537	xl_area "[0,0,0,0,0,0,0]"
2538	has_advanced_control "0"
2539	sggui_pos "-1,-1,-1,-1"
2540	block_type "gatewayout"
2541	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
2542	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2543	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
2544	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
2545	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2546	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2547	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2548	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
2549	"con text');"
2550	}
2551	Block {
2552	BlockType Reference
2553	Name "S_AXI_BREADY"
2554	SID "215:249"
2555	Ports [1, 1]
2556	Position [145, 1340, 210, 1360]
2557	LibraryVersion "1.2"
2558	SourceBlock "xbsIndex_r4/Gateway In"
2559	SourceType "Xilinx Gateway In Block"
2560	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2561	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2562	"orts."
2563	gui_display_data_type "Fixed-point"
2564	arith_type "Boolean"
2565	n_bits "16"
2566	bin_pt "14"
2567	preci_type "Single"
2568	exp_width "8"
2569	frac_width "24"
2570	quantization "Round (unbiased: +/- Inf)"
2571	overflow "Saturate"
2572	period "xlGetNormalizedPeriod()"
2573	dbl_ovrd off
2574	timing_constraint "None"
2575	locs_specified off
2576	LOCs "{}"
2577	UseAsADC off
2578	ADCChannel "'1'"
2579	xl_use_area off
2580	xl_area "[0,0,0,0,0,0,0]"
2581	inherit_from_input off
2582	hdl_port "on"
2583	has_advanced_control "0"
2584	sggui_pos "-1,-1,-1,-1"
2585	block_type "gatewayin"
2586	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2587	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2588	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2589	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2590	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2591	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2592	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2593	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2594	"on text');"
2595	}
2596	Block {
2597	BlockType Reference
2598	Name "S_AXI_BRESP"
2599	SID "215:267"
2600	Ports [1, 1]
2601	Position [660, 725, 720, 745]
2602	LibraryVersion "1.2"
2603	SourceBlock "xbsIndex_r4/Gateway Out"
2604	SourceType "Xilinx Gateway Out Block"
2605	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
2606	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
2607	"put ports or are discarded, depending on how they are configured."
2608	inherit_from_input off
2609	hdl_port on
2610	timing_constraint "None"
2611	locs_specified off
2612	LOCs "{}"
2613	UseAsDAC off
2614	DACChannel "'1'"
2615	xl_use_area off
2616	xl_area "[0,0,0,0,0,0,0]"
2617	has_advanced_control "0"
2618	sggui_pos "-1,-1,-1,-1"
2619	block_type "gatewayout"
2620	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
2621	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2622	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
2623	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
2624	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2625	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2626	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2627	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
2628	"con text');"
2629	}
2630	Block {
2631	BlockType Reference
2632	Name "S_AXI_BVALID"
2633	SID "215:269"
2634	Ports [1, 1]
2635	Position [660, 790, 720, 810]
2636	LibraryVersion "1.2"
2637	SourceBlock "xbsIndex_r4/Gateway Out"
2638	SourceType "Xilinx Gateway Out Block"
2639	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
2640	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
2641	"put ports or are discarded, depending on how they are configured."
2642	inherit_from_input off
2643	hdl_port on
2644	timing_constraint "None"
2645	locs_specified off
2646	LOCs "{}"
2647	UseAsDAC off
2648	DACChannel "'1'"
2649	xl_use_area off
2650	xl_area "[0,0,0,0,0,0,0]"
2651	has_advanced_control "0"
2652	sggui_pos "-1,-1,-1,-1"
2653	block_type "gatewayout"
2654	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
2655	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2656	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
2657	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
2658	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2659	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2660	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2661	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
2662	"con text');"
2663	}
2664	Block {
2665	BlockType Reference
2666	Name "S_AXI_RDATA"
2667	SID "215:271"
2668	Ports [1, 1]
2669	Position [660, 860, 720, 880]
2670	LibraryVersion "1.2"
2671	SourceBlock "xbsIndex_r4/Gateway Out"
2672	SourceType "Xilinx Gateway Out Block"
2673	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
2674	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
2675	"put ports or are discarded, depending on how they are configured."
2676	inherit_from_input off
2677	hdl_port on
2678	timing_constraint "None"
2679	locs_specified off
2680	LOCs "{}"
2681	UseAsDAC off
2682	DACChannel "'1'"
2683	xl_use_area off
2684	xl_area "[0,0,0,0,0,0,0]"
2685	has_advanced_control "0"
2686	sggui_pos "-1,-1,-1,-1"
2687	block_type "gatewayout"
2688	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
2689	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2690	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
2691	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
2692	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2693	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2694	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2695	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
2696	"con text');"
2697	}
2698	Block {
2699	BlockType Reference
2700	Name "S_AXI_RID"
2701	SID "215:273"
2702	Ports [1, 1]
2703	Position [660, 925, 720, 945]
2704	LibraryVersion "1.2"
2705	SourceBlock "xbsIndex_r4/Gateway Out"
2706	SourceType "Xilinx Gateway Out Block"
2707	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
2708	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
2709	"put ports or are discarded, depending on how they are configured."
2710	inherit_from_input off
2711	hdl_port on
2712	timing_constraint "None"
2713	locs_specified off
2714	LOCs "{}"
2715	UseAsDAC off
2716	DACChannel "'1'"
2717	xl_use_area off
2718	xl_area "[0,0,0,0,0,0,0]"
2719	has_advanced_control "0"
2720	sggui_pos "-1,-1,-1,-1"
2721	block_type "gatewayout"
2722	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
2723	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2724	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
2725	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
2726	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2727	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2728	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2729	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
2730	"con text');"
2731	}
2732	Block {
2733	BlockType Reference
2734	Name "S_AXI_RLAST"
2735	SID "215:275"
2736	Ports [1, 1]
2737	Position [660, 995, 720, 1015]
2738	LibraryVersion "1.2"
2739	SourceBlock "xbsIndex_r4/Gateway Out"
2740	SourceType "Xilinx Gateway Out Block"
2741	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
2742	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
2743	"put ports or are discarded, depending on how they are configured."
2744	inherit_from_input off
2745	hdl_port on
2746	timing_constraint "None"
2747	locs_specified off
2748	LOCs "{}"
2749	UseAsDAC off
2750	DACChannel "'1'"
2751	xl_use_area off
2752	xl_area "[0,0,0,0,0,0,0]"
2753	has_advanced_control "0"
2754	sggui_pos "-1,-1,-1,-1"
2755	block_type "gatewayout"
2756	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
2757	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2758	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
2759	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
2760	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2761	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2762	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2763	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
2764	"con text');"
2765	}
2766	Block {
2767	BlockType Reference
2768	Name "S_AXI_RREADY"
2769	SID "215:251"
2770	Ports [1, 1]
2771	Position [145, 1410, 210, 1430]
2772	LibraryVersion "1.2"
2773	SourceBlock "xbsIndex_r4/Gateway In"
2774	SourceType "Xilinx Gateway In Block"
2775	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2776	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2777	"orts."
2778	gui_display_data_type "Fixed-point"
2779	arith_type "Boolean"
2780	n_bits "16"
2781	bin_pt "14"
2782	preci_type "Single"
2783	exp_width "8"
2784	frac_width "24"
2785	quantization "Round (unbiased: +/- Inf)"
2786	overflow "Saturate"
2787	period "xlGetNormalizedPeriod()"
2788	dbl_ovrd off
2789	timing_constraint "None"
2790	locs_specified off
2791	LOCs "{}"
2792	UseAsADC off
2793	ADCChannel "'1'"
2794	xl_use_area off
2795	xl_area "[0,0,0,0,0,0,0]"
2796	inherit_from_input off
2797	hdl_port "on"
2798	has_advanced_control "0"
2799	sggui_pos "-1,-1,-1,-1"
2800	block_type "gatewayin"
2801	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2802	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2803	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2804	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2805	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2806	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2807	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2808	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2809	"on text');"
2810	}
2811	Block {
2812	BlockType Reference
2813	Name "S_AXI_RRESP"
2814	SID "215:277"
2815	Ports [1, 1]
2816	Position [660, 1065, 720, 1085]
2817	LibraryVersion "1.2"
2818	SourceBlock "xbsIndex_r4/Gateway Out"
2819	SourceType "Xilinx Gateway Out Block"
2820	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
2821	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
2822	"put ports or are discarded, depending on how they are configured."
2823	inherit_from_input off
2824	hdl_port on
2825	timing_constraint "None"
2826	locs_specified off
2827	LOCs "{}"
2828	UseAsDAC off
2829	DACChannel "'1'"
2830	xl_use_area off
2831	xl_area "[0,0,0,0,0,0,0]"
2832	has_advanced_control "0"
2833	sggui_pos "-1,-1,-1,-1"
2834	block_type "gatewayout"
2835	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
2836	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2837	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
2838	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
2839	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2840	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2841	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2842	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
2843	"con text');"
2844	}
2845	Block {
2846	BlockType Reference
2847	Name "S_AXI_RVALID"
2848	SID "215:279"
2849	Ports [1, 1]
2850	Position [660, 1130, 720, 1150]
2851	LibraryVersion "1.2"
2852	SourceBlock "xbsIndex_r4/Gateway Out"
2853	SourceType "Xilinx Gateway Out Block"
2854	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
2855	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
2856	"put ports or are discarded, depending on how they are configured."
2857	inherit_from_input off
2858	hdl_port on
2859	timing_constraint "None"
2860	locs_specified off
2861	LOCs "{}"
2862	UseAsDAC off
2863	DACChannel "'1'"
2864	xl_use_area off
2865	xl_area "[0,0,0,0,0,0,0]"
2866	has_advanced_control "0"
2867	sggui_pos "-1,-1,-1,-1"
2868	block_type "gatewayout"
2869	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
2870	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2871	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
2872	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
2873	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2874	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2875	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2876	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
2877	"con text');"
2878	}
2879	Block {
2880	BlockType Reference
2881	Name "S_AXI_WDATA"
2882	SID "215:253"
2883	Ports [1, 1]
2884	Position [145, 1475, 210, 1495]
2885	LibraryVersion "1.2"
2886	SourceBlock "xbsIndex_r4/Gateway In"
2887	SourceType "Xilinx Gateway In Block"
2888	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2889	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2890	"orts."
2891	gui_display_data_type "Fixed-point"
2892	arith_type "Unsigned"
2893	n_bits "32"
2894	bin_pt "0"
2895	preci_type "Single"
2896	exp_width "8"
2897	frac_width "24"
2898	quantization "Round (unbiased: +/- Inf)"
2899	overflow "Saturate"
2900	period "xlGetNormalizedPeriod()"
2901	dbl_ovrd off
2902	timing_constraint "None"
2903	locs_specified off
2904	LOCs "{}"
2905	UseAsADC off
2906	ADCChannel "'1'"
2907	xl_use_area off
2908	xl_area "[0,0,0,0,0,0,0]"
2909	inherit_from_input off
2910	hdl_port "on"
2911	has_advanced_control "0"
2912	sggui_pos "-1,-1,-1,-1"
2913	block_type "gatewayin"
2914	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2915	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2916	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2917	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2918	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2919	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2920	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2921	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2922	"on text');"
2923	}
2924	Block {
2925	BlockType Reference
2926	Name "S_AXI_WLAST"
2927	SID "215:255"
2928	Ports [1, 1]
2929	Position [145, 1545, 210, 1565]
2930	LibraryVersion "1.2"
2931	SourceBlock "xbsIndex_r4/Gateway In"
2932	SourceType "Xilinx Gateway In Block"
2933	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
2934	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
2935	"orts."
2936	gui_display_data_type "Fixed-point"
2937	arith_type "Boolean"
2938	n_bits "16"
2939	bin_pt "14"
2940	preci_type "Single"
2941	exp_width "8"
2942	frac_width "24"
2943	quantization "Round (unbiased: +/- Inf)"
2944	overflow "Saturate"
2945	period "xlGetNormalizedPeriod()"
2946	dbl_ovrd off
2947	timing_constraint "None"
2948	locs_specified off
2949	LOCs "{}"
2950	UseAsADC off
2951	ADCChannel "'1'"
2952	xl_use_area off
2953	xl_area "[0,0,0,0,0,0,0]"
2954	inherit_from_input off
2955	hdl_port "on"
2956	has_advanced_control "0"
2957	sggui_pos "-1,-1,-1,-1"
2958	block_type "gatewayin"
2959	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
2960	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2961	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
2962	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
2963	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2964	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2965	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
2966	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
2967	"on text');"
2968	}
2969	Block {
2970	BlockType Reference
2971	Name "S_AXI_WREADY"
2972	SID "215:281"
2973	Ports [1, 1]
2974	Position [660, 1200, 720, 1220]
2975	LibraryVersion "1.2"
2976	SourceBlock "xbsIndex_r4/Gateway Out"
2977	SourceType "Xilinx Gateway Out Block"
2978	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu"
2979	"link integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top level out"
2980	"put ports or are discarded, depending on how they are configured."
2981	inherit_from_input off
2982	hdl_port on
2983	timing_constraint "None"
2984	locs_specified off
2985	LOCs "{}"
2986	UseAsDAC off
2987	DACChannel "'1'"
2988	xl_use_area off
2989	xl_area "[0,0,0,0,0,0,0]"
2990	has_advanced_control "0"
2991	sggui_pos "-1,-1,-1,-1"
2992	block_type "gatewayout"
2993	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
2994	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
2995	" ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1"
2996	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10"
2997	".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
2998	"h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
2999	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
3000	" ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i"
3001	"con text');"
3002	}
3003	Block {
3004	BlockType Reference
3005	Name "S_AXI_WSTRB"
3006	SID "215:257"
3007	Ports [1, 1]
3008	Position [145, 1615, 210, 1635]
3009	LibraryVersion "1.2"
3010	SourceBlock "xbsIndex_r4/Gateway In"
3011	SourceType "Xilinx Gateway In Block"
3012	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
3013	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
3014	"orts."
3015	gui_display_data_type "Fixed-point"
3016	arith_type "Unsigned"
3017	n_bits "4"
3018	bin_pt "0"
3019	preci_type "Single"
3020	exp_width "8"
3021	frac_width "24"
3022	quantization "Round (unbiased: +/- Inf)"
3023	overflow "Saturate"
3024	period "xlGetNormalizedPeriod()"
3025	dbl_ovrd off
3026	timing_constraint "None"
3027	locs_specified off
3028	LOCs "{}"
3029	UseAsADC off
3030	ADCChannel "'1'"
3031	xl_use_area off
3032	xl_area "[0,0,0,0,0,0,0]"
3033	inherit_from_input off
3034	hdl_port "on"
3035	has_advanced_control "0"
3036	sggui_pos "-1,-1,-1,-1"
3037	block_type "gatewayin"
3038	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
3039	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
3040	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
3041	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
3042	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
3043	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
3044	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
3045	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
3046	"on text');"
3047	}
3048	Block {
3049	BlockType Reference
3050	Name "S_AXI_WVALID"
3051	SID "215:259"
3052	Ports [1, 1]
3053	Position [145, 1680, 210, 1700]
3054	LibraryVersion "1.2"
3055	SourceBlock "xbsIndex_r4/Gateway In"
3056	SourceType "Xilinx Gateway In Block"
3057	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx"
3058	" fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input p"
3059	"orts."
3060	gui_display_data_type "Fixed-point"
3061	arith_type "Boolean"
3062	n_bits "16"
3063	bin_pt "14"
3064	preci_type "Single"
3065	exp_width "8"
3066	frac_width "24"
3067	quantization "Round (unbiased: +/- Inf)"
3068	overflow "Saturate"
3069	period "xlGetNormalizedPeriod()"
3070	dbl_ovrd off
3071	timing_constraint "None"
3072	locs_specified off
3073	LOCs "{}"
3074	UseAsADC off
3075	ADCChannel "'1'"
3076	xl_use_area off
3077	xl_area "[0,0,0,0,0,0,0]"
3078	inherit_from_input off
3079	hdl_port "on"
3080	has_advanced_control "0"
3081	sggui_pos "-1,-1,-1,-1"
3082	block_type "gatewayin"
3083	sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
3084	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65"
3085	" ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1"
3086	"4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10"
3087	".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc"
3088	"h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint"
3089	"f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'"
3090	"\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic"
3091	"on text');"
3092	}
3093	Block {
3094	BlockType Terminator
3095	Name "Terminator"
3096	SID "215:260"
3097	Position [820, 520, 840, 540]
3098	ShowName off
3099	MaskIconFrame on
3100	MaskIconOpaque on
3101	MaskIconRotate "none"
3102	MaskPortRotate "default"
3103	MaskIconUnits "autoscale"
3104	}
3105	Block {
3106	BlockType Terminator
3107	Name "Terminator1"
3108	SID "215:262"
3109	Position [820, 585, 840, 605]
3110	ShowName off
3111	MaskIconFrame on
3112	MaskIconOpaque on
3113	MaskIconRotate "none"
3114	MaskPortRotate "default"
3115	MaskIconUnits "autoscale"
3116	}
3117	Block {
3118	BlockType Terminator
3119	Name "Terminator10"
3120	SID "215:280"
3121	Position [820, 1200, 840, 1220]
3122	ShowName off
3123	MaskIconFrame on
3124	MaskIconOpaque on
3125	MaskIconRotate "none"
3126	MaskPortRotate "default"
3127	MaskIconUnits "autoscale"
3128	}
3129	Block {
3130	BlockType Terminator
3131	Name "Terminator2"
3132	SID "215:264"
3133	Position [820, 655, 840, 675]
3134	ShowName off
3135	MaskIconFrame on
3136	MaskIconOpaque on
3137	MaskIconRotate "none"
3138	MaskPortRotate "default"
3139	MaskIconUnits "autoscale"
3140	}
3141	Block {
3142	BlockType Terminator
3143	Name "Terminator3"
3144	SID "215:266"
3145	Position [820, 725, 840, 745]
3146	ShowName off
3147	MaskIconFrame on
3148	MaskIconOpaque on
3149	MaskIconRotate "none"
3150	MaskPortRotate "default"
3151	MaskIconUnits "autoscale"
3152	}
3153	Block {
3154	BlockType Terminator
3155	Name "Terminator4"
3156	SID "215:268"
3157	Position [820, 790, 840, 810]
3158	ShowName off
3159	MaskIconFrame on
3160	MaskIconOpaque on
3161	MaskIconRotate "none"
3162	MaskPortRotate "default"
3163	MaskIconUnits "autoscale"
3164	}
3165	Block {
3166	BlockType Terminator
3167	Name "Terminator5"
3168	SID "215:270"
3169	Position [820, 860, 840, 880]
3170	ShowName off
3171	MaskIconFrame on
3172	MaskIconOpaque on
3173	MaskIconRotate "none"
3174	MaskPortRotate "default"
3175	MaskIconUnits "autoscale"
3176	}
3177	Block {
3178	BlockType Terminator
3179	Name "Terminator6"
3180	SID "215:272"
3181	Position [820, 925, 840, 945]
3182	ShowName off
3183	MaskIconFrame on
3184	MaskIconOpaque on
3185	MaskIconRotate "none"
3186	MaskPortRotate "default"
3187	MaskIconUnits "autoscale"
3188	}
3189	Block {
3190	BlockType Terminator
3191	Name "Terminator7"
3192	SID "215:274"
3193	Position [820, 995, 840, 1015]
3194	ShowName off
3195	MaskIconFrame on
3196	MaskIconOpaque on
3197	MaskIconRotate "none"
3198	MaskPortRotate "default"
3199	MaskIconUnits "autoscale"
3200	}
3201	Block {
3202	BlockType Terminator
3203	Name "Terminator8"
3204	SID "215:276"
3205	Position [820, 1065, 840, 1085]
3206	ShowName off
3207	MaskIconFrame on
3208	MaskIconOpaque on
3209	MaskIconRotate "none"
3210	MaskPortRotate "default"
3211	MaskIconUnits "autoscale"
3212	}
3213	Block {
3214	BlockType Terminator
3215	Name "Terminator9"
3216	SID "215:278"
3217	Position [820, 1130, 840, 1150]
3218	ShowName off
3219	MaskIconFrame on
3220	MaskIconOpaque on
3221	MaskIconRotate "none"
3222	MaskPortRotate "default"
3223	MaskIconUnits "autoscale"
3224	}
3225	Block {
3226	BlockType Reference
3227	Name "To Register"
3228	SID "215:207"
3229	Ports [2, 1]
3230	Position [660, 1267, 720, 1323]
3231	AttributesFormatString "<< %<shared_memory_name> >>"
3232	LibraryVersion "1.2"
3233	SourceBlock "xbsIndex_r4/To Register"
3234	SourceType "Xilinx Shared Memory Based To Register Block"
3235	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
3236	shared_memory_name "'NEW_MAC_TIME_MSB'"
3237	init "0"
3238	ownership "Owned and initialized elsewhere"
3239	explicit_data_type on
3240	gui_display_data_type "Fixed-point"
3241	arith_type "Unsigned"
3242	n_bits "32"
3243	bin_pt "0"
3244	preci_type "Single"
3245	dbl_ovrd off
3246	xl_use_area off
3247	xl_area "[0,0,0,0,0,0,0]"
3248	has_advanced_control "0"
3249	sggui_pos "-1,-1,-1,-1"
3250	block_type "toreg"
3251	sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
3252	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
3253	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
3254	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
3255	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
3256	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
3257	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
3258	"n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
3259	"T: end icon text');"
3260	}
3261	Block {
3262	BlockType Reference
3263	Name "To Register1"
3264	SID "215:208"
3265	Ports [2, 1]
3266	Position [660, 1372, 720, 1428]
3267	AttributesFormatString "<< %<shared_memory_name> >>"
3268	LibraryVersion "1.2"
3269	SourceBlock "xbsIndex_r4/To Register"
3270	SourceType "Xilinx Shared Memory Based To Register Block"
3271	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
3272	shared_memory_name "'NEW_MAC_TIME_LSB'"
3273	init "0"
3274	ownership "Owned and initialized elsewhere"
3275	explicit_data_type on
3276	gui_display_data_type "Fixed-point"
3277	arith_type "Unsigned"
3278	n_bits "32"
3279	bin_pt "0"
3280	preci_type "Single"
3281	dbl_ovrd off
3282	xl_use_area off
3283	xl_area "[0,0,0,0,0,0,0]"
3284	has_advanced_control "0"
3285	sggui_pos "-1,-1,-1,-1"
3286	block_type "toreg"
3287	sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
3288	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
3289	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
3290	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
3291	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
3292	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
3293	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
3294	"n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
3295	"T: end icon text');"
3296	}
3297	Block {
3298	BlockType Reference
3299	Name "To Register2"
3300	SID "215:209"
3301	Ports [2, 1]
3302	Position [660, 1477, 720, 1533]
3303	AttributesFormatString "<< %<shared_memory_name> >>"
3304	LibraryVersion "1.2"
3305	SourceBlock "xbsIndex_r4/To Register"
3306	SourceType "Xilinx Shared Memory Based To Register Block"
3307	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
3308	shared_memory_name "'Control'"
3309	init "0"
3310	ownership "Owned and initialized elsewhere"
3311	explicit_data_type on
3312	gui_display_data_type "Fixed-point"
3313	arith_type "Unsigned"
3314	n_bits "32"
3315	bin_pt "0"
3316	preci_type "Single"
3317	dbl_ovrd off
3318	xl_use_area off
3319	xl_area "[0,0,0,0,0,0,0]"
3320	has_advanced_control "0"
3321	sggui_pos "-1,-1,-1,-1"
3322	block_type "toreg"
3323	sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
3324	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
3325	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
3326	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
3327	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
3328	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
3329	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
3330	"n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
3331	"T: end icon text');"
3332	}
3333	Block {
3334	BlockType Reference
3335	Name "memmap"
3336	SID "215:202"
3337	Ports [32, 17]
3338	Position [310, 572, 560, 1538]
3339	LibraryVersion "1.2"
3340	SourceBlock "xbsEDKLib_r4/EDK Core"
3341	SourceType "Xilinx EDK Core Block"
3342	infoedit "For use with EDK Processor block."
3343	sim_method "Inactive"
3344	xl_use_area off
3345	xl_area "[0,0,0,0,0,0,0]"
3346	xmp "xmp"
3347	blockname "blockname"
3348	dual_clock "dual_clock"
3349	procinfo "procinfo"
3350	bus_type "bus_type"
3351	memxtable "memxtable"
3352	memmap_hdlcontent "library IEEE;\nuse IEEE.std_logic_1164.all;\nuse IEEE.numeric_std.all;\n\nentity axi_sgiface i"
3353	"s\n generic (\n -- AXI specific.\n -- TODO: need to figure out a way to pass these generics from o"
3354	"utside\n C_S_AXI_SUPPORT_BURST : integer := 0;\n -- TODO: fix the internal ID width to 8\n C"
3355	"_S_AXI_ID_WIDTH : integer := 8;\n C_S_AXI_DATA_WIDTH : integer := 32;\n C_S_AXI_ADDR_WIDT"
3356	"H : integer := 32;\n C_S_AXI_TOTAL_ADDR_LEN : integer := 12;\n C_S_AXI_LINEAR_ADDR_LEN : intege"
3357	"r := 8;\n C_S_AXI_BANK_ADDR_LEN : integer := 2;\n C_S_AXI_AWLEN_WIDTH : integer := 8;\n "
3358	"C_S_AXI_ARLEN_WIDTH : integer := 8\n );\n port (\n -- General.\n AXI_AClk : in std_lo"
3359	"gic;\n AXI_AResetN : in std_logic;\n -- not used\n AXI_Ce : in std_logic;\n \n "
3360	" -- AXI Port.\n S_AXI_AWADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);\n S_AXI_AWID"
3361	" : in std_logic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n S_AXI_AWLEN : in std_logic_vector(C_S_AXI_AWLE"
3362	"N_WIDTH-1 downto 0);\n S_AXI_AWSIZE : in std_logic_vector(2 downto 0);\n S_AXI_AWBURST : in std_lo"
3363	"gic_vector(1 downto 0);\n S_AXI_AWLOCK : in std_logic_vector(1 downto 0);\n S_AXI_AWCACHE : in std"
3364	"_logic_vector(3 downto 0);\n S_AXI_AWPROT : in std_logic_vector(2 downto 0);\n S_AXI_AWVALID : in "
3365	"std_logic;\n S_AXI_AWREADY : out std_logic;\n \n S_AXI_WLAST : in std_logic;\n S_AXI"
3366	"_WDATA : in std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n S_AXI_WSTRB : in std_logic_vector((C_S_"
3367	"AXI_DATA_WIDTH/8)-1 downto 0);\n S_AXI_WVALID : in std_logic;\n S_AXI_WREADY : out std_logic;\n "
3368	" \n S_AXI_BRESP : out std_logic_vector(1 downto 0);\n S_AXI_BID : out std_logic_vector(C_S_"
3369	"AXI_ID_WIDTH-1 downto 0);\n S_AXI_BVALID : out std_logic;\n S_AXI_BREADY : in std_logic;\n "
3370	"\n S_AXI_ARADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);\n S_AXI_ARID : in std_log"
3371	"ic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n S_AXI_ARLEN : in std_logic_vector(C_S_AXI_ARLEN_WIDTH-1 downto "
3372	"0);\n S_AXI_ARSIZE : in std_logic_vector(2 downto 0);\n S_AXI_ARBURST : in std_logic_vector(1 down"
3373	"to 0);\n S_AXI_ARLOCK : in std_logic_vector(1 downto 0);\n S_AXI_ARCACHE : in std_logic_vector(3 d"
3374	"ownto 0);\n S_AXI_ARPROT : in std_logic_vector(2 downto 0);\n S_AXI_ARVALID : in std_logic;\n "
3375	" S_AXI_ARREADY : out std_logic;\n \n -- 'From Register'\n -- 'SYSTEM_TIME_USEC_MSB'\n "
3376	" sm_SYSTEM_TIME_USEC_MSB_dout : in std_logic_vector(32-1 downto 0);\n -- 'SYSTEM_TIME_USEC_LSB'\n sm_"
3377	"SYSTEM_TIME_USEC_LSB_dout : in std_logic_vector(32-1 downto 0);\n -- 'MAC_TIME_USEC_MSB'\n sm_MAC_TIM"
3378	"E_USEC_MSB_dout : in std_logic_vector(32-1 downto 0);\n -- 'MAC_TIME_USEC_LSB'\n sm_MAC_TIME_USEC_LSB"
3379	"_dout : in std_logic_vector(32-1 downto 0);\n -- 'To Register'\n -- 'NEW_MAC_TIME_MSB'\n sm_NE"
3380	"W_MAC_TIME_MSB_dout : in std_logic_vector(32-1 downto 0);\n sm_NEW_MAC_TIME_MSB_din : out std_logic_vector("
3381	"32-1 downto 0);\n sm_NEW_MAC_TIME_MSB_en : out std_logic;\n -- 'NEW_MAC_TIME_LSB'\n sm_NEW_M"
3382	"AC_TIME_LSB_dout : in std_logic_vector(32-1 downto 0);\n sm_NEW_MAC_TIME_LSB_din : out std_logic_vector(32-"
3383	"1 downto 0);\n sm_NEW_MAC_TIME_LSB_en : out std_logic;\n -- 'Control'\n sm_Control_dout : in"
3384	" std_logic_vector(32-1 downto 0);\n sm_Control_din : out std_logic_vector(32-1 downto 0);\n sm_Contr"
3385	"ol_en : out std_logic;\n -- 'From FIFO'\n -- 'To FIFO'\n -- 'Shared Memory'\n\n S_AXI"
3386	"_RLAST : out std_logic;\n S_AXI_RID : out std_logic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n S_AX"
3387	"I_RDATA : out std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n S_AXI_RRESP : out std_logic_vector(1 do"
3388	"wnto 0);\n S_AXI_RVALID : out std_logic;\n S_AXI_RREADY : in std_logic\n );\nend entity axi_sgi"
3389	"face;\n\narchitecture IMP of axi_sgiface is\n\n-- Internal signals for write channel.\nsignal S_AXI_BVALID_i "
3390	": std_logic;\nsignal S_AXI_BID_i : std_logic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\nsignal S_AXI_WREADY_i "
3391	" : std_logic;\n \n-- Internal signals for read channels.\nsignal S_AXI_ARLEN_i : std_logic_vector(C_S_A"
3392	"XI_ARLEN_WIDTH-1 downto 0);\nsignal S_AXI_RLAST_i : std_logic;\nsignal S_AXI_RREADY_i : std_logic;\nsi"
3393	"gnal S_AXI_RVALID_i : std_logic;\nsignal S_AXI_RDATA_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto "
3394	"0);\nsignal S_AXI_RID_i : std_logic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n\n-- for read channel\nsignal re"
3395	"ad_bank_addr_i : std_logic_vector(C_S_AXI_BANK_ADDR_LEN-1 downto 0);\nsignal read_linear_addr_i : std_logic_v"
3396	"ector(C_S_AXI_LINEAR_ADDR_LEN-1 downto 0);\n-- for write channel\nsignal write_bank_addr_i : std_logic_vector(C_"
3397	"S_AXI_BANK_ADDR_LEN-1 downto 0);\nsignal write_linear_addr_i : std_logic_vector(C_S_AXI_LINEAR_ADDR_LEN-1 downto 0"
3398	");\n\nsignal reg_bank_out_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal fifo_bank_out_i :"
3399	" std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal shmem_bank_out_i : std_logic_vector(C_S_AXI_DATA_WIDT"
3400	"H-1 downto 0);\n \n-- 'From Register'\n-- 'SYSTEM_TIME_USEC_MSB'\nsignal sm_SYSTEM_TIME_USEC_MSB_dout_i : std_l"
3401	"ogic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'SYSTEM_TIME_USEC_LSB'\nsignal sm_SYSTEM_TIME_USEC_LSB_dout_i : st"
3402	"d_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'MAC_TIME_USEC_MSB'\nsignal sm_MAC_TIME_USEC_MSB_dout_i : std_l"
3403	"ogic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'MAC_TIME_USEC_LSB'\nsignal sm_MAC_TIME_USEC_LSB_dout_i : std_logi"
3404	"c_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'To Register'\n-- 'NEW_MAC_TIME_MSB'\nsignal sm_NEW_MAC_TIME_MSB_din_i"
3405	" : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_NEW_MAC_TIME_MSB_en_i : std_logic;\nsignal sm_N"
3406	"EW_MAC_TIME_MSB_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'NEW_MAC_TIME_LSB'\nsignal sm_NEW_MA"
3407	"C_TIME_LSB_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_NEW_MAC_TIME_LSB_en_i : std_log"
3408	"ic;\nsignal sm_NEW_MAC_TIME_LSB_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'Control'\nsignal sm"
3409	"_Control_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_Control_en_i : std_logic;\nsignal"
3410	" sm_Control_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'From FIFO'\n-- 'To FIFO'\n-- 'Shared Me"
3411	"mory'\n\ntype t_read_state is (IDLE, READ_PREP, READ_DATA);\nsignal read_state : t_read_state;\n\ntype t_write_stat"
3412	"e is (IDLE, WRITE_DATA, WRITE_RESPONSE);\nsignal write_state : t_write_state;\n\ntype t_memmap_state is (READ, WRIT"
3413	"E);\nsignal memmap_state : t_memmap_state;\n\nconstant C_READ_PREP_DELAY : std_logic_vector(1 downto 0) := \"11\";\n"
3414	"\nsignal read_prep_counter : std_logic_vector(1 downto 0);\nsignal read_addr_counter : std_logic_vector(C_S_AXI_ARL"
3415	"EN_WIDTH-1 downto 0);\nsignal read_data_counter : std_logic_vector(C_S_AXI_ARLEN_WIDTH-1 downto 0);\n\n-- enable of"
3416	" shared BRAMs\nsignal s_shram_en : std_logic;\n\nsignal write_addr_valid : std_logic;\nsignal write_ready : std_log"
3417	"ic;\n\n-- 're' of From/To FIFOs\nsignal s_fifo_re : std_logic;\n-- 'we' of To FIFOs\nsignal s_fifo_we : std_logic;\n"
3418	"\nbegin\n\n-- enable for 'Shared Memory' blocks\n\n-- conversion to match with the data bus width\n-- 'From Registe"
3419	"r'\n-- 'SYSTEM_TIME_USEC_MSB'\ngen_sm_SYSTEM_TIME_USEC_MSB_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_SY"
3420	"STEM_TIME_USEC_MSB_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_SYSTEM_TIME_USEC"
3421	"_MSB_dout_i;\nsm_SYSTEM_TIME_USEC_MSB_dout_i(32-1 downto 0) <= sm_SYSTEM_TIME_USEC_MSB_dout;\n-- 'SYSTEM_TIME_USEC_"
3422	"LSB'\ngen_sm_SYSTEM_TIME_USEC_LSB_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_SYSTEM_TIME_USEC_LSB_dout_i"
3423	"(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_SYSTEM_TIME_USEC_LSB_dout_i;\nsm_SYSTEM_T"
3424	"IME_USEC_LSB_dout_i(32-1 downto 0) <= sm_SYSTEM_TIME_USEC_LSB_dout;\n-- 'MAC_TIME_USEC_MSB'\ngen_sm_MAC_TIME_USEC_M"
3425	"SB_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_MAC_TIME_USEC_MSB_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <"
3426	"= (others => '0');\nend generate gen_sm_MAC_TIME_USEC_MSB_dout_i;\nsm_MAC_TIME_USEC_MSB_dout_i(32-1 downto 0) <= sm"
3427	"_MAC_TIME_USEC_MSB_dout;\n-- 'MAC_TIME_USEC_LSB'\ngen_sm_MAC_TIME_USEC_LSB_dout_i: if (32 < C_S_AXI_DATA_WIDTH) gen"
3428	"erate\n sm_MAC_TIME_USEC_LSB_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_MAC"
3429	"_TIME_USEC_LSB_dout_i;\nsm_MAC_TIME_USEC_LSB_dout_i(32-1 downto 0) <= sm_MAC_TIME_USEC_LSB_dout;\n-- 'To Register'\n"
3430	"-- 'NEW_MAC_TIME_MSB'\nsm_NEW_MAC_TIME_MSB_din <= sm_NEW_MAC_TIME_MSB_din_i(32-1 downto 0);\nsm_NEW_MAC_TIME_MS"
3431	"B_en <= sm_NEW_MAC_TIME_MSB_en_i;\ngen_sm_NEW_MAC_TIME_MSB_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n "
3432	"sm_NEW_MAC_TIME_MSB_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_NEW_MAC_TIME_MS"
3433	"B_dout_i;\nsm_NEW_MAC_TIME_MSB_dout_i(32-1 downto 0) <= sm_NEW_MAC_TIME_MSB_dout;\n-- 'NEW_MAC_TIME_LSB'\nsm_NEW_MA"
3434	"C_TIME_LSB_din <= sm_NEW_MAC_TIME_LSB_din_i(32-1 downto 0);\nsm_NEW_MAC_TIME_LSB_en <= sm_NEW_MAC_TIME_LSB"
3435	"_en_i;\ngen_sm_NEW_MAC_TIME_LSB_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_NEW_MAC_TIME_LSB_dout_i(C_S_A"
3436	"XI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_NEW_MAC_TIME_LSB_dout_i;\nsm_NEW_MAC_TIME_LSB_d"
3437	"out_i(32-1 downto 0) <= sm_NEW_MAC_TIME_LSB_dout;\n-- 'Control'\nsm_Control_din <= sm_Control_din_i(32-1 downto"
3438	" 0);\nsm_Control_en <= sm_Control_en_i;\ngen_sm_Control_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_"
3439	"Control_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_Control_dout_i;\nsm_Control"
3440	"_dout_i(32-1 downto 0) <= sm_Control_dout;\n-- 'From FIFO'\n-- 'To FIFO'\n-- 'Shared Memory'\n\nReadWriteSelect: pr"
3441	"ocess(memmap_state) is begin\n if (memmap_state = READ) then\n else\n end if;\nend process ReadWriteSelect"
3442	";\n\n-----------------------------------------------------------------------------\n-- address for 'Shared Memory'\n"
3443	"-----------------------------------------------------------------------------\nSharedMemory_Addr_ResetN : process(A"
3444	"XI_AClk) is begin\n if (AXI_AClk'event and AXI_AClk = '1') then\n if (AXI_AResetN = '0') then\n "
3445	" memmap_state <= READ;\n else\n if (S_AXI_AWVALID = '1') then\n -- write operatio"
3446	"n\n memmap_state <= WRITE;\n elsif (S_AXI_ARVALID = '1') then\n -- read op"
3447	"eration\n memmap_state <= READ;\n end if;\n end if;\n end if;\nend process Shar"
3448	"edMemory_Addr_ResetN;\n\n-----------------------------------------------------------------------------\n-- WRITE Co"
3449	"mmand Control\n-----------------------------------------------------------------------------\nS_AXI_BID <= S_AX"
3450	"I_BID_i;\nS_AXI_BVALID <= S_AXI_BVALID_i;\nS_AXI_WREADY <= S_AXI_WREADY_i;\n-- No error checking\nS_AXI_BRESP <="
3451	" (others=>'0');\n\nPROC_AWREADY_ACK: process(read_state, write_state, S_AXI_ARVALID, S_AXI_AWVALID) is begin\n i"
3452	"f (write_state = IDLE and S_AXI_AWVALID = '1' and read_state = IDLE) then\n S_AXI_AWREADY <= S_AXI_AWVALID;\n"
3453	" else\n S_AXI_AWREADY <= '0';\n end if;\nend process PROC_AWREADY_ACK;\n\nCmd_Decode_Write: process(AX"
3454	"I_AClk) is begin\n if (AXI_AClk'event and AXI_AClk = '1') then\n if (AXI_AResetN = '0') then\n "
3455	" write_addr_valid <= '0';\n write_ready <= '0';\n s_fifo_we <= '0';\n "
3456	" S_AXI_BVALID_i <= '0';\n S_AXI_BID_i <= (others => '0');\n write_bank_a"
3457	"ddr_i <= (others => '0');\n write_linear_addr_i <= (others => '0');\n else\n if (wri"
3458	"te_state = IDLE) then\n if (S_AXI_AWVALID = '1' and read_state = IDLE) then\n -- "
3459	"reflect awid\n S_AXI_BID_i <= S_AXI_AWID;\n\n -- latch bank and linear addres"
3460	"ses\n write_bank_addr_i <= S_AXI_AWADDR(C_S_AXI_TOTAL_ADDR_LEN-1 downto C_S_AXI_LINEAR_ADDR_LE"
3461	"N+2);\n write_linear_addr_i <= S_AXI_AWADDR(C_S_AXI_LINEAR_ADDR_LEN+1 downto 2);\n "
3462	" write_addr_valid <= '1';\n s_fifo_we <= '1';\n\n -- write state transit"
3463	"ion\n write_state <= WRITE_DATA;\n end if;\n elsif (write_state = WRIT"
3464	"E_DATA) then\n write_ready <= '1';\n s_fifo_we <= '0';\n write_addr_va"
3465	"lid <= S_AXI_WVALID;\n \n if (S_AXI_WVALID = '1' and write_ready = '1') then\n "
3466	" write_linear_addr_i <= Std_Logic_Vector(unsigned(write_linear_addr_i) + 1);\n end if;\n"
3467	"\n if (S_AXI_WLAST = '1' and write_ready = '1') then\n -- start responding throug"
3468	"h B channel upon the last write data sample\n S_AXI_BVALID_i <= '1';\n -- wri"
3469	"te data is over\n write_addr_valid <= '0';\n write_ready <= '0';\n "
3470	" -- write state transition\n write_state <= WRITE_RESPONSE;\n end if;\n "
3471	" elsif (write_state = WRITE_RESPONSE) then\n\n if (S_AXI_BREADY = '1') then\n "
3472	" -- write respond is over\n S_AXI_BVALID_i <= '0';\n S_AXI_BID_i <= (oth"
3473	"ers => '0');\n\n -- write state transition\n write_state <= IDLE;\n "
3474	" end if;\n end if;\n end if;\n end if;\nend process Cmd_Decode_Write;\n\nWrite_Linear_Add"
3475	"r_Decode : process(AXI_AClk) is \n\nbegin\n if (AXI_AClk'event and AXI_AClk = '1') then\n if (AXI_AResetN"
3476	" = '0') then\n -- 'To Register'\n -- NEW_MAC_TIME_MSB din/en\n sm_NEW_MAC_TIME_MSB"
3477	"_din_i <= (others => '0');\n sm_NEW_MAC_TIME_MSB_en_i <= '0';\n -- NEW_MAC_TIME_LSB din/en\n "
3478	" sm_NEW_MAC_TIME_LSB_din_i <= (others => '0');\n sm_NEW_MAC_TIME_LSB_en_i <= '0';\n "
3479	" -- Control din/en\n sm_Control_din_i <= (others => '0');\n sm_Control_en_i <= '0';\n "
3480	" -- 'To FIFO'\n -- 'Shared Memory'\n else\n -- default assignments\n\n -"
3481	"- 'To Register'\n if (unsigned(write_bank_addr_i) = 2) then\n if (unsigned(write_linear_a"
3482	"ddr_i) = 0) then\n -- NEW_MAC_TIME_MSB din/en\n sm_NEW_MAC_TIME_MSB_din_i <= "
3483	"S_AXI_WDATA;\n sm_NEW_MAC_TIME_MSB_en_i <= write_addr_valid;\n elsif (unsigned(w"
3484	"rite_linear_addr_i) = 1) then\n -- NEW_MAC_TIME_LSB din/en\n sm_NEW_MAC_TIME_"
3485	"LSB_din_i <= S_AXI_WDATA;\n sm_NEW_MAC_TIME_LSB_en_i <= write_addr_valid;\n elsi"
3486	"f (unsigned(write_linear_addr_i) = 2) then\n -- Control din/en\n sm_Control_d"
3487	"in_i <= S_AXI_WDATA;\n sm_Control_en_i <= write_addr_valid;\n end if;\n "
3488	" end if; \n \n \n end if;\n end if;\nend process Write_Linear_Addr_Decode;\n \n---"
3489	"--------------------------------------------------------------------------\n-- READ Control\n----------------------"
3490	"-------------------------------------------------------\n\nS_AXI_RDATA <= S_AXI_RDATA_i;\nS_AXI_RVALID <= S_AXI_R"
3491	"VALID_i;\nS_AXI_RLAST <= S_AXI_RLAST_i;\nS_AXI_RID <= S_AXI_RID_i;\n-- TODO: no error checking\nS_AXI_RRESP <"
3492	"= (others=>'0');\n\nPROC_ARREADY_ACK: process(read_state, S_AXI_ARVALID, write_state, S_AXI_AWVALID) is begin\n "
3493	"-- Note: WRITE has higher priority than READ\n if (read_state = IDLE and S_AXI_ARVALID = '1' and write_state = I"
3494	"DLE and S_AXI_AWVALID /= '1') then\n S_AXI_ARREADY <= S_AXI_ARVALID;\n else\n S_AXI_ARREADY <= '0'"
3495	";\n end if;\nend process PROC_ARREADY_ACK;\n\nS_AXI_WREADY_i <= write_ready;\n\nProcess_Sideband: process(write_"
3496	"state, read_state) is begin\n if (read_state = READ_PREP) then\n s_shram_en <= '1';\n elsif (read_stat"
3497	"e = READ_DATA) then\n s_shram_en <= S_AXI_RREADY;\n elsif (write_state = WRITE_DATA) then\n s_shra"
3498	"m_en <= S_AXI_WVALID;\n else\n s_shram_en <= '0';\n end if;\nend process Process_Sideband;\n\nCmd_Deco"
3499	"de_Read: process(AXI_AClk) is begin\n if (AXI_AClk'event and AXI_AClk = '1') then\n if (AXI_AResetN = '0'"
3500	") then\n S_AXI_RVALID_i <= '0';\n read_bank_addr_i <= (others => '0');\n read_l"
3501	"inear_addr_i <= (others => '0');\n S_AXI_ARLEN_i <= (others => '0');\n S_AXI_RLAST_i "
3502	" <= '0';\n S_AXI_RID_i <= (others => '0');\n read_state <= IDLE;\n "
3503	" read_prep_counter <= (others => '0');\n read_addr_counter <= (others => '0');\n rea"
3504	"d_data_counter <= (others => '0');\n else\n -- default assignments\n s_fifo_re <= '0"
3505	"';\n\n if (read_state = IDLE) then\n -- Note WRITE has higher priority than READ\n "
3506	" if (S_AXI_ARVALID = '1' and write_state = IDLE and S_AXI_AWVALID /= '1') then\n -- extr"
3507	"act bank and linear addresses\n read_bank_addr_i <= S_AXI_ARADDR(C_S_AXI_TOTAL_ADDR_LEN-1 dow"
3508	"nto C_S_AXI_LINEAR_ADDR_LEN+2);\n read_linear_addr_i <= S_AXI_ARADDR(C_S_AXI_LINEAR_ADDR_LEN+1 "
3509	"downto 2);\n s_fifo_re <= '1';\n\n -- reflect arid\n S_AXI"
3510	"_RID_i <= S_AXI_ARID;\n\n -- load read liner address and data counter\n read_"
3511	"addr_counter <= S_AXI_ARLEN;\n read_data_counter <= S_AXI_ARLEN;\n\n -- load "
3512	"read preparation counter\n read_prep_counter <= C_READ_PREP_DELAY;\n -- read "
3513	"state transition\n read_state <= READ_PREP;\n end if;\n elsif (read_st"
3514	"ate = READ_PREP) then\n if (unsigned(read_prep_counter) = 0) then\n if (unsigned("
3515	"read_data_counter) = 0) then\n -- tag the last data generated by the slave\n "
3516	" S_AXI_RLAST_i <= '1';\n end if;\n -- valid data appears\n "
3517	" S_AXI_RVALID_i <= '1';\n -- read state transition\n read_state <= REA"
3518	"D_DATA;\n else\n -- decrease read preparation counter\n read_p"
3519	"rep_counter <= Std_Logic_Vector(unsigned(read_prep_counter) - 1);\n end if;\n\n if (u"
3520	"nsigned(read_prep_counter) /= 3 and unsigned(read_addr_counter) /= 0) then\n -- decrease address"
3521	" counter\n read_addr_counter <= Std_Logic_Vector(unsigned(read_addr_counter) - 1);\n "
3522	" -- increase linear address (no band crossing)\n read_linear_addr_i <= Std_Logic_Vector(u"
3523	"nsigned(read_linear_addr_i) + 1);\n end if;\n elsif (read_state = READ_DATA) then\n "
3524	" if (S_AXI_RREADY = '1') then\n if (unsigned(read_data_counter) = 1) then\n "
3525	" -- tag the last data generated by the slave\n S_AXI_RLAST_i <= '1';\n "
3526	" end if;\n\n if (unsigned(read_data_counter) = 0) then\n -- arid\n"
3527	" S_AXI_RID_i <= (others => '0');\n -- rlast\n "
3528	"S_AXI_RLAST_i <= '0';\n -- no more valid data\n S_AXI_RVALID_i <= '0'"
3529	";\n -- read state transition\n read_state <= IDLE;\n "
3530	" else\n -- decrease read preparation counter\n read_data_counter <="
3531	" Std_Logic_Vector(unsigned(read_data_counter) - 1);\n\n if (unsigned(read_addr_counter) /= 0"
3532	") then\n -- decrease address counter\n read_addr_counter <= S"
3533	"td_Logic_Vector(unsigned(read_addr_counter) - 1);\n -- increase linear address (no band "
3534	"crossing)\n read_linear_addr_i <= Std_Logic_Vector(unsigned(read_linear_addr_i) + 1);\n "
3535	" end if;\n end if;\n end if;\n end if;\n\n "
3536	" end if;\n end if;\nend process Cmd_Decode_Read;\n\nRead_Linear_Addr_Decode : process(AXI_AClk) is begin\n i"
3537	"f (AXI_AClk'event and AXI_AClk = '1') then\n if (AXI_AResetN = '0') then\n reg_bank_out_i <= (o"
3538	"thers => '0');\n fifo_bank_out_i <= (others => '0');\n shmem_bank_out_i <= (others => '0');\n"
3539	" S_AXI_RDATA_i <= (others => '0');\n else\n if (unsigned(read_bank_addr_i) = 2) the"
3540	"n\n -- 'From Register'\n if (unsigned(read_linear_addr_i) = 3) then\n "
3541	" -- 'SYSTEM_TIME_USEC_MSB' dout\n reg_bank_out_i <= sm_SYSTEM_TIME_USEC_MSB_dout_i;\n "
3542	" elsif (unsigned(read_linear_addr_i) = 4) then\n -- 'SYSTEM_TIME_USEC_LSB' dout\n "
3543	" reg_bank_out_i <= sm_SYSTEM_TIME_USEC_LSB_dout_i;\n elsif (unsigned(read_linear_addr_i) "
3544	"= 5) then\n -- 'MAC_TIME_USEC_MSB' dout\n reg_bank_out_i <= sm_MAC_TIME_USEC_"
3545	"MSB_dout_i;\n elsif (unsigned(read_linear_addr_i) = 6) then\n -- 'MAC_TIME_USEC_L"
3546	"SB' dout\n reg_bank_out_i <= sm_MAC_TIME_USEC_LSB_dout_i;\n end if;\n "
3547	" -- 'To Register' (with register readback)\n if (unsigned(read_linear_addr_i) = 0) then\n "
3548	" -- 'NEW_MAC_TIME_MSB' dout\n reg_bank_out_i <= sm_NEW_MAC_TIME_MSB_dout_i;\n "
3549	" elsif (unsigned(read_linear_addr_i) = 1) then\n -- 'NEW_MAC_TIME_LSB' dout\n "
3550	" reg_bank_out_i <= sm_NEW_MAC_TIME_LSB_dout_i;\n elsif (unsigned(read_linear_addr_i) = 2) the"
3551	"n\n -- 'Control' dout\n reg_bank_out_i <= sm_Control_dout_i;\n "
3552	" end if;\n\n S_AXI_RDATA_i <= reg_bank_out_i;\n elsif (unsigned(read_bank_addr_i) = 1) th"
3553	"en\n -- 'From FIFO'\n -- 'To FIFO'\n\n S_AXI_RDATA_i <= fifo_bank_out_"
3554	"i;\n elsif (unsigned(read_bank_addr_i) = 0 and s_shram_en = '1') then\n -- 'Shared Memory"
3555	"'\n\n S_AXI_RDATA_i <= shmem_bank_out_i;\n end if;\n end if;\n end if;\nend pro"
3556	"cess Read_Linear_Addr_Decode;\n\nend architecture IMP;\n"
3557	config "{'inports'=>[{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'AXI_ARESETN','wid"
3558	"th'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARADDR','width'=>32},{'arit"
3559	"h_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARBURST','width'=>2},{'arith_type'=>2.000"
3560	"00000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARCACHE','width'=>4},{'arith_type'=>2.00000000000000000"
3561	",'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARID','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.0000"
3562	"0000000000000,'name'=>'S_AXI_ARLEN','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'n"
3563	"ame'=>'S_AXI_ARLOCK','width'=>2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AR"
3564	"PROT','width'=>3},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARSIZE','width'=>"
3565	"3},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARVALID','width'=>0},{'arith_typ"
3566	"e'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWADDR','width'=>32},{'arith_type'=>2.00000000"
3567	"000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWBURST','width'=>2},{'arith_type'=>2.00000000000000000,'bin"
3568	"_pt'=>0.00000000000000000,'name'=>'S_AXI_AWCACHE','width'=>4},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.000000"
3569	"00000000000,'name'=>'S_AXI_AWID','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name"
3570	"'=>'S_AXI_AWLEN','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWLOCK"
3571	"','width'=>2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWPROT','width'=>3},{"
3572	"'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWSIZE','width'=>3},{'arith_type'=>2"
3573	".00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWVALID','width'=>0},{'arith_type'=>2.0000000000000"
3574	"0000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_BREADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>"
3575	"0.00000000000000000,'name'=>'S_AXI_RREADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.0000000000000"
3576	"0000,'name'=>'S_AXI_WDATA','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S"
3577	"_AXI_WLAST','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_WSTRB','wid"
3578	"th'=>4},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_WVALID','width'=>0},{'arith"
3579	"_type'=>2,'bin_pt'=>0,'name'=>'sm_SYSTEM_TIME_USEC_MSB_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_"
3580	"SYSTEM_TIME_USEC_LSB_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_MAC_TIME_USEC_MSB_dout','width'=>3"
3581	"2},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_MAC_TIME_USEC_LSB_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name"
3582	"'=>'sm_NEW_MAC_TIME_MSB_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_NEW_MAC_TIME_LSB_dout','width'="
3583	">32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_Control_dout','width'=>32}],'outports'=>[{'arith_type'=>2.00000000000"
3584	"000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARREADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt"
3585	"'=>0.00000000000000000,'name'=>'S_AXI_AWREADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.000000000"
3586	"00000000,'name'=>'S_AXI_BID','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'"
3587	"S_AXI_BRESP','width'=>2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_BVALID','w"
3588	"idth'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_RDATA','width'=>32},{'ari"
3589	"th_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_RID','width'=>8},{'arith_type'=>2.000000"
3590	"00000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_RLAST','width'=>0},{'arith_type'=>2.00000000000000000,'bin"
3591	"_pt'=>0.00000000000000000,'name'=>'S_AXI_RRESP','width'=>2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000"
3592	"000000000,'name'=>'S_AXI_RVALID','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name"
3593	"'=>'S_AXI_WREADY','width'=>0},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_NEW_MAC_TIME_MSB_din','width'=>32},{'arith_t"
3594	"ype'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_NEW_MAC_TIME_MSB_en','width'=>0.000000000000000"
3595	"00},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_NEW_MAC_TIME_LSB_din','width'=>32},{'arith_type'=>2.00000000000000000,"
3596	"'bin_pt'=>0.00000000000000000,'name'=>'sm_NEW_MAC_TIME_LSB_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_"
3597	"pt'=>0,'name'=>'sm_Control_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name"
3598	"'=>'sm_Control_en','width'=>0.00000000000000000}]}"
3599	inheritDeviceType "inheritDeviceType"
3600	has_advanced_control "0"
3601	sggui_pos "-1,-1,-1,-1"
3602	block_type "edkcore"
3603	sg_icon_stat "250,966,32,17,white,blue,0,14f99c6e,right,,[ ],[ ]"
3604	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 250 250 0 0 ],[0 0 966 966 0 ],[0.77 0.82 "
3605	"0.91 ]);\nplot([0 250 250 0 0 ],[0 0 966 966 0 ]);\npatch([47.125 97.7 132.7 167.7 202.7 132.7 82.125 47.125 ],[521"
3606	".85 521.85 556.85 521.85 556.85 556.85 556.85 521.85 ],[1 1 1 ]);\npatch([82.125 132.7 97.7 47.125 82.125 ],[486.85"
3607	" 486.85 521.85 521.85 486.85 ],[0.931 0.946 0.973 ]);\npatch([47.125 97.7 132.7 82.125 47.125 ],[451.85 451.85 486."
3608	"85 486.85 451.85 ],[1 1 1 ]);\npatch([82.125 202.7 167.7 132.7 97.7 47.125 82.125 ],[416.85 416.85 451.85 416.85 45"
3609	"1.85 451.85 416.85 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
3610	"icon text');\ncolor('black');port_label('input',1,'AXI_ARESETN');\ncolor('black');port_label('input',2,'S_AXI_ARADD"
3611	"R');\ncolor('black');port_label('input',3,'S_AXI_ARBURST');\ncolor('black');port_label('input',4,'S_AXI_ARCACHE');\n"
3612	"color('black');port_label('input',5,'S_AXI_ARID');\ncolor('black');port_label('input',6,'S_AXI_ARLEN');\ncolor('bla"
3613	"ck');port_label('input',7,'S_AXI_ARLOCK');\ncolor('black');port_label('input',8,'S_AXI_ARPROT');\ncolor('black');po"
3614	"rt_label('input',9,'S_AXI_ARSIZE');\ncolor('black');port_label('input',10,'S_AXI_ARVALID');\ncolor('black');port_la"
3615	"bel('input',11,'S_AXI_AWADDR');\ncolor('black');port_label('input',12,'S_AXI_AWBURST');\ncolor('black');port_label("
3616	"'input',13,'S_AXI_AWCACHE');\ncolor('black');port_label('input',14,'S_AXI_AWID');\ncolor('black');port_label('input"
3617	"',15,'S_AXI_AWLEN');\ncolor('black');port_label('input',16,'S_AXI_AWLOCK');\ncolor('black');port_label('input',17,'"
3618	"S_AXI_AWPROT');\ncolor('black');port_label('input',18,'S_AXI_AWSIZE');\ncolor('black');port_label('input',19,'S_AXI"
3619	"_AWVALID');\ncolor('black');port_label('input',20,'S_AXI_BREADY');\ncolor('black');port_label('input',21,'S_AXI_RRE"
3620	"ADY');\ncolor('black');port_label('input',22,'S_AXI_WDATA');\ncolor('black');port_label('input',23,'S_AXI_WLAST');\n"
3621	"color('black');port_label('input',24,'S_AXI_WSTRB');\ncolor('black');port_label('input',25,'S_AXI_WVALID');\ncolor("
3622	"'black');port_label('input',26,'sm_SYSTEM_TIME_USEC_MSB_dout');\ncolor('black');port_label('input',27,'sm_SYSTEM_TI"
3623	"ME_USEC_LSB_dout');\ncolor('black');port_label('input',28,'sm_MAC_TIME_USEC_MSB_dout');\ncolor('black');port_label("
3624	"'input',29,'sm_MAC_TIME_USEC_LSB_dout');\ncolor('black');port_label('input',30,'sm_NEW_MAC_TIME_MSB_dout');\ncolor("
3625	"'black');port_label('input',31,'sm_NEW_MAC_TIME_LSB_dout');\ncolor('black');port_label('input',32,'sm_Control_dout'"
3626	");\ncolor('black');port_label('output',1,'S_AXI_ARREADY');\ncolor('black');port_label('output',2,'S_AXI_AWREADY');\n"
3627	"color('black');port_label('output',3,'S_AXI_BID');\ncolor('black');port_label('output',4,'S_AXI_BRESP');\ncolor('bl"
3628	"ack');port_label('output',5,'S_AXI_BVALID');\ncolor('black');port_label('output',6,'S_AXI_RDATA');\ncolor('black');"
3629	"port_label('output',7,'S_AXI_RID');\ncolor('black');port_label('output',8,'S_AXI_RLAST');\ncolor('black');port_labe"
3630	"l('output',9,'S_AXI_RRESP');\ncolor('black');port_label('output',10,'S_AXI_RVALID');\ncolor('black');port_label('ou"
3631	"tput',11,'S_AXI_WREADY');\ncolor('black');port_label('output',12,'sm_NEW_MAC_TIME_MSB_din');\ncolor('black');port_l"
3632	"abel('output',13,'sm_NEW_MAC_TIME_MSB_en');\ncolor('black');port_label('output',14,'sm_NEW_MAC_TIME_LSB_din');\ncol"
3633	"or('black');port_label('output',15,'sm_NEW_MAC_TIME_LSB_en');\ncolor('black');port_label('output',16,'sm_Control_di"
3634	"n');\ncolor('black');port_label('output',17,'sm_Control_en');\nfprintf('','COMMENT: end icon text');"
3635	}
3636	Line {
3637	SrcBlock "memmap"
3638	SrcPort 13
3639	DstBlock "To Register"
3640	DstPort 2
3641	}
3642	Line {
3643	SrcBlock "memmap"
3644	SrcPort 12
3645	DstBlock "To Register"
3646	DstPort 1
3647	}
3648	Line {
3649	SrcBlock "memmap"
3650	SrcPort 15
3651	DstBlock "To Register1"
3652	DstPort 2
3653	}
3654	Line {
3655	SrcBlock "memmap"
3656	SrcPort 14
3657	DstBlock "To Register1"
3658	DstPort 1
3659	}
3660	Line {
3661	SrcBlock "memmap"
3662	SrcPort 17
3663	DstBlock "To Register2"
3664	DstPort 2
3665	}
3666	Line {
3667	SrcBlock "memmap"
3668	SrcPort 16
3669	DstBlock "To Register2"
3670	DstPort 1
3671	}
3672	Line {
3673	SrcBlock "memmap"
3674	SrcPort 11
3675	DstBlock "S_AXI_WREADY"
3676	DstPort 1
3677	}
3678	Line {
3679	SrcBlock "memmap"
3680	SrcPort 10
3681	DstBlock "S_AXI_RVALID"
3682	DstPort 1
3683	}
3684	Line {
3685	SrcBlock "memmap"
3686	SrcPort 9
3687	DstBlock "S_AXI_RRESP"
3688	DstPort 1
3689	}
3690	Line {
3691	SrcBlock "memmap"
3692	SrcPort 8
3693	DstBlock "S_AXI_RLAST"
3694	DstPort 1
3695	}
3696	Line {
3697	SrcBlock "memmap"
3698	SrcPort 7
3699	DstBlock "S_AXI_RID"
3700	DstPort 1
3701	}
3702	Line {
3703	SrcBlock "memmap"
3704	SrcPort 6
3705	DstBlock "S_AXI_RDATA"
3706	DstPort 1
3707	}
3708	Line {
3709	SrcBlock "memmap"
3710	SrcPort 5
3711	DstBlock "S_AXI_BVALID"
3712	DstPort 1
3713	}
3714	Line {
3715	SrcBlock "memmap"
3716	SrcPort 4
3717	DstBlock "S_AXI_BRESP"
3718	DstPort 1
3719	}
3720	Line {
3721	SrcBlock "memmap"
3722	SrcPort 3
3723	DstBlock "S_AXI_BID"
3724	DstPort 1
3725	}
3726	Line {
3727	SrcBlock "memmap"
3728	SrcPort 2
3729	DstBlock "S_AXI_AWREADY"
3730	DstPort 1
3731	}
3732	Line {
3733	SrcBlock "memmap"
3734	SrcPort 1
3735	DstBlock "S_AXI_ARREADY"
3736	DstPort 1
3737	}
3738	Line {
3739	SrcBlock "S_AXI_WVALID"
3740	SrcPort 1
3741	DstBlock "memmap"
3742	DstPort 25
3743	}
3744	Line {
3745	SrcBlock "S_AXI_WSTRB"
3746	SrcPort 1
3747	DstBlock "memmap"
3748	DstPort 24
3749	}
3750	Line {
3751	SrcBlock "S_AXI_WLAST"
3752	SrcPort 1
3753	DstBlock "memmap"
3754	DstPort 23
3755	}
3756	Line {
3757	SrcBlock "S_AXI_WDATA"
3758	SrcPort 1
3759	DstBlock "memmap"
3760	DstPort 22
3761	}
3762	Line {
3763	SrcBlock "S_AXI_RREADY"
3764	SrcPort 1
3765	DstBlock "memmap"
3766	DstPort 21
3767	}
3768	Line {
3769	SrcBlock "S_AXI_BREADY"
3770	SrcPort 1
3771	DstBlock "memmap"
3772	DstPort 20
3773	}
3774	Line {
3775	SrcBlock "S_AXI_AWVALID"
3776	SrcPort 1
3777	DstBlock "memmap"
3778	DstPort 19
3779	}
3780	Line {
3781	SrcBlock "S_AXI_AWSIZE"
3782	SrcPort 1
3783	DstBlock "memmap"
3784	DstPort 18
3785	}
3786	Line {
3787	SrcBlock "S_AXI_AWPROT"
3788	SrcPort 1
3789	DstBlock "memmap"
3790	DstPort 17
3791	}
3792	Line {
3793	SrcBlock "S_AXI_AWLOCK"
3794	SrcPort 1
3795	DstBlock "memmap"
3796	DstPort 16
3797	}
3798	Line {
3799	SrcBlock "S_AXI_AWLEN"
3800	SrcPort 1
3801	DstBlock "memmap"
3802	DstPort 15
3803	}
3804	Line {
3805	SrcBlock "S_AXI_AWID"
3806	SrcPort 1
3807	DstBlock "memmap"
3808	DstPort 14
3809	}
3810	Line {
3811	SrcBlock "S_AXI_AWCACHE"
3812	SrcPort 1
3813	DstBlock "memmap"
3814	DstPort 13
3815	}
3816	Line {
3817	SrcBlock "S_AXI_AWBURST"
3818	SrcPort 1
3819	DstBlock "memmap"
3820	DstPort 12
3821	}
3822	Line {
3823	SrcBlock "S_AXI_AWADDR"
3824	SrcPort 1
3825	DstBlock "memmap"
3826	DstPort 11
3827	}
3828	Line {
3829	SrcBlock "S_AXI_ARVALID"
3830	SrcPort 1
3831	DstBlock "memmap"
3832	DstPort 10
3833	}
3834	Line {
3835	SrcBlock "S_AXI_ARSIZE"
3836	SrcPort 1
3837	DstBlock "memmap"
3838	DstPort 9
3839	}
3840	Line {
3841	SrcBlock "S_AXI_ARPROT"
3842	SrcPort 1
3843	DstBlock "memmap"
3844	DstPort 8
3845	}
3846	Line {
3847	SrcBlock "S_AXI_ARLOCK"
3848	SrcPort 1
3849	DstBlock "memmap"
3850	DstPort 7
3851	}
3852	Line {
3853	SrcBlock "S_AXI_ARLEN"
3854	SrcPort 1
3855	DstBlock "memmap"
3856	DstPort 6
3857	}
3858	Line {
3859	SrcBlock "S_AXI_ARID"
3860	SrcPort 1
3861	DstBlock "memmap"
3862	DstPort 5
3863	}
3864	Line {
3865	SrcBlock "S_AXI_ARCACHE"
3866	SrcPort 1
3867	DstBlock "memmap"
3868	DstPort 4
3869	}
3870	Line {
3871	SrcBlock "S_AXI_ARBURST"
3872	SrcPort 1
3873	DstBlock "memmap"
3874	DstPort 3
3875	}
3876	Line {
3877	SrcBlock "S_AXI_ARADDR"
3878	SrcPort 1
3879	DstBlock "memmap"
3880	DstPort 2
3881	}
3882	Line {
3883	SrcBlock "AXI_ARESETN"
3884	SrcPort 1
3885	DstBlock "memmap"
3886	DstPort 1
3887	}
3888	Line {
3889	SrcBlock "From Register"
3890	SrcPort 1
3891	DstBlock "memmap"
3892	DstPort 26
3893	}
3894	Line {
3895	SrcBlock "From Register1"
3896	SrcPort 1
3897	DstBlock "memmap"
3898	DstPort 27
3899	}
3900	Line {
3901	SrcBlock "To Register"
3902	SrcPort 1
3903	DstBlock "memmap"
3904	DstPort 30
3905	}
3906	Line {
3907	SrcBlock "To Register1"
3908	SrcPort 1
3909	DstBlock "memmap"
3910	DstPort 31
3911	}
3912	Line {
3913	SrcBlock "From Register2"
3914	SrcPort 1
3915	DstBlock "memmap"
3916	DstPort 28
3917	}
3918	Line {
3919	SrcBlock "From Register3"
3920	SrcPort 1
3921	DstBlock "memmap"
3922	DstPort 29
3923	}
3924	Line {
3925	SrcBlock "To Register2"
3926	SrcPort 1
3927	DstBlock "memmap"
3928	DstPort 32
3929	}
3930	Line {
3931	SrcBlock "S_AXI_WREADY"
3932	SrcPort 1
3933	DstBlock "Terminator10"
3934	DstPort 1
3935	}
3936	Line {
3937	SrcBlock "S_AXI_RVALID"
3938	SrcPort 1
3939	DstBlock "Terminator9"
3940	DstPort 1
3941	}
3942	Line {
3943	SrcBlock "S_AXI_RRESP"
3944	SrcPort 1
3945	DstBlock "Terminator8"
3946	DstPort 1
3947	}
3948	Line {
3949	SrcBlock "S_AXI_RLAST"
3950	SrcPort 1
3951	DstBlock "Terminator7"
3952	DstPort 1
3953	}
3954	Line {
3955	SrcBlock "S_AXI_RID"
3956	SrcPort 1
3957	DstBlock "Terminator6"
3958	DstPort 1
3959	}
3960	Line {
3961	SrcBlock "S_AXI_RDATA"
3962	SrcPort 1
3963	DstBlock "Terminator5"
3964	DstPort 1
3965	}
3966	Line {
3967	SrcBlock "S_AXI_BVALID"
3968	SrcPort 1
3969	DstBlock "Terminator4"
3970	DstPort 1
3971	}
3972	Line {
3973	SrcBlock "S_AXI_BRESP"
3974	SrcPort 1
3975	DstBlock "Terminator3"
3976	DstPort 1
3977	}
3978	Line {
3979	SrcBlock "S_AXI_BID"
3980	SrcPort 1
3981	DstBlock "Terminator2"
3982	DstPort 1
3983	}
3984	Line {
3985	SrcBlock "S_AXI_AWREADY"
3986	SrcPort 1
3987	DstBlock "Terminator1"
3988	DstPort 1
3989	}
3990	Line {
3991	SrcBlock "S_AXI_ARREADY"
3992	SrcPort 1
3993	DstBlock "Terminator"
3994	DstPort 1
3995	}
3996	Line {
3997	SrcBlock "Constant24"
3998	SrcPort 1
3999	DstBlock "S_AXI_WVALID"
4000	DstPort 1
4001	}
4002	Line {
4003	SrcBlock "Constant23"
4004	SrcPort 1
4005	DstBlock "S_AXI_WSTRB"
4006	DstPort 1
4007	}
4008	Line {
4009	SrcBlock "Constant22"
4010	SrcPort 1
4011	DstBlock "S_AXI_WLAST"
4012	DstPort 1
4013	}
4014	Line {
4015	SrcBlock "Constant21"
4016	SrcPort 1
4017	DstBlock "S_AXI_WDATA"
4018	DstPort 1
4019	}
4020	Line {
4021	SrcBlock "Constant20"
4022	SrcPort 1
4023	DstBlock "S_AXI_RREADY"
4024	DstPort 1
4025	}
4026	Line {
4027	SrcBlock "Constant19"
4028	SrcPort 1
4029	DstBlock "S_AXI_BREADY"
4030	DstPort 1
4031	}
4032	Line {
4033	SrcBlock "Constant18"
4034	SrcPort 1
4035	DstBlock "S_AXI_AWVALID"
4036	DstPort 1
4037	}
4038	Line {
4039	SrcBlock "Constant17"
4040	SrcPort 1
4041	DstBlock "S_AXI_AWSIZE"
4042	DstPort 1
4043	}
4044	Line {
4045	SrcBlock "Constant16"
4046	SrcPort 1
4047	DstBlock "S_AXI_AWPROT"
4048	DstPort 1
4049	}
4050	Line {
4051	SrcBlock "Constant15"
4052	SrcPort 1
4053	DstBlock "S_AXI_AWLOCK"
4054	DstPort 1
4055	}
4056	Line {
4057	SrcBlock "Constant14"
4058	SrcPort 1
4059	DstBlock "S_AXI_AWLEN"
4060	DstPort 1
4061	}
4062	Line {
4063	SrcBlock "Constant13"
4064	SrcPort 1
4065	DstBlock "S_AXI_AWID"
4066	DstPort 1
4067	}
4068	Line {
4069	SrcBlock "Constant12"
4070	SrcPort 1
4071	DstBlock "S_AXI_AWCACHE"
4072	DstPort 1
4073	}
4074	Line {
4075	SrcBlock "Constant11"
4076	SrcPort 1
4077	DstBlock "S_AXI_AWBURST"
4078	DstPort 1
4079	}
4080	Line {
4081	SrcBlock "Constant10"
4082	SrcPort 1
4083	DstBlock "S_AXI_AWADDR"
4084	DstPort 1
4085	}
4086	Line {
4087	SrcBlock "Constant9"
4088	SrcPort 1
4089	DstBlock "S_AXI_ARVALID"
4090	DstPort 1
4091	}
4092	Line {
4093	SrcBlock "Constant8"
4094	SrcPort 1
4095	DstBlock "S_AXI_ARSIZE"
4096	DstPort 1
4097	}
4098	Line {
4099	SrcBlock "Constant7"
4100	SrcPort 1
4101	DstBlock "S_AXI_ARPROT"
4102	DstPort 1
4103	}
4104	Line {
4105	SrcBlock "Constant6"
4106	SrcPort 1
4107	DstBlock "S_AXI_ARLOCK"
4108	DstPort 1
4109	}
4110	Line {
4111	SrcBlock "Constant5"
4112	SrcPort 1
4113	DstBlock "S_AXI_ARLEN"
4114	DstPort 1
4115	}
4116	Line {
4117	SrcBlock "Constant4"
4118	SrcPort 1
4119	DstBlock "S_AXI_ARID"
4120	DstPort 1
4121	}
4122	Line {
4123	SrcBlock "Constant3"
4124	SrcPort 1
4125	DstBlock "S_AXI_ARCACHE"
4126	DstPort 1
4127	}
4128	Line {
4129	SrcBlock "Constant2"
4130	SrcPort 1
4131	DstBlock "S_AXI_ARBURST"
4132	DstPort 1
4133	}
4134	Line {
4135	SrcBlock "Constant1"
4136	SrcPort 1
4137	DstBlock "S_AXI_ARADDR"
4138	DstPort 1
4139	}
4140	Line {
4141	SrcBlock "Constant"
4142	SrcPort 1
4143	DstBlock "AXI_ARESETN"
4144	DstPort 1
4145	}
4146	}
4147	}
4148	Block {
4149	BlockType From
4150	Name "From1"
4151	SID "105"
4152	Position [130, 197, 320, 213]
4153	ZOrder -9
4154	ShowName off
4155	GotoTag "reg_New_MAC_Time_MSB"
4156	TagVisibility "global"
4157	}
4158	Block {
4159	BlockType From
4160	Name "From19"
4161	SID "106"
4162	Position [130, 212, 320, 228]
4163	ZOrder -9
4164	ShowName off
4165	GotoTag "reg_New_MAC_Time_LSB"
4166	TagVisibility "global"
4167	}
4168	Block {
4169	BlockType From
4170	Name "From2"
4171	SID "204"
4172	Position [130, 77, 320, 93]
4173	ZOrder -9
4174	ShowName off
4175	GotoTag "reg_Reset_System_Time"
4176	TagVisibility "global"
4177	}
4178	Block {
4179	BlockType From
4180	Name "From3"
4181	SID "130"
4182	Position [540, 412, 730, 428]
4183	ZOrder -9
4184	ShowName off
4185	GotoTag "MAC_TIME_USEC"
4186	TagVisibility "global"
4187	}
4188	Block {
4189	BlockType From
4190	Name "From4"
4191	SID "133"
4192	Position [540, 512, 730, 528]
4193	ZOrder -9
4194	ShowName off
4195	GotoTag "SYSTEM_TIME_USEC"
4196	TagVisibility "global"
4197	}
4198	Block {
4199	BlockType From
4200	Name "From5"
4201	SID "203"
4202	Position [130, 172, 320, 188]
4203	ZOrder -9
4204	ShowName off
4205	GotoTag "reg_Load_MAC_Time"
4206	TagVisibility "global"
4207	}
4208	Block {
4209	BlockType Goto
4210	Name "Goto"
4211	SID "9"
4212	Position [940, 91, 1130, 109]
4213	ZOrder -10
4214	ShowName off
4215	GotoTag "SYSTEM_TIME_USEC"
4216	TagVisibility "global"
4217	}
4218	Block {
4219	BlockType Goto
4220	Name "Goto1"
4221	SID "108"
4222	Position [940, 206, 1130, 224]
4223	ZOrder -10
4224	ShowName off
4225	GotoTag "MAC_TIME_USEC"
4226	TagVisibility "global"
4227	}
4228	Block {
4229	BlockType Reference
4230	Name "Logical"
4231	SID "109"
4232	Ports [2, 1]
4233	Position [565, 232, 595, 263]
4234	ShowName off
4235	LibraryVersion "1.2"
4236	SourceBlock "xbsIndex_r4/Logical"
4237	SourceType "Xilinx Logical Block Block"
4238	logical_function "OR"
4239	inputs "2"
4240	en off
4241	latency "0"
4242	precision "Full"
4243	arith_type "Unsigned"
4244	n_bits "16"
4245	bin_pt "0"
4246	align_bp on
4247	dbl_ovrd off
4248	xl_use_area off
4249	xl_area "[0,0,0,0,0,0,0]"
4250	has_advanced_control "0"
4251	sggui_pos "-1,-1,-1,-1"
4252	block_type "logical"
4253	sg_icon_stat "30,31,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]"
4254	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0."
4255	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19"
4256	".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.4"
4257	"4 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\n"
4258	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\n"
4259	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('o"
4260	"r');\nfprintf('','COMMENT: end icon text');"
4261	}
4262	Block {
4263	BlockType Reference
4264	Name "MAC Time\n64-bit Counter"
4265	SID "110"
4266	Ports [3, 1]
4267	Position [650, 164, 710, 266]
4268	LibraryVersion "1.2"
4269	SourceBlock "xbsIndex_r4/Counter"
4270	SourceType "Xilinx Counter Block"
4271	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited cou"
4272	"nter is implemented by combining a counter with a comparator."
4273	cnt_type "Free Running"
4274	cnt_to "Inf"
4275	operation "Up"
4276	start_count "0"
4277	cnt_by_val "1"
4278	arith_type "Unsigned"
4279	n_bits "64"
4280	bin_pt "0"
4281	load_pin on
4282	rst off
4283	en on
4284	explicit_period "off"
4285	period "1"
4286	dbl_ovrd off
4287	use_behavioral_HDL off
4288	implementation "Fabric"
4289	xl_use_area off
4290	xl_area "[0,0,0,0,0,0,0]"
4291	has_advanced_control "0"
4292	sggui_pos "-1,-1,-1,-1"
4293	block_type "counter"
4294	sg_icon_stat "60,102,3,1,white,blue,0,4f561634,right,,[ ],[ ]"
4295	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 102 102 0 ],[0.77 "
4296	"0.82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 102 102 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[59"
4297	".88 59.88 67.88 59.88 67.88 67.88 67.88 59.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[51.88 51.88 59."
4298	"88 59.88 51.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[43.88 43.88 51.88 51.88 43.88 ],[1"
4299	" 1 1 ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[35.88 35.88 43.88 35.88 43.88 43.88 35.88 ],[0.931 0."
4300	"946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'"
4301	");port_label('input',1,'load');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',"
4302	"3,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');"
4303	}
4304	Block {
4305	BlockType Reference
4306	Name "MAC_TIME_LSB"
4307	SID "22"
4308	Ports [1, 1]
4309	Position [1055, 410, 1115, 430]
4310	LibraryVersion "1.2"
4311	SourceBlock "xbsIndex_r4/Gateway Out"
4312	SourceType "Xilinx Gateway Out Block"
4313	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty"
4314	"pe Simulink integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top"
4315	" level output ports or are discarded, depending on how they are configured."
4316	inherit_from_input off
4317	hdl_port on
4318	timing_constraint "None"
4319	locs_specified off
4320	LOCs "{}"
4321	UseAsDAC off
4322	DACChannel "'1'"
4323	xl_use_area off
4324	xl_area "[0,0,0,0,0,0,0]"
4325	has_advanced_control "0"
4326	sggui_pos "-1,-1,-1,-1"
4327	block_type "gatewayout"
4328	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
4329	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0."
4330	"93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12."
4331	"22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1"
4332	"2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],"
4333	"[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97"
4334	"9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
4335	"port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf"
4336	"printf('','COMMENT: end icon text');"
4337	}
4338	Block {
4339	BlockType Reference
4340	Name "MAC_TIME_MSB"
4341	SID "23"
4342	Ports [1, 1]
4343	Position [1055, 450, 1115, 470]
4344	LibraryVersion "1.2"
4345	SourceBlock "xbsIndex_r4/Gateway Out"
4346	SourceType "Xilinx Gateway Out Block"
4347	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty"
4348	"pe Simulink integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top"
4349	" level output ports or are discarded, depending on how they are configured."
4350	inherit_from_input off
4351	hdl_port on
4352	timing_constraint "None"
4353	locs_specified off
4354	LOCs "{}"
4355	UseAsDAC off
4356	DACChannel "'1'"
4357	xl_use_area off
4358	xl_area "[0,0,0,0,0,0,0]"
4359	has_advanced_control "0"
4360	sggui_pos "-1,-1,-1,-1"
4361	block_type "gatewayout"
4362	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
4363	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0."
4364	"93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12."
4365	"22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1"
4366	"2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],"
4367	"[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97"
4368	"9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
4369	"port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf"
4370	"printf('','COMMENT: end icon text');"
4371	}
4372	Block {
4373	BlockType SubSystem
4374	Name "Posedge"
4375	SID "111"
4376	Ports [1, 1]
4377	Position [360, 171, 405, 189]
4378	NamePlacement "alternate"
4379	MinAlgLoopOccurrences off
4380	PropExecContextOutsideSubsystem off
4381	RTWSystemCode "Auto"
4382	FunctionWithSeparateData off
4383	Opaque off
4384	RequestExecContextInheritance off
4385	MaskHideContents off
4386	System {
4387	Name "Posedge"
4388	Location [88, 301, 2330, 1301]
4389	Open off
4390	ModelBrowserVisibility off
4391	ModelBrowserWidth 200
4392	ScreenColor "white"
4393	PaperOrientation "landscape"
4394	PaperPositionMode "auto"
4395	PaperType "usletter"
4396	PaperUnits "inches"
4397	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
4398	TiledPageScale 1
4399	ShowPageBoundaries off
4400	ZoomFactor "100"
4401	Block {
4402	BlockType Inport
4403	Name "D"
4404	SID "112"
4405	Position [200, 253, 230, 267]
4406	IconDisplay "Port number"
4407	}
4408	Block {
4409	BlockType Reference
4410	Name "Delay"
4411	SID "113"
4412	Ports [1, 1]
4413	Position [425, 153, 460, 177]
4414	ShowName off
4415	LibraryVersion "1.2"
4416	SourceBlock "xbsIndex_r4/Delay"
4417	SourceType "Xilinx Delay Block"
4418	infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If re"
4419	"gister retiming is enabled, the delay line is a chain of flip-flops."
4420	rst off
4421	infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs"
4422	en off
4423	latency "1"
4424	dbl_ovrd off
4425	reg_retiming off
4426	xl_use_area off
4427	xl_area "[1 1 0 0 0 0 0]"
4428	has_advanced_control "0"
4429	sggui_pos "-1,-1,-1,-1"
4430	block_type "delay"
4431	block_version "VER_STRING_GOES_HERE"
4432	sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]"
4433	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91"
4434	" ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15.3"
4435	"3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33 15"
4436	".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 "
4437	"]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973"
4438	" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('"
4439	"z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');"
4440	}
4441	Block {
4442	BlockType Reference
4443	Name "Inverter"
4444	SID "114"
4445	Ports [1, 1]
4446	Position [490, 156, 515, 174]
4447	ShowName off
4448	LibraryVersion "1.2"
4449	SourceBlock "xbsIndex_r4/Inverter"
4450	SourceType "Xilinx Inverter Block"
4451	infoedit "Bitwise logical negation (one's complement) operator."
4452	en off
4453	latency "0"
4454	dbl_ovrd off
4455	xl_use_area off
4456	xl_area "[0 0 0 0 0 0 0]"
4457	has_advanced_control "0"
4458	sggui_pos "-1,-1,-1,-1"
4459	block_type "inv"
4460	block_version "VER_STRING_GOES_HERE"
4461	sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]"
4462	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91"
4463	" ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2"
4464	"2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0."
4465	"931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 "
4466	"14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en"
4467	"d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: "
4468	"end icon text');"
4469	}
4470	Block {
4471	BlockType Reference
4472	Name "Logical1"
4473	SID "115"
4474	Ports [2, 1]
4475	Position [540, 151, 585, 204]
4476	ShowName off
4477	LibraryVersion "1.2"
4478	SourceBlock "xbsIndex_r4/Logical"
4479	SourceType "Xilinx Logical Block Block"
4480	logical_function "AND"
4481	inputs "2"
4482	en off
4483	latency "0"
4484	precision "Full"
4485	arith_type "Unsigned"
4486	n_bits "8"
4487	bin_pt "2"
4488	align_bp on
4489	dbl_ovrd off
4490	xl_use_area off
4491	xl_area "[1 0 0 1 0 0 0]"
4492	has_advanced_control "0"
4493	sggui_pos "-1,-1,-1,-1"
4494	block_type "logical"
4495	block_version "VER_STRING_GOES_HERE"
4496	sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]"
4497	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.91"
4498	" ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 32.66 38."
4499	"66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 32.66 26.66"
4500	" ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1 1 ]);\npatch("
4501	"[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0.946 0.973 ]);\nfp"
4502	"rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');"
4503	"\nfprintf('','COMMENT: end icon text');"
4504	}
4505	Block {
4506	BlockType Outport
4507	Name "Q"
4508	SID "116"
4509	Position [610, 173, 640, 187]
4510	IconDisplay "Port number"
4511	}
4512	Line {
4513	SrcBlock "Delay"
4514	SrcPort 1
4515	DstBlock "Inverter"
4516	DstPort 1
4517	}
4518	Line {
4519	SrcBlock "Inverter"
4520	SrcPort 1
4521	DstBlock "Logical1"
4522	DstPort 1
4523	}
4524	Line {
4525	SrcBlock "Logical1"
4526	SrcPort 1
4527	DstBlock "Q"
4528	DstPort 1
4529	}
4530	Line {
4531	SrcBlock "D"
4532	SrcPort 1
4533	Points [150, 0; 0, -70]
4534	Branch {
4535	Points [0, -25]
4536	DstBlock "Delay"
4537	DstPort 1
4538	}
4539	Branch {
4540	DstBlock "Logical1"
4541	DstPort 2
4542	}
4543	}
4544	Annotation {
4545	Name "Rising Edge Detection"
4546	Position [500, 112]
4547	}
4548	}
4549	}
4550	Block {
4551	BlockType Reference
4552	Name "Register"
4553	SID "18"
4554	Ports [1, 1]
4555	Position [965, 446, 995, 474]
4556	ShowName off
4557	LibraryVersion "1.2"
4558	SourceBlock "xbsIndex_r4/Register"
4559	SourceType "Xilinx Register Block"
4560	init "0"
4561	rst off
4562	en off
4563	dbl_ovrd off
4564	xl_use_area off
4565	xl_area "[0,0,0,0,0,0,0]"
4566	has_advanced_control "0"
4567	sggui_pos "-1,-1,-1,-1"
4568	block_type "register"
4569	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4570	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4571	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4572	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4573	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4574	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4575	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4576	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4577	"f('','COMMENT: end icon text');"
4578	}
4579	Block {
4580	BlockType Reference
4581	Name "Register1"
4582	SID "19"
4583	Ports [1, 1]
4584	Position [900, 446, 930, 474]
4585	ShowName off
4586	LibraryVersion "1.2"
4587	SourceBlock "xbsIndex_r4/Register"
4588	SourceType "Xilinx Register Block"
4589	init "0"
4590	rst off
4591	en off
4592	dbl_ovrd off
4593	xl_use_area off
4594	xl_area "[0,0,0,0,0,0,0]"
4595	has_advanced_control "0"
4596	sggui_pos "-1,-1,-1,-1"
4597	block_type "register"
4598	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4599	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4600	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4601	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4602	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4603	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4604	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4605	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4606	"f('','COMMENT: end icon text');"
4607	}
4608	Block {
4609	BlockType Reference
4610	Name "Register10"
4611	SID "213"
4612	Ports [1, 1]
4613	Position [965, 331, 995, 359]
4614	ShowName off
4615	LibraryVersion "1.2"
4616	SourceBlock "xbsIndex_r4/Register"
4617	SourceType "Xilinx Register Block"
4618	init "0"
4619	rst off
4620	en off
4621	dbl_ovrd off
4622	xl_use_area off
4623	xl_area "[0,0,0,0,0,0,0]"
4624	has_advanced_control "0"
4625	sggui_pos "-1,-1,-1,-1"
4626	block_type "register"
4627	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4628	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4629	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4630	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4631	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4632	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4633	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4634	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4635	"f('','COMMENT: end icon text');"
4636	}
4637	Block {
4638	BlockType Reference
4639	Name "Register11"
4640	SID "218"
4641	Ports [1, 1]
4642	Position [900, 631, 930, 659]
4643	ShowName off
4644	LibraryVersion "1.2"
4645	SourceBlock "xbsIndex_r4/Register"
4646	SourceType "Xilinx Register Block"
4647	init "0"
4648	rst off
4649	en off
4650	dbl_ovrd off
4651	xl_use_area off
4652	xl_area "[0,0,0,0,0,0,0]"
4653	has_advanced_control "0"
4654	sggui_pos "-1,-1,-1,-1"
4655	block_type "register"
4656	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4657	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4658	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4659	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4660	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4661	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4662	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4663	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4664	"f('','COMMENT: end icon text');"
4665	}
4666	Block {
4667	BlockType Reference
4668	Name "Register12"
4669	SID "219"
4670	Ports [1, 1]
4671	Position [965, 631, 995, 659]
4672	ShowName off
4673	LibraryVersion "1.2"
4674	SourceBlock "xbsIndex_r4/Register"
4675	SourceType "Xilinx Register Block"
4676	init "0"
4677	rst off
4678	en off
4679	dbl_ovrd off
4680	xl_use_area off
4681	xl_area "[0,0,0,0,0,0,0]"
4682	has_advanced_control "0"
4683	sggui_pos "-1,-1,-1,-1"
4684	block_type "register"
4685	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4686	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4687	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4688	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4689	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4690	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4691	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4692	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4693	"f('','COMMENT: end icon text');"
4694	}
4695	Block {
4696	BlockType Reference
4697	Name "Register13"
4698	SID "221"
4699	Ports [1, 1]
4700	Position [830, 631, 860, 659]
4701	ShowName off
4702	LibraryVersion "1.2"
4703	SourceBlock "xbsIndex_r4/Register"
4704	SourceType "Xilinx Register Block"
4705	init "0"
4706	rst off
4707	en off
4708	dbl_ovrd off
4709	xl_use_area off
4710	xl_area "[0,0,0,0,0,0,0]"
4711	has_advanced_control "0"
4712	sggui_pos "-1,-1,-1,-1"
4713	block_type "register"
4714	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4715	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4716	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4717	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4718	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4719	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4720	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4721	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4722	"f('','COMMENT: end icon text');"
4723	}
4724	Block {
4725	BlockType Reference
4726	Name "Register2"
4727	SID "20"
4728	Ports [1, 1]
4729	Position [900, 406, 930, 434]
4730	ShowName off
4731	LibraryVersion "1.2"
4732	SourceBlock "xbsIndex_r4/Register"
4733	SourceType "Xilinx Register Block"
4734	init "0"
4735	rst off
4736	en off
4737	dbl_ovrd off
4738	xl_use_area off
4739	xl_area "[0,0,0,0,0,0,0]"
4740	has_advanced_control "0"
4741	sggui_pos "-1,-1,-1,-1"
4742	block_type "register"
4743	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4744	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4745	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4746	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4747	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4748	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4749	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4750	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4751	"f('','COMMENT: end icon text');"
4752	}
4753	Block {
4754	BlockType Reference
4755	Name "Register3"
4756	SID "21"
4757	Ports [1, 1]
4758	Position [965, 406, 995, 434]
4759	ShowName off
4760	LibraryVersion "1.2"
4761	SourceBlock "xbsIndex_r4/Register"
4762	SourceType "Xilinx Register Block"
4763	init "0"
4764	rst off
4765	en off
4766	dbl_ovrd off
4767	xl_use_area off
4768	xl_area "[0,0,0,0,0,0,0]"
4769	has_advanced_control "0"
4770	sggui_pos "-1,-1,-1,-1"
4771	block_type "register"
4772	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4773	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4774	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4775	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4776	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4777	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4778	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4779	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4780	"f('','COMMENT: end icon text');"
4781	}
4782	Block {
4783	BlockType Reference
4784	Name "Register4"
4785	SID "136"
4786	Ports [1, 1]
4787	Position [965, 546, 995, 574]
4788	ShowName off
4789	LibraryVersion "1.2"
4790	SourceBlock "xbsIndex_r4/Register"
4791	SourceType "Xilinx Register Block"
4792	init "0"
4793	rst off
4794	en off
4795	dbl_ovrd off
4796	xl_use_area off
4797	xl_area "[0,0,0,0,0,0,0]"
4798	has_advanced_control "0"
4799	sggui_pos "-1,-1,-1,-1"
4800	block_type "register"
4801	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4802	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4803	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4804	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4805	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4806	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4807	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4808	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4809	"f('','COMMENT: end icon text');"
4810	}
4811	Block {
4812	BlockType Reference
4813	Name "Register5"
4814	SID "137"
4815	Ports [1, 1]
4816	Position [900, 546, 930, 574]
4817	ShowName off
4818	LibraryVersion "1.2"
4819	SourceBlock "xbsIndex_r4/Register"
4820	SourceType "Xilinx Register Block"
4821	init "0"
4822	rst off
4823	en off
4824	dbl_ovrd off
4825	xl_use_area off
4826	xl_area "[0,0,0,0,0,0,0]"
4827	has_advanced_control "0"
4828	sggui_pos "-1,-1,-1,-1"
4829	block_type "register"
4830	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4831	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4832	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4833	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4834	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4835	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4836	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4837	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4838	"f('','COMMENT: end icon text');"
4839	}
4840	Block {
4841	BlockType Reference
4842	Name "Register50"
4843	SID "78"
4844	Ports [1, 1]
4845	Position [810, 86, 840, 114]
4846	ShowName off
4847	LibraryVersion "1.2"
4848	SourceBlock "xbsIndex_r4/Register"
4849	SourceType "Xilinx Register Block"
4850	init "0"
4851	rst off
4852	en off
4853	dbl_ovrd off
4854	xl_use_area off
4855	xl_area "[0,0,0,0,0,0,0]"
4856	has_advanced_control "0"
4857	sggui_pos "-1,-1,-1,-1"
4858	block_type "register"
4859	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4860	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4861	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4862	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4863	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4864	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4865	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4866	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4867	"f('','COMMENT: end icon text');"
4868	}
4869	Block {
4870	BlockType Reference
4871	Name "Register6"
4872	SID "138"
4873	Ports [1, 1]
4874	Position [900, 506, 930, 534]
4875	ShowName off
4876	LibraryVersion "1.2"
4877	SourceBlock "xbsIndex_r4/Register"
4878	SourceType "Xilinx Register Block"
4879	init "0"
4880	rst off
4881	en off
4882	dbl_ovrd off
4883	xl_use_area off
4884	xl_area "[0,0,0,0,0,0,0]"
4885	has_advanced_control "0"
4886	sggui_pos "-1,-1,-1,-1"
4887	block_type "register"
4888	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4889	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4890	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4891	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4892	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4893	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4894	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4895	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4896	"f('','COMMENT: end icon text');"
4897	}
4898	Block {
4899	BlockType Reference
4900	Name "Register7"
4901	SID "139"
4902	Ports [1, 1]
4903	Position [965, 506, 995, 534]
4904	ShowName off
4905	LibraryVersion "1.2"
4906	SourceBlock "xbsIndex_r4/Register"
4907	SourceType "Xilinx Register Block"
4908	init "0"
4909	rst off
4910	en off
4911	dbl_ovrd off
4912	xl_use_area off
4913	xl_area "[0,0,0,0,0,0,0]"
4914	has_advanced_control "0"
4915	sggui_pos "-1,-1,-1,-1"
4916	block_type "register"
4917	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4918	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4919	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4920	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4921	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4922	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4923	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4924	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4925	"f('','COMMENT: end icon text');"
4926	}
4927	Block {
4928	BlockType Reference
4929	Name "Register8"
4930	SID "154"
4931	Ports [1, 1]
4932	Position [810, 201, 840, 229]
4933	ShowName off
4934	LibraryVersion "1.2"
4935	SourceBlock "xbsIndex_r4/Register"
4936	SourceType "Xilinx Register Block"
4937	init "0"
4938	rst off
4939	en off
4940	dbl_ovrd off
4941	xl_use_area off
4942	xl_area "[0,0,0,0,0,0,0]"
4943	has_advanced_control "0"
4944	sggui_pos "-1,-1,-1,-1"
4945	block_type "register"
4946	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4947	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4948	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4949	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4950	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4951	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4952	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4953	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4954	"f('','COMMENT: end icon text');"
4955	}
4956	Block {
4957	BlockType Reference
4958	Name "Register9"
4959	SID "212"
4960	Ports [1, 1]
4961	Position [900, 331, 930, 359]
4962	ShowName off
4963	LibraryVersion "1.2"
4964	SourceBlock "xbsIndex_r4/Register"
4965	SourceType "Xilinx Register Block"
4966	init "0"
4967	rst off
4968	en off
4969	dbl_ovrd off
4970	xl_use_area off
4971	xl_area "[0,0,0,0,0,0,0]"
4972	has_advanced_control "0"
4973	sggui_pos "-1,-1,-1,-1"
4974	block_type "register"
4975	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
4976	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0."
4977	"82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18"
4978	".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.4"
4979	"4 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\n"
4980	"patch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\n"
4981	"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i"
4982	"nput',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint"
4983	"f('','COMMENT: end icon text');"
4984	}
4985	Block {
4986	BlockType SubSystem
4987	Name "Registers"
4988	SID "32"
4989	Ports []
4990	Position [283, 397, 326, 443]
4991	MinAlgLoopOccurrences off
4992	PropExecContextOutsideSubsystem off
4993	RTWSystemCode "Auto"
4994	FunctionWithSeparateData off
4995	Opaque off
4996	RequestExecContextInheritance off
4997	MaskHideContents off
4998	System {
4999	Name "Registers"
5000	Location [2, 94, 1918, 1115]
5001	Open off
5002	ModelBrowserVisibility off
5003	ModelBrowserWidth 200
5004	ScreenColor "white"
5005	PaperOrientation "landscape"
5006	PaperPositionMode "auto"
5007	PaperType "usletter"
5008	PaperUnits "inches"
5009	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
5010	TiledPageScale 1
5011	ShowPageBoundaries off
5012	ZoomFactor "100"
5013	Block {
5014	BlockType Reference
5015	Name "32LSB"
5016	SID "33"
5017	Ports [1, 1]
5018	Position [1010, 113, 1050, 127]
5019	NamePlacement "alternate"
5020	LibraryVersion "1.2"
5021	SourceBlock "xbsIndex_r4/Slice"
5022	SourceType "Xilinx Bit Slice Extractor Block"
5023	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type "
5024	"is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
5025	"e notes: In hardware this block costs nothing."
5026	nbits "32"
5027	boolean_output off
5028	mode "Lower Bit Location + Width"
5029	bit1 "0"
5030	base1 "MSB of Input"
5031	bit0 "0"
5032	base0 "LSB of Input"
5033	dbl_ovrd off
5034	has_advanced_control "0"
5035	sggui_pos "20,20,449,398"
5036	block_type "slice"
5037	block_version "VER_STRING_GOES_HERE"
5038	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5039	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.91"
5040	" ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 11."
5041	"22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0."
5042	"931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.55 24"
5043	".44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME"
5044	"NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a:b]');"
5045	"\nfprintf('','COMMENT: end icon text');"
5046	}
5047	Block {
5048	BlockType Reference
5049	Name "32LSB1"
5050	SID "143"
5051	Ports [1, 1]
5052	Position [1010, 328, 1050, 342]
5053	NamePlacement "alternate"
5054	LibraryVersion "1.2"
5055	SourceBlock "xbsIndex_r4/Slice"
5056	SourceType "Xilinx Bit Slice Extractor Block"
5057	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type "
5058	"is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
5059	"e notes: In hardware this block costs nothing."
5060	nbits "32"
5061	boolean_output off
5062	mode "Lower Bit Location + Width"
5063	bit1 "0"
5064	base1 "MSB of Input"
5065	bit0 "0"
5066	base0 "LSB of Input"
5067	dbl_ovrd off
5068	has_advanced_control "0"
5069	sggui_pos "20,20,449,398"
5070	block_type "slice"
5071	block_version "VER_STRING_GOES_HERE"
5072	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5073	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.91"
5074	" ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 11."
5075	"22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0."
5076	"931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.55 24"
5077	".44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME"
5078	"NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a:b]');"
5079	"\nfprintf('','COMMENT: end icon text');"
5080	}
5081	Block {
5082	BlockType Reference
5083	Name "32MSB"
5084	SID "37"
5085	Ports [1, 1]
5086	Position [1010, 208, 1050, 222]
5087	LibraryVersion "1.2"
5088	SourceBlock "xbsIndex_r4/Slice"
5089	SourceType "Xilinx Bit Slice Extractor Block"
5090	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type "
5091	"is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
5092	"e notes: In hardware this block costs nothing."
5093	nbits "32"
5094	boolean_output off
5095	mode "Upper Bit Location + Width"
5096	bit1 "0"
5097	base1 "MSB of Input"
5098	bit0 "0"
5099	base0 "LSB of Input"
5100	dbl_ovrd off
5101	has_advanced_control "0"
5102	sggui_pos "20,20,449,398"
5103	block_type "slice"
5104	block_version "VER_STRING_GOES_HERE"
5105	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5106	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.91"
5107	" ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 11."
5108	"22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0."
5109	"931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.55 24"
5110	".44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME"
5111	"NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a:b]');"
5112	"\nfprintf('','COMMENT: end icon text');"
5113	}
5114	Block {
5115	BlockType Reference
5116	Name "32MSB1"
5117	SID "144"
5118	Ports [1, 1]
5119	Position [1010, 423, 1050, 437]
5120	LibraryVersion "1.2"
5121	SourceBlock "xbsIndex_r4/Slice"
5122	SourceType "Xilinx Bit Slice Extractor Block"
5123	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type "
5124	"is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br><br>Hardwar"
5125	"e notes: In hardware this block costs nothing."
5126	nbits "32"
5127	boolean_output off
5128	mode "Upper Bit Location + Width"
5129	bit1 "0"
5130	base1 "MSB of Input"
5131	bit0 "0"
5132	base0 "LSB of Input"
5133	dbl_ovrd off
5134	has_advanced_control "0"
5135	sggui_pos "20,20,449,398"
5136	block_type "slice"
5137	block_version "VER_STRING_GOES_HERE"
5138	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5139	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.91"
5140	" ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 11."
5141	"22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0."
5142	"931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.55 24"
5143	".44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME"
5144	"NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a:b]');"
5145	"\nfprintf('','COMMENT: end icon text');"
5146	}
5147	Block {
5148	BlockType Reference
5149	Name "Constant1"
5150	SID "145"
5151	Ports [0, 1]
5152	Position [1085, 355, 1110, 375]
5153	ShowName off
5154	LibraryVersion "1.2"
5155	SourceBlock "xbsIndex_r4/Constant"
5156	SourceType "Xilinx Constant Block Block"
5157	const "1"
5158	gui_display_data_type "Boolean"
5159	arith_type "Boolean"
5160	n_bits "30"
5161	bin_pt "0"
5162	preci_type "Single"
5163	exp_width "8"
5164	frac_width "24"
5165	explicit_period on
5166	period "1"
5167	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
5168	equ "P=C"
5169	opselect "C"
5170	inp2 "PCIN>>17"
5171	opr "+"
5172	inp1 "P"
5173	carry "CIN"
5174	dbl_ovrd off
5175	has_advanced_control "0"
5176	sggui_pos "-1,-1,-1,-1"
5177	block_type "constant"
5178	sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
5179	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
5180	" ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
5181	"2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
5182	"[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
5183	"6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
5184	"T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprin"
5185	"tf('','COMMENT: end icon text');"
5186	}
5187	Block {
5188	BlockType Reference
5189	Name "Constant2"
5190	SID "146"
5191	Ports [0, 1]
5192	Position [1085, 450, 1110, 470]
5193	ShowName off
5194	LibraryVersion "1.2"
5195	SourceBlock "xbsIndex_r4/Constant"
5196	SourceType "Xilinx Constant Block Block"
5197	const "1"
5198	gui_display_data_type "Boolean"
5199	arith_type "Boolean"
5200	n_bits "30"
5201	bin_pt "0"
5202	preci_type "Single"
5203	exp_width "8"
5204	frac_width "24"
5205	explicit_period on
5206	period "1"
5207	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
5208	equ "P=C"
5209	opselect "C"
5210	inp2 "PCIN>>17"
5211	opr "+"
5212	inp1 "P"
5213	carry "CIN"
5214	dbl_ovrd off
5215	has_advanced_control "0"
5216	sggui_pos "-1,-1,-1,-1"
5217	block_type "constant"
5218	sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
5219	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
5220	" ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
5221	"2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
5222	"[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
5223	"6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
5224	"T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprin"
5225	"tf('','COMMENT: end icon text');"
5226	}
5227	Block {
5228	BlockType Reference
5229	Name "Constant5"
5230	SID "42"
5231	Ports [0, 1]
5232	Position [1085, 140, 1110, 160]
5233	ShowName off
5234	LibraryVersion "1.2"
5235	SourceBlock "xbsIndex_r4/Constant"
5236	SourceType "Xilinx Constant Block Block"
5237	const "1"
5238	gui_display_data_type "Boolean"
5239	arith_type "Boolean"
5240	n_bits "30"
5241	bin_pt "0"
5242	preci_type "Single"
5243	exp_width "8"
5244	frac_width "24"
5245	explicit_period on
5246	period "1"
5247	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
5248	equ "P=C"
5249	opselect "C"
5250	inp2 "PCIN>>17"
5251	opr "+"
5252	inp1 "P"
5253	carry "CIN"
5254	dbl_ovrd off
5255	has_advanced_control "0"
5256	sggui_pos "-1,-1,-1,-1"
5257	block_type "constant"
5258	sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
5259	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
5260	" ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
5261	"2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
5262	"[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
5263	"6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
5264	"T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprin"
5265	"tf('','COMMENT: end icon text');"
5266	}
5267	Block {
5268	BlockType Reference
5269	Name "Constant6"
5270	SID "43"
5271	Ports [0, 1]
5272	Position [1085, 235, 1110, 255]
5273	ShowName off
5274	LibraryVersion "1.2"
5275	SourceBlock "xbsIndex_r4/Constant"
5276	SourceType "Xilinx Constant Block Block"
5277	const "1"
5278	gui_display_data_type "Boolean"
5279	arith_type "Boolean"
5280	n_bits "30"
5281	bin_pt "0"
5282	preci_type "Single"
5283	exp_width "8"
5284	frac_width "24"
5285	explicit_period on
5286	period "1"
5287	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
5288	equ "P=C"
5289	opselect "C"
5290	inp2 "PCIN>>17"
5291	opr "+"
5292	inp1 "P"
5293	carry "CIN"
5294	dbl_ovrd off
5295	has_advanced_control "0"
5296	sggui_pos "-1,-1,-1,-1"
5297	block_type "constant"
5298	sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]"
5299	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91"
5300	" ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2"
5301	"2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ],"
5302	"[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1"
5303	"6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
5304	"T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprin"
5305	"tf('','COMMENT: end icon text');"
5306	}
5307	Block {
5308	BlockType SubSystem
5309	Name "Ctrl Bits"
5310	SID "155"
5311	Ports [1]
5312	Position [445, 124, 495, 156]
5313	MinAlgLoopOccurrences off
5314	PropExecContextOutsideSubsystem off
5315	RTWSystemCode "Auto"
5316	FunctionWithSeparateData off
5317	Opaque off
5318	RequestExecContextInheritance off
5319	MaskHideContents off
5320	System {
5321	Name "Ctrl Bits"
5322	Location [950, 345, 1480, 478]
5323	Open off
5324	ModelBrowserVisibility off
5325	ModelBrowserWidth 200
5326	ScreenColor "white"
5327	PaperOrientation "landscape"
5328	PaperPositionMode "auto"
5329	PaperType "usletter"
5330	PaperUnits "inches"
5331	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
5332	TiledPageScale 1
5333	ShowPageBoundaries off
5334	ZoomFactor "100"
5335	Block {
5336	BlockType Inport
5337	Name "32b"
5338	SID "156"
5339	Position [25, 83, 55, 97]
5340	IconDisplay "Port number"
5341	}
5342	Block {
5343	BlockType Goto
5344	Name "Goto1"
5345	SID "158"
5346	Position [340, 80, 540, 100]
5347	ShowName off
5348	GotoTag "reg_Reset_System_Time"
5349	TagVisibility "global"
5350	}
5351	Block {
5352	BlockType Goto
5353	Name "Goto14"
5354	SID "200"
5355	Position [340, 120, 540, 140]
5356	ShowName off
5357	GotoTag "reg_Load_MAC_Time"
5358	TagVisibility "global"
5359	}
5360	Block {
5361	BlockType SubSystem
5362	Name "Sim Reset"
5363	SID "177"
5364	Ports [0, 1]
5365	Position [180, 25, 225, 55]
5366	MinAlgLoopOccurrences off
5367	PropExecContextOutsideSubsystem off
5368	RTWSystemCode "Auto"
5369	FunctionWithSeparateData off
5370	Opaque off
5371	RequestExecContextInheritance off
5372	MaskHideContents off
5373	System {
5374	Name "Sim Reset"
5375	Location [347, 173, 617, 257]
5376	Open off
5377	ModelBrowserVisibility off
5378	ModelBrowserWidth 200
5379	ScreenColor "white"
5380	PaperOrientation "landscape"
5381	PaperPositionMode "auto"
5382	PaperType "usletter"
5383	PaperUnits "inches"
5384	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
5385	TiledPageScale 1
5386	ShowPageBoundaries off
5387	ZoomFactor "100"
5388	Block {
5389	BlockType Sum
5390	Name "Add"
5391	SID "178"
5392	Ports [2, 1]
5393	Position [90, 57, 120, 88]
5394	ZOrder -2
5395	InputSameDT off
5396	OutDataTypeStr "Inherit: Inherit via internal rule"
5397	SaturateOnIntegerOverflow off
5398	}
5399	Block {
5400	BlockType Reference
5401	Name "Disregard Subsystem"
5402	SID "179"
5403	Tag "discardX"
5404	Ports []
5405	Position [553, 252, 611, 310]
5406	ShowName off
5407	AttributesFormatString "Disregard Subsystem\\nFor Generation"
5408	LibraryVersion "1.2"
5409	SourceBlock "xbsIndex_r4/Disregard Subsystem"
5410	SourceType "Xilinx Disregard Subsystem For Generation Block"
5411	infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code generatio"
5412	"n. This block can be used in combination with the Simulation Multiplexer block to provide an alternative simulatio"
5413	"n model for another subsystem (e.g., to provide a simulation model for a black box)."
5414	has_advanced_control "0"
5415	sggui_pos "-1,-1,-1,-1"
5416	block_type "disregard"
5417	sg_icon_stat "58,58,-1,-1,darkgray,black,0,07734,right,,[ ],[ ]"
5418	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 0 ],[0 0 58 58 0 ],[0.1 0.1 0.1 ]"
5419	");\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\npatch([11.2 22.76 30.76 38.76 46.76 30.76 19.2 11.2 ],[37.88 37.88 45.88"
5420	" 37.88 45.88 45.88 45.88 37.88 ],[0.33 0.33 0.33 ]);\npatch([19.2 30.76 22.76 11.2 19.2 ],[29.88 29.88 37.88 37.88"
5421	" 29.88 ],[0.261 0.261 0.261 ]);\npatch([11.2 22.76 30.76 19.2 11.2 ],[21.88 21.88 29.88 29.88 21.88 ],[0.33 0.33 0"
5422	".33 ]);\npatch([19.2 46.76 38.76 30.76 22.76 11.2 19.2 ],[13.88 13.88 21.88 13.88 21.88 21.88 13.88 ],[0.261 0.261"
5423	" 0.261 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMEN"
5424	"T: end icon text');"
5425	}
5426	Block {
5427	BlockType DiscretePulseGenerator
5428	Name "Pulse\nGenerator"
5429	SID "180"
5430	Ports [0, 1]
5431	Position [25, 29, 55, 61]
5432	ZOrder -13
5433	Period "1e6"
5434	PulseWidth "2"
5435	PhaseDelay "1.25e4"
5436	}
5437	Block {
5438	BlockType DiscretePulseGenerator
5439	Name "Pulse\nGenerator1"
5440	SID "181"
5441	Ports [0, 1]
5442	Position [25, 99, 55, 131]
5443	ZOrder -13
5444	Period "1e6"
5445	PulseWidth "2"
5446	PhaseDelay "2.5e4"
5447	}
5448	Block {
5449	BlockType Reference
5450	Name "sim_only_reset"
5451	SID "182"
5452	Ports [1, 1]
5453	Position [190, 63, 230, 77]
5454	LibraryVersion "1.2"
5455	SourceBlock "xbsIndex_r4/Gateway In"
5456	SourceType "Xilinx Gateway In Block"
5457	infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilin"
5458	"x fixed-point or floating-point data type.<br><br>Hardware notes: In hardware these blocks become top level input"
5459	" ports."
5460	gui_display_data_type "Fixed-point"
5461	arith_type "Unsigned"
5462	n_bits "1"
5463	bin_pt "0"
5464	preci_type "Single"
5465	exp_width "8"
5466	frac_width "24"
5467	quantization "Round (unbiased: +/- Inf)"
5468	overflow "Saturate"
5469	period "1"
5470	dbl_ovrd off
5471	timing_constraint "None"
5472	locs_specified off
5473	LOCs "{}"
5474	UseAsADC off
5475	ADCChannel "'1'"
5476	xl_use_area off
5477	xl_area "[0,0,0,0,0,0,0]"
5478	inherit_from_input off
5479	hdl_port "on"
5480	has_advanced_control "0"
5481	sggui_pos "-1,-1,-1,-1"
5482	block_type "gatewayin"
5483	sg_icon_stat "40,14,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]"
5484	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93 0.6"
5485	"5 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 1"
5486	"1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],"
5487	"[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.5"
5488	"5 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\nfprintf('','"
5489	"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fon"
5490	"tsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon t"
5491	"ext');"
5492	}
5493	Block {
5494	BlockType Outport
5495	Name "Out1"
5496	SID "183"
5497	Position [255, 63, 285, 77]
5498	IconDisplay "Port number"
5499	}
5500	Line {
5501	SrcBlock "Add"
5502	SrcPort 1
5503	Points [5, 0; 0, -5]
5504	DstBlock "sim_only_reset"
5505	DstPort 1
5506	}
5507	Line {
5508	SrcBlock "Pulse\nGenerator1"
5509	SrcPort 1
5510	Points [10, 0; 0, -35]
5511	DstBlock "Add"
5512	DstPort 2
5513	}
5514	Line {
5515	SrcBlock "Pulse\nGenerator"
5516	SrcPort 1
5517	Points [10, 0; 0, 20]
5518	DstBlock "Add"
5519	DstPort 1
5520	}
5521	Line {
5522	SrcBlock "sim_only_reset"
5523	SrcPort 1
5524	DstBlock "Out1"
5525	DstPort 1
5526	}
5527	}
5528	}
5529	Block {
5530	BlockType Reference
5531	Name "b[0]"
5532	SID "184"
5533	Ports [1, 1]
5534	Position [135, 83, 175, 97]
5535	LibraryVersion "1.2"
5536	SourceBlock "xbsIndex_r4/Slice"
5537	SourceType "Xilinx Bit Slice Extractor Block"
5538	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp"
5539	"ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
5540	"><br>Hardware notes: In hardware this block costs nothing."
5541	nbits "1"
5542	boolean_output on
5543	mode "Lower Bit Location + Width"
5544	bit1 "0"
5545	base1 "MSB of Input"
5546	bit0 "0"
5547	base0 "LSB of Input"
5548	dbl_ovrd off
5549	has_advanced_control "0"
5550	sggui_pos "20,20,449,398"
5551	block_type "slice"
5552	block_version "VER_STRING_GOES_HERE"
5553	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5554	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0"
5555	".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9"
5556	".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22"
5557	" 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
5558	"]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
5559	"3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
5560	"t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
5561	}
5562	Block {
5563	BlockType Reference
5564	Name "b[1] "
5565	SID "189"
5566	Ports [1, 1]
5567	Position [135, 123, 175, 137]
5568	LibraryVersion "1.2"
5569	SourceBlock "xbsIndex_r4/Slice"
5570	SourceType "Xilinx Bit Slice Extractor Block"
5571	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp"
5572	"ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
5573	"><br>Hardware notes: In hardware this block costs nothing."
5574	nbits "1"
5575	boolean_output on
5576	mode "Lower Bit Location + Width"
5577	bit1 "0"
5578	base1 "MSB of Input"
5579	bit0 "1"
5580	base0 "LSB of Input"
5581	dbl_ovrd off
5582	has_advanced_control "0"
5583	sggui_pos "20,20,449,398"
5584	block_type "slice"
5585	block_version "VER_STRING_GOES_HERE"
5586	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5587	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0"
5588	".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9"
5589	".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22"
5590	" 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
5591	"]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
5592	"3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
5593	"t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
5594	}
5595	Block {
5596	BlockType Reference
5597	Name "b[2]"
5598	SID "190"
5599	Ports [1, 1]
5600	Position [135, 163, 175, 177]
5601	LibraryVersion "1.2"
5602	SourceBlock "xbsIndex_r4/Slice"
5603	SourceType "Xilinx Bit Slice Extractor Block"
5604	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp"
5605	"ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
5606	"><br>Hardware notes: In hardware this block costs nothing."
5607	nbits "1"
5608	boolean_output on
5609	mode "Lower Bit Location + Width"
5610	bit1 "0"
5611	base1 "MSB of Input"
5612	bit0 "2"
5613	base0 "LSB of Input"
5614	dbl_ovrd off
5615	has_advanced_control "0"
5616	sggui_pos "20,20,449,398"
5617	block_type "slice"
5618	block_version "VER_STRING_GOES_HERE"
5619	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5620	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0"
5621	".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9"
5622	".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22"
5623	" 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
5624	"]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
5625	"3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
5626	"t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
5627	}
5628	Block {
5629	BlockType Reference
5630	Name "b[3]"
5631	SID "191"
5632	Ports [1, 1]
5633	Position [135, 203, 175, 217]
5634	LibraryVersion "1.2"
5635	SourceBlock "xbsIndex_r4/Slice"
5636	SourceType "Xilinx Bit Slice Extractor Block"
5637	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp"
5638	"ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
5639	"><br>Hardware notes: In hardware this block costs nothing."
5640	nbits "1"
5641	boolean_output on
5642	mode "Lower Bit Location + Width"
5643	bit1 "0"
5644	base1 "MSB of Input"
5645	bit0 "3"
5646	base0 "LSB of Input"
5647	dbl_ovrd off
5648	has_advanced_control "0"
5649	sggui_pos "20,20,449,398"
5650	block_type "slice"
5651	block_version "VER_STRING_GOES_HERE"
5652	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5653	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0"
5654	".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9"
5655	".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22"
5656	" 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
5657	"]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
5658	"3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
5659	"t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
5660	}
5661	Block {
5662	BlockType Reference
5663	Name "b[4]"
5664	SID "192"
5665	Ports [1, 1]
5666	Position [135, 263, 175, 277]
5667	LibraryVersion "1.2"
5668	SourceBlock "xbsIndex_r4/Slice"
5669	SourceType "Xilinx Bit Slice Extractor Block"
5670	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp"
5671	"ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
5672	"><br>Hardware notes: In hardware this block costs nothing."
5673	nbits "1"
5674	boolean_output on
5675	mode "Lower Bit Location + Width"
5676	bit1 "0"
5677	base1 "MSB of Input"
5678	bit0 "4"
5679	base0 "LSB of Input"
5680	dbl_ovrd off
5681	has_advanced_control "0"
5682	sggui_pos "20,20,449,398"
5683	block_type "slice"
5684	block_version "VER_STRING_GOES_HERE"
5685	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5686	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0"
5687	".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9"
5688	".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22"
5689	" 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
5690	"]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
5691	"3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
5692	"t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
5693	}
5694	Block {
5695	BlockType Reference
5696	Name "b[5]"
5697	SID "193"
5698	Ports [1, 1]
5699	Position [135, 303, 175, 317]
5700	LibraryVersion "1.2"
5701	SourceBlock "xbsIndex_r4/Slice"
5702	SourceType "Xilinx Bit Slice Extractor Block"
5703	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp"
5704	"ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
5705	"><br>Hardware notes: In hardware this block costs nothing."
5706	nbits "1"
5707	boolean_output on
5708	mode "Lower Bit Location + Width"
5709	bit1 "0"
5710	base1 "MSB of Input"
5711	bit0 "5"
5712	base0 "LSB of Input"
5713	dbl_ovrd off
5714	has_advanced_control "0"
5715	sggui_pos "20,20,449,398"
5716	block_type "slice"
5717	block_version "VER_STRING_GOES_HERE"
5718	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5719	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0"
5720	".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9"
5721	".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22"
5722	" 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
5723	"]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
5724	"3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
5725	"t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
5726	}
5727	Block {
5728	BlockType Reference
5729	Name "b[6]"
5730	SID "194"
5731	Ports [1, 1]
5732	Position [135, 343, 175, 357]
5733	LibraryVersion "1.2"
5734	SourceBlock "xbsIndex_r4/Slice"
5735	SourceType "Xilinx Bit Slice Extractor Block"
5736	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp"
5737	"ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
5738	"><br>Hardware notes: In hardware this block costs nothing."
5739	nbits "1"
5740	boolean_output on
5741	mode "Lower Bit Location + Width"
5742	bit1 "0"
5743	base1 "MSB of Input"
5744	bit0 "6"
5745	base0 "LSB of Input"
5746	dbl_ovrd off
5747	has_advanced_control "0"
5748	sggui_pos "20,20,449,398"
5749	block_type "slice"
5750	block_version "VER_STRING_GOES_HERE"
5751	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5752	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0"
5753	".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9"
5754	".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22"
5755	" 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
5756	"]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
5757	"3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
5758	"t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
5759	}
5760	Block {
5761	BlockType Reference
5762	Name "b[7]"
5763	SID "195"
5764	Ports [1, 1]
5765	Position [135, 383, 175, 397]
5766	LibraryVersion "1.2"
5767	SourceBlock "xbsIndex_r4/Slice"
5768	SourceType "Xilinx Bit Slice Extractor Block"
5769	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp"
5770	"ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<br"
5771	"><br>Hardware notes: In hardware this block costs nothing."
5772	nbits "1"
5773	boolean_output on
5774	mode "Lower Bit Location + Width"
5775	bit1 "0"
5776	base1 "MSB of Input"
5777	bit0 "7"
5778	base0 "LSB of Input"
5779	dbl_ovrd off
5780	has_advanced_control "0"
5781	sggui_pos "20,20,449,398"
5782	block_type "slice"
5783	block_version "VER_STRING_GOES_HERE"
5784	sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]"
5785	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0"
5786	".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9"
5787	".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22"
5788	" 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 "
5789	"]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97"
5790	"3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por"
5791	"t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');"
5792	}
5793	Line {
5794	SrcBlock "b[1] "
5795	SrcPort 1
5796	DstBlock "Goto14"
5797	DstPort 1
5798	}
5799	Line {
5800	SrcBlock "32b"
5801	SrcPort 1
5802	Points [40, 0]
5803	Branch {
5804	Points [0, 40]
5805	Branch {
5806	Points [0, 40]
5807	Branch {
5808	Points [0, 40]
5809	Branch {
5810	Points [0, 60]
5811	Branch {
5812	Points [0, 40]
5813	Branch {
5814	Points [0, 40]
5815	Branch {
5816	DstBlock "b[6]"
5817	DstPort 1
5818	}
5819	Branch {
5820	Points [0, 40]
5821	DstBlock "b[7]"
5822	DstPort 1
5823	}
5824	}
5825	Branch {
5826	DstBlock "b[5]"
5827	DstPort 1
5828	}
5829	}
5830	Branch {
5831	DstBlock "b[4]"
5832	DstPort 1
5833	}
5834	}
5835	Branch {
5836	DstBlock "b[3]"
5837	DstPort 1
5838	}
5839	}
5840	Branch {
5841	DstBlock "b[2]"
5842	DstPort 1
5843	}
5844	}
5845	Branch {
5846	DstBlock "b[1] "
5847	DstPort 1
5848	}
5849	}
5850	Branch {
5851	DstBlock "b[0]"
5852	DstPort 1
5853	}
5854	}
5855	Line {
5856	SrcBlock "b[0]"
5857	SrcPort 1
5858	DstBlock "Goto1"
5859	DstPort 1
5860	}
5861	}
5862	}
5863	Block {
5864	BlockType From
5865	Name "From"
5866	SID "47"
5867	Position [665, 112, 860, 128]
5868	ZOrder -9
5869	ShowName off
5870	GotoTag "MAC_TIME_USEC"
5871	TagVisibility "global"
5872	}
5873	Block {
5874	BlockType Reference
5875	Name "From Register1"
5876	SID "198"
5877	Ports [0, 1]
5878	Position [175, 125, 215, 155]
5879	AttributesFormatString "<< %<shared_memory_name> >>"
5880	LibraryVersion "1.2"
5881	SourceBlock "xbsIndex_r4/From Register"
5882	SourceType "Xilinx Shared Memory Based From Register Block"
5883	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5884	shared_memory_name "'Control'"
5885	init "0"
5886	period "1"
5887	ownership "Locally owned and initialized"
5888	gui_display_data_type "Fixed-point"
5889	arith_type "Unsigned"
5890	n_bits "32"
5891	bin_pt "0"
5892	preci_type "Single"
5893	dbl_ovrd off
5894	xl_use_area off
5895	xl_area "[0,0,0,0,0,0,0]"
5896	has_advanced_control "0"
5897	sggui_pos "-1,-1,-1,-1"
5898	block_type "fromreg"
5899	sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
5900	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
5901	" ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4"
5902	"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
5903	"[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15."
5904	"1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
5905	"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
5906	");\nfprintf('','COMMENT: end icon text');"
5907	}
5908	Block {
5909	BlockType Reference
5910	Name "From Register2"
5911	SID "49"
5912	Ports [0, 1]
5913	Position [175, 195, 215, 225]
5914	AttributesFormatString "<< %<shared_memory_name> >>"
5915	LibraryVersion "1.2"
5916	SourceBlock "xbsIndex_r4/From Register"
5917	SourceType "Xilinx Shared Memory Based From Register Block"
5918	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5919	shared_memory_name "'NEW_MAC_TIME_LSB'"
5920	init "0"
5921	period "1"
5922	ownership "Locally owned and initialized"
5923	gui_display_data_type "Fixed-point"
5924	arith_type "Unsigned"
5925	n_bits "32"
5926	bin_pt "0"
5927	preci_type "Single"
5928	dbl_ovrd off
5929	xl_use_area off
5930	xl_area "[0,0,0,0,0,0,0]"
5931	has_advanced_control "0"
5932	sggui_pos "-1,-1,-1,-1"
5933	block_type "fromreg"
5934	sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
5935	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
5936	" ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4"
5937	"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
5938	"[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15."
5939	"1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
5940	"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
5941	");\nfprintf('','COMMENT: end icon text');"
5942	}
5943	Block {
5944	BlockType Reference
5945	Name "From Register3"
5946	SID "48"
5947	Ports [0, 1]
5948	Position [175, 265, 215, 295]
5949	AttributesFormatString "<< %<shared_memory_name> >>"
5950	LibraryVersion "1.2"
5951	SourceBlock "xbsIndex_r4/From Register"
5952	SourceType "Xilinx Shared Memory Based From Register Block"
5953	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5954	shared_memory_name "'NEW_MAC_TIME_MSB'"
5955	init "0"
5956	period "1"
5957	ownership "Locally owned and initialized"
5958	gui_display_data_type "Fixed-point"
5959	arith_type "Unsigned"
5960	n_bits "32"
5961	bin_pt "0"
5962	preci_type "Single"
5963	dbl_ovrd off
5964	xl_use_area off
5965	xl_area "[0,0,0,0,0,0,0]"
5966	has_advanced_control "0"
5967	sggui_pos "-1,-1,-1,-1"
5968	block_type "fromreg"
5969	sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]"
5970	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91"
5971	" ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4"
5972	"4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ],"
5973	"[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15."
5974	"1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','"
5975	"COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'"
5976	");\nfprintf('','COMMENT: end icon text');"
5977	}
5978	Block {
5979	BlockType From
5980	Name "From1"
5981	SID "147"
5982	Position [665, 327, 860, 343]
5983	ZOrder -9
5984	ShowName off
5985	GotoTag "SYSTEM_TIME_USEC"
5986	TagVisibility "global"
5987	}
5988	Block {
5989	BlockType Goto
5990	Name "Goto17"
5991	SID "56"
5992	Position [395, 201, 595, 219]
5993	ZOrder -10
5994	ShowName off
5995	GotoTag "reg_New_MAC_Time_LSB"
5996	TagVisibility "global"
5997	}
5998	Block {
5999	BlockType Goto
6000	Name "Goto4"
6001	SID "58"
6002	Position [395, 271, 595, 289]
6003	ZOrder -10
6004	ShowName off
6005	GotoTag "reg_New_MAC_Time_MSB"
6006	TagVisibility "global"
6007	}
6008	Block {
6009	BlockType Reference
6010	Name "Register1"
6011	SID "71"
6012	Ports [1, 1]
6013	Position [915, 106, 945, 134]
6014	ShowName off
6015	LibraryVersion "1.2"
6016	SourceBlock "xbsIndex_r4/Register"
6017	SourceType "Xilinx Register Block"
6018	init "0"
6019	rst off
6020	en off
6021	dbl_ovrd off
6022	xl_use_area off
6023	xl_area "[0,0,0,0,0,0,0]"
6024	has_advanced_control "0"
6025	sggui_pos "-1,-1,-1,-1"
6026	block_type "register"
6027	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
6028	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
6029	" ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 "
6030	"18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
6031	"931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23."
6032	"88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
6033	"T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
6034	"'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
6035	"text');"
6036	}
6037	Block {
6038	BlockType Reference
6039	Name "Register2"
6040	SID "148"
6041	Ports [1, 1]
6042	Position [915, 321, 945, 349]
6043	ShowName off
6044	LibraryVersion "1.2"
6045	SourceBlock "xbsIndex_r4/Register"
6046	SourceType "Xilinx Register Block"
6047	init "0"
6048	rst off
6049	en off
6050	dbl_ovrd off
6051	xl_use_area off
6052	xl_area "[0,0,0,0,0,0,0]"
6053	has_advanced_control "0"
6054	sggui_pos "-1,-1,-1,-1"
6055	block_type "register"
6056	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
6057	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
6058	" ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 "
6059	"18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
6060	"931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23."
6061	"88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
6062	"T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
6063	"'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
6064	"text');"
6065	}
6066	Block {
6067	BlockType Reference
6068	Name "Register27"
6069	SID "76"
6070	Ports [1, 1]
6071	Position [290, 266, 320, 294]
6072	ShowName off
6073	LibraryVersion "1.2"
6074	SourceBlock "xbsIndex_r4/Register"
6075	SourceType "Xilinx Register Block"
6076	init "0"
6077	rst off
6078	en off
6079	dbl_ovrd off
6080	xl_use_area off
6081	xl_area "[0,0,0,0,0,0,0]"
6082	has_advanced_control "0"
6083	sggui_pos "-1,-1,-1,-1"
6084	block_type "register"
6085	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
6086	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
6087	" ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 "
6088	"18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
6089	"931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23."
6090	"88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
6091	"T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
6092	"'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
6093	"text');"
6094	}
6095	Block {
6096	BlockType Reference
6097	Name "Register28"
6098	SID "77"
6099	Ports [1, 1]
6100	Position [290, 196, 320, 224]
6101	ShowName off
6102	LibraryVersion "1.2"
6103	SourceBlock "xbsIndex_r4/Register"
6104	SourceType "Xilinx Register Block"
6105	init "0"
6106	rst off
6107	en off
6108	dbl_ovrd off
6109	xl_use_area off
6110	xl_area "[0,0,0,0,0,0,0]"
6111	has_advanced_control "0"
6112	sggui_pos "-1,-1,-1,-1"
6113	block_type "register"
6114	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
6115	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
6116	" ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 "
6117	"18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
6118	"931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23."
6119	"88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
6120	"T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
6121	"'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
6122	"text');"
6123	}
6124	Block {
6125	BlockType Reference
6126	Name "Register36"
6127	SID "199"
6128	Ports [1, 1]
6129	Position [290, 126, 320, 154]
6130	ShowName off
6131	LibraryVersion "1.2"
6132	SourceBlock "xbsIndex_r4/Register"
6133	SourceType "Xilinx Register Block"
6134	init "0"
6135	rst off
6136	en off
6137	dbl_ovrd off
6138	xl_use_area off
6139	xl_area "[0,0,0,0,0,0,0]"
6140	has_advanced_control "0"
6141	sggui_pos "-1,-1,-1,-1"
6142	block_type "register"
6143	sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]"
6144	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91"
6145	" ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 "
6146	"18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0."
6147	"931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23."
6148	"88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN"
6149	"T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor("
6150	"'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon "
6151	"text');"
6152	}
6153	Block {
6154	BlockType Terminator
6155	Name "Terminator1"
6156	SID "150"
6157	Position [1245, 345, 1255, 355]
6158	ShowName off
6159	}
6160	Block {
6161	BlockType Terminator
6162	Name "Terminator2"
6163	SID "89"
6164	Position [1245, 130, 1255, 140]
6165	ShowName off
6166	}
6167	Block {
6168	BlockType Terminator
6169	Name "Terminator3"
6170	SID "90"
6171	Position [1245, 225, 1255, 235]
6172	ShowName off
6173	}
6174	Block {
6175	BlockType Terminator
6176	Name "Terminator4"
6177	SID "151"
6178	Position [1245, 440, 1255, 450]
6179	ShowName off
6180	}
6181	Block {
6182	BlockType Reference
6183	Name "To Register1"
6184	SID "95"
6185	Ports [2, 1]
6186	Position [1170, 107, 1230, 163]
6187	AttributesFormatString "<< %<shared_memory_name> >>"
6188	LibraryVersion "1.2"
6189	SourceBlock "xbsIndex_r4/To Register"
6190	SourceType "Xilinx Shared Memory Based To Register Block"
6191	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
6192	shared_memory_name "'MAC_TIME_USEC_LSB'"
6193	init "0"
6194	ownership "Locally owned and initialized"
6195	explicit_data_type on
6196	gui_display_data_type "Fixed-point"
6197	arith_type "Unsigned"
6198	n_bits "32"
6199	bin_pt "0"
6200	preci_type "Single"
6201	dbl_ovrd off
6202	xl_use_area off
6203	xl_area "[0,0,0,0,0,0,0]"
6204	has_advanced_control "0"
6205	sggui_pos "-1,-1,-1,-1"
6206	block_type "toreg"
6207	sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
6208	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
6209	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
6210	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
6211	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
6212	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
6213	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
6214	"n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
6215	"T: end icon text');"
6216	}
6217	Block {
6218	BlockType Reference
6219	Name "To Register2"
6220	SID "96"
6221	Ports [2, 1]
6222	Position [1170, 202, 1230, 258]
6223	AttributesFormatString "<< %<shared_memory_name> >>"
6224	LibraryVersion "1.2"
6225	SourceBlock "xbsIndex_r4/To Register"
6226	SourceType "Xilinx Shared Memory Based To Register Block"
6227	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
6228	shared_memory_name "'MAC_TIME_USEC_MSB'"
6229	init "0"
6230	ownership "Locally owned and initialized"
6231	explicit_data_type on
6232	gui_display_data_type "Fixed-point"
6233	arith_type "Unsigned"
6234	n_bits "32"
6235	bin_pt "0"
6236	preci_type "Single"
6237	dbl_ovrd off
6238	xl_use_area off
6239	xl_area "[0,0,0,0,0,0,0]"
6240	has_advanced_control "0"
6241	sggui_pos "-1,-1,-1,-1"
6242	block_type "toreg"
6243	sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
6244	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
6245	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
6246	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
6247	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
6248	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
6249	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
6250	"n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
6251	"T: end icon text');"
6252	}
6253	Block {
6254	BlockType Reference
6255	Name "To Register3"
6256	SID "152"
6257	Ports [2, 1]
6258	Position [1170, 322, 1230, 378]
6259	AttributesFormatString "<< %<shared_memory_name> >>"
6260	LibraryVersion "1.2"
6261	SourceBlock "xbsIndex_r4/To Register"
6262	SourceType "Xilinx Shared Memory Based To Register Block"
6263	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
6264	shared_memory_name "'SYSTEM_TIME_USEC_LSB'"
6265	init "0"
6266	ownership "Locally owned and initialized"
6267	explicit_data_type on
6268	gui_display_data_type "Fixed-point"
6269	arith_type "Unsigned"
6270	n_bits "32"
6271	bin_pt "0"
6272	preci_type "Single"
6273	dbl_ovrd off
6274	xl_use_area off
6275	xl_area "[0,0,0,0,0,0,0]"
6276	has_advanced_control "0"
6277	sggui_pos "-1,-1,-1,-1"
6278	block_type "toreg"
6279	sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
6280	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
6281	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
6282	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
6283	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
6284	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
6285	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
6286	"n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
6287	"T: end icon text');"
6288	}
6289	Block {
6290	BlockType Reference
6291	Name "To Register4"
6292	SID "153"
6293	Ports [2, 1]
6294	Position [1170, 417, 1230, 473]
6295	AttributesFormatString "<< %<shared_memory_name> >>"
6296	LibraryVersion "1.2"
6297	SourceBlock "xbsIndex_r4/To Register"
6298	SourceType "Xilinx Shared Memory Based To Register Block"
6299	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
6300	shared_memory_name "'SYSTEM_TIME_USEC_MSB'"
6301	init "0"
6302	ownership "Locally owned and initialized"
6303	explicit_data_type on
6304	gui_display_data_type "Fixed-point"
6305	arith_type "Unsigned"
6306	n_bits "32"
6307	bin_pt "0"
6308	preci_type "Single"
6309	dbl_ovrd off
6310	xl_use_area off
6311	xl_area "[0,0,0,0,0,0,0]"
6312	has_advanced_control "0"
6313	sggui_pos "-1,-1,-1,-1"
6314	block_type "toreg"
6315	sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]"
6316	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
6317	" ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8"
6318	"8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ],"
6319	"[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20."
6320	"2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf("
6321	"'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di"
6322	"n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN"
6323	"T: end icon text');"
6324	}
6325	Line {
6326	SrcBlock "32LSB"
6327	SrcPort 1
6328	DstBlock "To Register1"
6329	DstPort 1
6330	}
6331	Line {
6332	SrcBlock "Constant5"
6333	SrcPort 1
6334	DstBlock "To Register1"
6335	DstPort 2
6336	}
6337	Line {
6338	SrcBlock "32MSB"
6339	SrcPort 1
6340	DstBlock "To Register2"
6341	DstPort 1
6342	}
6343	Line {
6344	SrcBlock "Constant6"
6345	SrcPort 1
6346	DstBlock "To Register2"
6347	DstPort 2
6348	}
6349	Line {
6350	SrcBlock "From"
6351	SrcPort 1
6352	DstBlock "Register1"
6353	DstPort 1
6354	}
6355	Line {
6356	SrcBlock "Register1"
6357	SrcPort 1
6358	Points [30, 0]
6359	Branch {
6360	DstBlock "32LSB"
6361	DstPort 1
6362	}
6363	Branch {
6364	Points [0, 95]
6365	DstBlock "32MSB"
6366	DstPort 1
6367	}
6368	}
6369	Line {
6370	SrcBlock "To Register1"
6371	SrcPort 1
6372	DstBlock "Terminator2"
6373	DstPort 1
6374	}
6375	Line {
6376	SrcBlock "To Register2"
6377	SrcPort 1
6378	DstBlock "Terminator3"
6379	DstPort 1
6380	}
6381	Line {
6382	SrcBlock "From Register2"
6383	SrcPort 1
6384	DstBlock "Register28"
6385	DstPort 1
6386	}
6387	Line {
6388	SrcBlock "From Register3"
6389	SrcPort 1
6390	DstBlock "Register27"
6391	DstPort 1
6392	}
6393	Line {
6394	SrcBlock "Register27"
6395	SrcPort 1
6396	DstBlock "Goto4"
6397	DstPort 1
6398	}
6399	Line {
6400	SrcBlock "Register28"
6401	SrcPort 1
6402	DstBlock "Goto17"
6403	DstPort 1
6404	}
6405	Line {
6406	SrcBlock "32LSB1"
6407	SrcPort 1
6408	DstBlock "To Register3"
6409	DstPort 1
6410	}
6411	Line {
6412	SrcBlock "Constant1"
6413	SrcPort 1
6414	DstBlock "To Register3"
6415	DstPort 2
6416	}
6417	Line {
6418	SrcBlock "32MSB1"
6419	SrcPort 1
6420	DstBlock "To Register4"
6421	DstPort 1
6422	}
6423	Line {
6424	SrcBlock "Constant2"
6425	SrcPort 1
6426	DstBlock "To Register4"
6427	DstPort 2
6428	}
6429	Line {
6430	SrcBlock "From1"
6431	SrcPort 1
6432	DstBlock "Register2"
6433	DstPort 1
6434	}
6435	Line {
6436	SrcBlock "Register2"
6437	SrcPort 1
6438	Points [30, 0]
6439	Branch {
6440	Points [0, 95]
6441	DstBlock "32MSB1"
6442	DstPort 1
6443	}
6444	Branch {
6445	DstBlock "32LSB1"
6446	DstPort 1
6447	}
6448	}
6449	Line {
6450	SrcBlock "To Register3"
6451	SrcPort 1
6452	DstBlock "Terminator1"
6453	DstPort 1
6454	}
6455	Line {
6456	SrcBlock "To Register4"
6457	SrcPort 1
6458	DstBlock "Terminator4"
6459	DstPort 1
6460	}
6461	Line {
6462	SrcBlock "From Register1"
6463	SrcPort 1
6464	DstBlock "Register36"
6465	DstPort 1
6466	}
6467	Line {
6468	SrcBlock "Register36"
6469	SrcPort 1
6470	DstBlock "Ctrl Bits"
6471	DstPort 1
6472	}
6473	}
6474	}
6475	Block {
6476	BlockType Reference
6477	Name "SYSTEM_TIME_LSB"
6478	SID "134"
6479	Ports [1, 1]
6480	Position [1055, 510, 1115, 530]
6481	LibraryVersion "1.2"
6482	SourceBlock "xbsIndex_r4/Gateway Out"
6483	SourceType "Xilinx Gateway Out Block"
6484	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty"
6485	"pe Simulink integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top"
6486	" level output ports or are discarded, depending on how they are configured."
6487	inherit_from_input off
6488	hdl_port on
6489	timing_constraint "None"
6490	locs_specified off
6491	LOCs "{}"
6492	UseAsDAC off
6493	DACChannel "'1'"
6494	xl_use_area off
6495	xl_area "[0,0,0,0,0,0,0]"
6496	has_advanced_control "0"
6497	sggui_pos "-1,-1,-1,-1"
6498	block_type "gatewayout"
6499	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
6500	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0."
6501	"93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12."
6502	"22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1"
6503	"2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],"
6504	"[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97"
6505	"9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
6506	"port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf"
6507	"printf('','COMMENT: end icon text');"
6508	}
6509	Block {
6510	BlockType Reference
6511	Name "SYSTEM_TIME_MSB"
6512	SID "135"
6513	Ports [1, 1]
6514	Position [1055, 550, 1115, 570]
6515	LibraryVersion "1.2"
6516	SourceBlock "xbsIndex_r4/Gateway Out"
6517	SourceType "Xilinx Gateway Out Block"
6518	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty"
6519	"pe Simulink integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top"
6520	" level output ports or are discarded, depending on how they are configured."
6521	inherit_from_input off
6522	hdl_port on
6523	timing_constraint "None"
6524	locs_specified off
6525	LOCs "{}"
6526	UseAsDAC off
6527	DACChannel "'1'"
6528	xl_use_area off
6529	xl_area "[0,0,0,0,0,0,0]"
6530	has_advanced_control "0"
6531	sggui_pos "-1,-1,-1,-1"
6532	block_type "gatewayout"
6533	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
6534	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0."
6535	"93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12."
6536	"22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1"
6537	"2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],"
6538	"[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97"
6539	"9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
6540	"port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf"
6541	"printf('','COMMENT: end icon text');"
6542	}
6543	Block {
6544	BlockType Scope
6545	Name "Scope"
6546	SID "220"
6547	Ports [3]
6548	Position [1245, 401, 1280, 519]
6549	ZOrder -16
6550	Floating off
6551	Location [14, 559, 672, 1553]
6552	Open off
6553	NumInputPorts "3"
6554	ZoomMode "xonly"
6555	List {
6556	ListType AxesTitles
6557	axes1 "%<SignalLabel>"
6558	axes2 "%<SignalLabel>"
6559	axes3 "%<SignalLabel>"
6560	}
6561	List {
6562	ListType ScopeGraphics
6563	FigureColor "[0.5 0.5 0.5]"
6564	AxesColor "[0 0 0]"
6565	AxesTickColor "[1 1 1]"
6566	LineColors "[1 1 0;1 0 1;0 1 1;1 0 0;0 1 0;0 0 1]"
6567	LineStyles "-\|-\|-\|-\|-\|-"
6568	LineWidths "[0.5 0.5 0.5 0.5 0.5 0.5]"
6569	MarkerStyles "none\|none\|none\|none\|none\|none"
6570	}
6571	YMin "-5~-5~-5"
6572	YMax "5~5~5"
6573	SaveName "ScopeData2"
6574	DataFormat "StructureWithTime"
6575	SampleTime "0"
6576	MaskIconFrame on
6577	MaskIconOpaque on
6578	MaskIconRotate "none"
6579	MaskPortRotate "default"
6580	MaskIconUnits "autoscale"
6581	}
6582	Block {
6583	BlockType Reference
6584	Name "System Time\n64-bit Counter"
6585	SID "11"
6586	Ports [2, 1]
6587	Position [650, 70, 710, 125]
6588	NamePlacement "alternate"
6589	LibraryVersion "1.2"
6590	SourceBlock "xbsIndex_r4/Counter"
6591	SourceType "Xilinx Counter Block"
6592	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited cou"
6593	"nter is implemented by combining a counter with a comparator."
6594	cnt_type "Free Running"
6595	cnt_to "Inf"
6596	operation "Up"
6597	start_count "0"
6598	cnt_by_val "1"
6599	arith_type "Unsigned"
6600	n_bits "64"
6601	bin_pt "0"
6602	load_pin off
6603	rst on
6604	en on
6605	explicit_period "off"
6606	period "1"
6607	dbl_ovrd off
6608	use_behavioral_HDL off
6609	implementation "Fabric"
6610	xl_use_area off
6611	xl_area "[0,0,0,0,0,0,0]"
6612	has_advanced_control "0"
6613	sggui_pos "-1,-1,-1,-1"
6614	block_type "counter"
6615	sg_icon_stat "60,55,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]"
6616	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 55 55 0 ],[0.77 0."
6617	"82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 55 55 0 ]);\npatch([14.425 24.54 31.54 38.54 45.54 31.54 21.425 14.425 ],["
6618	"34.77 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([21.425 31.54 24.54 14.425 21.425 ],[27.77 2"
6619	"7.77 34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([14.425 24.54 31.54 21.425 14.425 ],[20.77 20.77 27.77 27"
6620	".77 20.77 ],[1 1 1 ]);\npatch([21.425 45.54 38.54 31.54 24.54 14.425 21.425 ],[13.77 13.77 20.77 13.77 20.77 20."
6621	"77 13.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
6622	"xt');\ncolor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black')"
6623	";disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');"
6624	}
6625	Block {
6626	BlockType Reference
6627	Name "TIME_USEC_FRAC"
6628	SID "217"
6629	Ports [1, 1]
6630	Position [1055, 635, 1115, 655]
6631	LibraryVersion "1.2"
6632	SourceBlock "xbsIndex_r4/Gateway Out"
6633	SourceType "Xilinx Gateway Out Block"
6634	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty"
6635	"pe Simulink integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top"
6636	" level output ports or are discarded, depending on how they are configured."
6637	inherit_from_input off
6638	hdl_port on
6639	timing_constraint "None"
6640	locs_specified off
6641	LOCs "{}"
6642	UseAsDAC off
6643	DACChannel "'1'"
6644	xl_use_area off
6645	xl_area "[0,0,0,0,0,0,0]"
6646	has_advanced_control "0"
6647	sggui_pos "-1,-1,-1,-1"
6648	block_type "gatewayout"
6649	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
6650	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0."
6651	"93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12."
6652	"22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1"
6653	"2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],"
6654	"[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97"
6655	"9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
6656	"port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf"
6657	"printf('','COMMENT: end icon text');"
6658	}
6659	Block {
6660	BlockType Reference
6661	Name "USEC_PULSE"
6662	SID "211"
6663	Ports [1, 1]
6664	Position [1055, 335, 1115, 355]
6665	LibraryVersion "1.2"
6666	SourceBlock "xbsIndex_r4/Gateway Out"
6667	SourceType "Xilinx Gateway Out Block"
6668	infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of ty"
6669	"pe Simulink integer, single, double, or fixed-point.<br><br>Hardware notes: In hardware these blocks become top"
6670	" level output ports or are discarded, depending on how they are configured."
6671	inherit_from_input off
6672	hdl_port on
6673	timing_constraint "None"
6674	locs_specified off
6675	LOCs "{}"
6676	UseAsDAC off
6677	DACChannel "'1'"
6678	xl_use_area off
6679	xl_area "[0,0,0,0,0,0,0]"
6680	has_advanced_control "0"
6681	sggui_pos "-1,-1,-1,-1"
6682	block_type "gatewayout"
6683	sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]"
6684	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0."
6685	"93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12."
6686	"22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 1"
6687	"2.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],"
6688	"[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.97"
6689	"9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
6690	"port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nf"
6691	"printf('','COMMENT: end icon text');"
6692	}
6693	Block {
6694	BlockType SubSystem
6695	Name "usec Pulse"
6696	SID "24"
6697	Ports [0, 2]
6698	Position [370, 100, 470, 140]
6699	MinAlgLoopOccurrences off
6700	PropExecContextOutsideSubsystem off
6701	RTWSystemCode "Auto"
6702	FunctionWithSeparateData off
6703	Opaque off
6704	RequestExecContextInheritance off
6705	MaskHideContents off
6706	System {
6707	Name "usec Pulse"
6708	Location [2, 94, 1918, 1115]
6709	Open off
6710	ModelBrowserVisibility off
6711	ModelBrowserWidth 200
6712	ScreenColor "white"
6713	PaperOrientation "landscape"
6714	PaperPositionMode "auto"
6715	PaperType "usletter"
6716	PaperUnits "inches"
6717	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6718	TiledPageScale 1
6719	ShowPageBoundaries off
6720	ZoomFactor "156"
6721	Block {
6722	BlockType Reference
6723	Name "Clk->usec"
6724	SID "26"
6725	Ports [1, 1]
6726	Position [295, 198, 360, 242]
6727	NamePlacement "alternate"
6728	LibraryVersion "1.2"
6729	SourceBlock "xbsIndex_r4/Counter"
6730	SourceType "Xilinx Counter Block"
6731	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is"
6732	" implemented by combining a counter with a comparator."
6733	cnt_type "Free Running"
6734	cnt_to "159"
6735	operation "Up"
6736	start_count "0"
6737	cnt_by_val "1"
6738	arith_type "Unsigned"
6739	n_bits "8"
6740	bin_pt "0"
6741	load_pin off
6742	rst on
6743	en off
6744	explicit_period "off"
6745	period "1"
6746	dbl_ovrd off
6747	use_behavioral_HDL off
6748	implementation "Fabric"
6749	xl_use_area off
6750	xl_area "[0,0,0,0,0,0,0]"
6751	has_advanced_control "0"
6752	sggui_pos "-1,-1,-1,-1"
6753	block_type "counter"
6754	sg_icon_stat "65,44,1,1,white,blue,0,803eba70,right,,[ ],[ ]"
6755	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.91"
6756	" ]);\nplot([0 65 65 0 0 ],[0 0 44 44 0 ]);\npatch([18.65 27.32 33.32 39.32 45.32 33.32 24.65 18.65 ],[28.66 28.66 3"
6757	"4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([24.65 33.32 27.32 18.65 24.65 ],[22.66 22.66 28.66 28.66 22"
6758	".66 ],[0.931 0.946 0.973 ]);\npatch([18.65 27.32 33.32 24.65 18.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\np"
6759	"atch([24.65 45.32 39.32 33.32 27.32 18.65 24.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ]"
6760	");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('"
6761	"input',1,'rst');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon te"
6762	"xt');"
6763	}
6764	Block {
6765	BlockType Reference
6766	Name "Constant1"
6767	SID "27"
6768	Ports [0, 1]
6769	Position [320, 254, 340, 276]
6770	ShowName off
6771	LibraryVersion "1.2"
6772	SourceBlock "xbsIndex_r4/Constant"
6773	SourceType "Xilinx Constant Block Block"
6774	const "159"
6775	gui_display_data_type "Fixed-point"
6776	arith_type "Unsigned"
6777	n_bits "8"
6778	bin_pt "0"
6779	preci_type "Single"
6780	exp_width "8"
6781	frac_width "24"
6782	explicit_period on
6783	period "1"
6784	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
6785	equ "P=C"
6786	opselect "C"
6787	inp2 "PCIN>>17"
6788	opr "+"
6789	inp1 "P"
6790	carry "CIN"
6791	dbl_ovrd off
6792	has_advanced_control "0"
6793	sggui_pos "-1,-1,-1,-1"
6794	block_type "constant"
6795	block_version "8.2.02"
6796	sg_icon_stat "20,22,0,1,white,blue,0,04b97b88,right,,[ ],[ ]"
6797	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91"
6798	" ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13.22 15.22"
6799	" 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22 11.22 ],[0"
6800	".931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 14.4"
6801	"4 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: e"
6802	"nd icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'159');\nfprintf"
6803	"('','COMMENT: end icon text');"
6804	}
6805	Block {
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6807	Name "Relational"
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6809	Ports [2, 1]
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6813	SourceBlock "xbsIndex_r4/Relational"
6814	SourceType "Xilinx Arithmetic Relational Operator Block"
6815	mode "a=b"
6816	en off
6817	latency "0"
6818	dbl_ovrd off
6819	xl_use_area off
6820	xl_area "[0,0,0,0,0,0,0]"
6821	has_advanced_control "0"
6822	sggui_pos "-1,-1,-1,-1"
6823	block_type "relational"
6824	sg_icon_stat "55,56,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]"
6825	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91"
6826	" ]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[35.77 35.7"
6827	"7 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[28.77 28.77 35.77 35"
6828	".77 28.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[21.77 21.77 28.77 28.77 21.77 ],[1 1"
6829	" 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77 ],[0.931 0"
6830	".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');"
6831	"port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa "
6832	"= b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');"
6833	}
6834	Block {
6835	BlockType Outport
6836	Name "uSec"
6837	SID "30"
6838	Position [530, 228, 560, 242]
6839	IconDisplay "Port number"
6840	}
6841	Block {
6842	BlockType Outport
6843	Name "uSec Fractional Part"
6844	SID "216"
6845	Position [535, 313, 565, 327]
6846	Port "2"
6847	IconDisplay "Port number"
6848	}
6849	Line {
6850	SrcBlock "Clk->usec"
6851	SrcPort 1
6852	Points [15, 0]
6853	Branch {
6854	DstBlock "Relational"
6855	DstPort 1
6856	}
6857	Branch {
6858	Points [0, 100]
6859	DstBlock "uSec Fractional Part"
6860	DstPort 1
6861	}
6862	}
6863	Line {
6864	SrcBlock "Constant1"
6865	SrcPort 1
6866	Points [20, 0; 0, -15]
6867	DstBlock "Relational"
6868	DstPort 2
6869	}
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6871	SrcBlock "Relational"
6872	SrcPort 1
6873	Points [35, 0]
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6877	}
6878	Branch {
6879	Points [0, -75; -275, 0; 0, 60]
6880	DstBlock "Clk->usec"
6881	DstPort 1
6882	}
6883	}
6884	}
6885	}
6886	Line {
6887	SrcBlock "32LSB"
6888	SrcPort 1
6889	DstBlock "Register2"
6890	DstPort 1
6891	}
6892	Line {
6893	SrcBlock "32MSB"
6894	SrcPort 1
6895	DstBlock "Register1"
6896	DstPort 1
6897	}
6898	Line {
6899	SrcBlock "Register"
6900	SrcPort 1
6901	DstBlock "MAC_TIME_MSB"
6902	DstPort 1
6903	}
6904	Line {
6905	SrcBlock "Register1"
6906	SrcPort 1
6907	DstBlock "Register"
6908	DstPort 1
6909	}
6910	Line {
6911	SrcBlock "Register2"
6912	SrcPort 1
6913	DstBlock "Register3"
6914	DstPort 1
6915	}
6916	Line {
6917	SrcBlock "Register3"
6918	SrcPort 1
6919	DstBlock "MAC_TIME_LSB"
6920	DstPort 1
6921	}
6922	Line {
6923	SrcBlock "System Time\n64-bit Counter"
6924	SrcPort 1
6925	DstBlock "Register50"
6926	DstPort 1
6927	}
6928	Line {
6929	SrcBlock "usec Pulse"
6930	SrcPort 1
6931	Points [60, 0]
6932	Branch {
6933	DstBlock "System Time\n64-bit Counter"
6934	DstPort 2
6935	}
6936	Branch {
6937	Points [0, 145]
6938	Branch {
6939	DstBlock "Logical"
6940	DstPort 2
6941	}
6942	Branch {
6943	Points [0, 90]
6944	DstBlock "Register9"
6945	DstPort 1
6946	}
6947	}
6948	}
6949	Line {
6950	SrcBlock "Posedge"
6951	SrcPort 1
6952	Points [135, 0]
6953	Branch {
6954	Points [0, 60]
6955	DstBlock "Logical"
6956	DstPort 1
6957	}
6958	Branch {
6959	DstBlock "MAC Time\n64-bit Counter"
6960	DstPort 1
6961	}
6962	}
6963	Line {
6964	SrcBlock "From5"
6965	SrcPort 1
6966	DstBlock "Posedge"
6967	DstPort 1
6968	}
6969	Line {
6970	SrcBlock "Concat"
6971	SrcPort 1
6972	DstBlock "MAC Time\n64-bit Counter"
6973	DstPort 2
6974	}
6975	Line {
6976	SrcBlock "From1"
6977	SrcPort 1
6978	DstBlock "Concat"
6979	DstPort 1
6980	}
6981	Line {
6982	SrcBlock "From19"
6983	SrcPort 1
6984	DstBlock "Concat"
6985	DstPort 2
6986	}
6987	Line {
6988	SrcBlock "Logical"
6989	SrcPort 1
6990	DstBlock "MAC Time\n64-bit Counter"
6991	DstPort 3
6992	}
6993	Line {
6994	SrcBlock "MAC Time\n64-bit Counter"
6995	SrcPort 1
6996	DstBlock "Register8"
6997	DstPort 1
6998	}
6999	Line {
7000	SrcBlock "From3"
7001	SrcPort 1
7002	Points [35, 0]
7003	Branch {
7004	DstBlock "32LSB"
7005	DstPort 1
7006	}
7007	Branch {
7008	Points [0, 40]
7009	DstBlock "32MSB"
7010	DstPort 1
7011	}
7012	}
7013	Line {
7014	SrcBlock "32LSB1"
7015	SrcPort 1
7016	DstBlock "Register6"
7017	DstPort 1
7018	}
7019	Line {
7020	SrcBlock "32MSB1"
7021	SrcPort 1
7022	DstBlock "Register5"
7023	DstPort 1
7024	}
7025	Line {
7026	SrcBlock "Register4"
7027	SrcPort 1
7028	DstBlock "SYSTEM_TIME_MSB"
7029	DstPort 1
7030	}
7031	Line {
7032	SrcBlock "Register5"
7033	SrcPort 1
7034	DstBlock "Register4"
7035	DstPort 1
7036	}
7037	Line {
7038	SrcBlock "Register6"
7039	SrcPort 1
7040	DstBlock "Register7"
7041	DstPort 1
7042	}
7043	Line {
7044	SrcBlock "Register7"
7045	SrcPort 1
7046	DstBlock "SYSTEM_TIME_LSB"
7047	DstPort 1
7048	}
7049	Line {
7050	SrcBlock "From4"
7051	SrcPort 1
7052	Points [35, 0]
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7055	DstBlock "32MSB1"
7056	DstPort 1
7057	}
7058	Branch {
7059	DstBlock "32LSB1"
7060	DstPort 1
7061	}
7062	}
7063	Line {
7064	SrcBlock "Register50"
7065	SrcPort 1
7066	DstBlock "Goto"
7067	DstPort 1
7068	}
7069	Line {
7070	SrcBlock "Register8"
7071	SrcPort 1
7072	DstBlock "Goto1"
7073	DstPort 1
7074	}
7075	Line {
7076	SrcBlock "From2"
7077	SrcPort 1
7078	DstBlock "System Time\n64-bit Counter"
7079	DstPort 1
7080	}
7081	Line {
7082	SrcBlock "Register9"
7083	SrcPort 1
7084	DstBlock "Register10"
7085	DstPort 1
7086	}
7087	Line {
7088	SrcBlock "Register10"
7089	SrcPort 1
7090	DstBlock "USEC_PULSE"
7091	DstPort 1
7092	}
7093	Line {
7094	SrcBlock "usec Pulse"
7095	SrcPort 2
7096	Points [45, 0; 0, 515]
7097	DstBlock "Register13"
7098	DstPort 1
7099	}
7100	Line {
7101	SrcBlock "Register11"
7102	SrcPort 1
7103	DstBlock "Register12"
7104	DstPort 1
7105	}
7106	Line {
7107	SrcBlock "Register12"
7108	SrcPort 1
7109	DstBlock "TIME_USEC_FRAC"
7110	DstPort 1
7111	}
7112	Line {
7113	SrcBlock "MAC_TIME_LSB"
7114	SrcPort 1
7115	DstBlock "Scope"
7116	DstPort 1
7117	}
7118	Line {
7119	SrcBlock "MAC_TIME_MSB"
7120	SrcPort 1
7121	DstBlock "Scope"
7122	DstPort 2
7123	}
7124	Line {
7125	SrcBlock "TIME_USEC_FRAC"
7126	SrcPort 1
7127	Points [55, 0; 0, -145]
7128	DstBlock "Scope"
7129	DstPort 3
7130	}
7131	Line {
7132	SrcBlock "Register13"
7133	SrcPort 1
7134	DstBlock "Register11"
7135	DstPort 1
7136	}
7137	Annotation {
7138	Name "Copyright (c) 2016 Mango Communications, Inc. All rights reserved.\n\nDistributed under the Mango R"
7139	"eference Design License:\nhttp://mangocomm.com/802.11/license"
7140	Position [257, 516]
7141	DropShadow on
7142	}
7143	Annotation {
7144	Name "Critical that the fractional and integer parts of the timestamps\nhave the same latency. Otherwise "
7145	"consumers will observe a fractional\npart that wraps at a different time than the integer part increments."
7146	Position [956, 698]
7147	}
7148	}
7149	}
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7245	" '5P9&%T95]F8VX 'AL961K<V5T=&EN9W-D871A #@ $@ & "
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7261	"& \" 0 !0 @ $ $ . , 8 ( ! % \" "
7262	" 0 0 X P !@ @ $ 4 ( ! ! #@ # & "
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7268	" % \" $ + 0 0 \"P \"TQ+\"TQ+\"TQ+\"TQ . . 8 ( ! % "
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7279	"S$S-S(U(# N,C$Y-C X(%TI.PIF<')I;G1F\"<G+\"=#3TU-14Y4.B!E;F0@:6-O;B!G<F%P:&EC<R<I.PIF<')I;G1F\"<G+\"=#3TU-14Y4.B!"
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7281	"\" 0 0 X P !@ @ $ 4 ( ! ! #"
7282	"@ # & \" 0 !0 @ $ $ . , 8 ( ! % \""
7283	" $ # 0 0 , ;V9F X P !@ @ $ 4 ( 0 0 ! ! ! !62$1,#@ "
7284	" $ & \" 0 !0 @ ! #0 $ $ T !84U0@1&5F875L=',J #@ $ & \" "
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7286	" @ ! 0 $ \"0 @ X X !@ @ & 4 ( 0 $ ! "
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7288	" & \" 0 !0 @ ! #0 $ $ T !X;&5D:W-E='1I;F=S #@ $ & \" "
7289	"0 !0 @ ! #P $ $ \\ !X;&5D:W!R96-O;7!I;&4 #@ $ & \" 0 !0 "
7290	"@ ! #0 $ $ T !X;&5D:W5P9&%T969N #@ , ' & \" ( !0 @ ! 0 $"
7291	" !0 $ !@ ! . $ &5X<&]R= &5X<&]R=&1I<@ '-E;&5C=&EO;G1A9P "
7292	" &5X<&]R=&1I<G!A=&@ &UA:F]R &UI;F]R &AW7V-"
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7295	" !@ @ & 4 ( 0 $ ! D ( . , 8 ( ! % \""
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7297	"R9V5T7V1I<F5C=&]R>0X P !@ @ $ 4 ( ! ! #@ #@ & \" "
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7299	" $ ! D ( . , 8 ( ! % \" $ ! 0 0 $ 9 "
7300	"X X !@ @ & 4 ( 0 $ ! D ( \\#\\. . 8 ( !@ "
7301	" % \" $ ! 0 ) \" *Y'X7H4KN\\_#@ #@ & \" 8 !0 @ ! 0 "
7302	" $ \"0 @ !90 X X !@ @ & 4 ( 0 $ ! D ( "
7303	" \\#\\. . 8 ( !@ % \" $ ! 0 ) \" #@ %@# & \" "
7304	" ( !0 @ ! 0 $ !0 $ 4 ! \"@ &)I <&]R= . @ $ 8 ( @ "
7305	" % \" $ ! 0 % 0 !0 $ / 8V]L,0!C;VPR &-O;#, X !@ !@ @ ! "
7306	" 4 ( 0 $ ! X P !@ @ $ 4 ( 0 $ ! ! 0 @ #@ &"
7307	" & \" $ !0 @ ! 0 $ #@ # & \" 0 !0 @ ! 0 "
7308	"$ $ ! \" . 8 8 ( 0 % \" $ ! 0 . , 8 ( ! "
7309	" % \" $ ! 0 0 $ ( X \" 0 !@ @ \" 4 ( 0 $ ! "
7310	" 4 ! % 0 \\ !C;VPQ &-O;#( 8V]L,P #@ & & \" $ !0 @ ! 0 $ #@ "
7311	"# & \" 0 !0 @ ! 0 $ $ ! \" . 8 8 ( 0 % \" "
7312	" $ ! 0 . , 8 ( ! % \" $ ! 0 0 $ ( X !@ !@ "
7313	" @ ! 4 ( 0 $ ! X P !@ @ $ 4 ( 0 $ ! ! "
7314	" 0 @ #@ ( T & \" ( !0 @ ! 0 $ !0 $ P ! & '-H87)E9 &-O"
7315	";7!I;&%T:6]N X !@! !@ @ \" 4 ( 0 $ ! 4 ! 3 0 )@ !C;VUP:6QA=&EO;"
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7318	" 0 < ! ! ' =&%R9V5T,@ . P $ 8 ( @ % \" $ ! 0 % "
7319	"0 !P $ . :V5Y<P '9A;'5E<P X # !@ @ ! 4 ( 0 ( ! X ! "
7320	"!@ @ $ 4 ( 0 L ! ! + 2$1,($YE=&QI<W0 X !( !@ @ $ "
7321	" 4 ( 0 !@ ! ! 8 17AP;W)T(&%S(&$@<&-O<F4@=&\\@141+#@ *@ & \" $ !0"
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7323	"Q X X !@ @ $ 4 ( 0 < ! ! ' =&%R9V5T,@ . , 8 ( ! "
7324	" % \" $ ! 0 0 $ ,0 X P !@ @ $ 4 ( 0 , ! !"
7325	" P!O9F8 #@ $@ & \" 0 !0 @ ! %P $ $ !< !%=F5R>7=H97)E(&EN(%-U8E-Y<W1"
7326	"E;0 . 2 8 ( ! % \" $ 8 0 0 & $%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<PX"
7327	" P !@ @ $ 4 ( 0 , ! ! P!O9F8 #@ #@ & \" 0 !0 @ "
7328	" ! !P $ $ < !$969A=6QT X # +P !@ @ \" 4 ( 0 $ ! 4 !"
7329	" ( 0 ! !T87)G970Q '1A<F=E=#( #@ / 2 & \" ( !0 @ ! 0 $ !0 $ !X "
7330	" ! * 4 &EN9F]E9&ET 'AI;&EN>&9A;6EL>0 '!A<G0 "
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7337	";V0 &EN8W)?;F5T;&ES=%]S9V%D=F%N8V5D '1R:6U?=F)I='-?<V=A9'9A;F-E9 &1B;%]O=G)D7W-G861V86"
7338	"YC960 &-O<F5?9V5N97)A=&EO;E]S9V%D=F%N8V5D &-O<F5?9V5N97)A=&EO;@ ')U;E]C;W)E9V5N"
7339	"7W-G861V86YC960 ')U;E]C;W)E9V5N &1E<')E8V%T961?8V]N=')O;%]S9V%D=F%N8V5D &5V86Q?9F"
7340	"EE;&0 &AA<U]A9'9A;F-E9%]C;VYT<F]L '-G9W5I7W!O<P &)L"
7341	";V-K7W1Y<&4 &)L;V-K7W9E<G-I;VX '-G7VEC;VY?<W1A= "
7342	" '-G7VUA<VM?9&ES<&QA>0 '-G7VQI<W1?8V]N=&5N=', '-G7V)L;V-K9W5I7WAM; "
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7344	" '-Y;G1H7V9I;&4 &EM<&Q?9FEL90 &-E7V-L<@ "
7345	" '!R97-E<G9E7VAI97)A<F-H>0 X !( !@ @ $ 4 ( 0 !$ "
7346	" ! ! 1 (%-Y<W1E;2!'96YE<F%T;W( #@ #@ & \" 0 !0 @ ! !P $ "
7347	" $ < !K:6YT97@W X X !@ @ $ 4 ( 0 @ ! ! ( >&,W:S,R-70. "
7348	" , 8 ( ! % \" $ \" 0 0 ( +3, X X !@ @ $ 4 ( "
7349	" 0 8 ! ! & 9F)G-C<V . , 8 ( ! % \" 0 0 "
7350	" X P !@ @ $ 4 ( 0 , ! ! P!84U0 #@ # & \" 0 "
7351	" !0 @ $ $ . 0 8 ( ! % \" $ - 0 0 "
7352	"#0 $-L;V-K($5N86)L97, . 0 8 ( ! % \" $ ) 0 0 \"0 \"XO;F5T;&E"
7353	"S= . , 8 ( ! % \" 0 0 X !( !@ @ $ "
7354	" 4 ( 0 !$ ! ! 1 4')O:F5C=\"!.879I9V%T;W( #@ # & \" 0 "
7355	"!0 @ $ $ . 0 8 ( ! % \" $ , 0 0 #"
7356	" %A35\"!$969A=6QT<P . , 8 ( ! % \" 0 0 X ! !"
7357	"@ @ $ 4 ( 0 P ! ! , 25-%($1E9F%U;'1S X P !@ @ $ "
7358	" 4 ( ! ! #@ # & \" 0 !0 @ ! P $ $ #"
7359	" &]F9@ . , 8 ( ! % \" $ \" 0 0 ( ,3 X P !@ @ $ "
7360	" 4 ( 0 ( ! ! @ Q, #@ # & \" 0 !0 @ $ $ "
7361	" . , 8 ( ! % \" 0 0 X P !@ @ $ "
7362	"4 ( ! ! #@ # & \" 0 !0 @ $ $ "
7363	" . 2 8 ( ! % \" $ 8 0 0 & $%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<PX"
7364	" P !@ @ $ 4 ( ! ! #@ # & \" 0 !0 @ "
7365	" ! P $ $ # &]F9@ . , 8 ( ! % \" 0 0 X "
7366	" P !@ @ $ 4 ( 0 $ ! ! 0 P #@ # & \" 0 !0 @ "
7367	" ! 0 $ $ ! # . 0 8 ( ! % \" $ + 0 0 \"P \"TQ+"
7368	"\"TQ+\"TQ+\"TQ . . 8 ( ! % \" $ & 0 0 !@ '-Y<V=E;@ #@ # "
7369	" & \" 0 !0 @ $ $ . 8 8 ( ! % \" $"
7370	" N 0 0 +@ #4P+#4P+\"TQ+\"TQ+'1O:V5N+'=H:71E+# L,#<W,S0L<FEG:'0L+%L@72Q;(%T X ( P !@ @"
7371	" $ 4 ( 0 -<\" ! ! #7 @ 9G!R:6YT9B@G)RPG0T]-345.5#H@8F5G:6X@:6-O;B!G<F%P:&EC<R<I"
7372	".PIP871C:\"A;,\" U,\" U,\" P(# @72Q;,\" P(#4P(#4P(# @72Q;,2 Q(#$@72D[\"G!A=&-H*%LQ+C8S-S4@,38N.#$@,C<N,S$@,S<N.#$@"
7373	"-#@N,S$@,C<N,S$@,3(N,3,W-2 Q+C8S-S4@72Q;,S8N-C4U(#,V+C8U-2 T-RXQ-34@,S8N-C4U(#0W+C$U-2 T-RXQ-34@-#<N,34U(#,V+C8U-2"
7374	"!=+%LP+CDS,S,S,R P+C(P,SDR,B P+C$T,3$W-B!=3L<&%T8V@H6S$R+C$S-S4@,C<N,S$@,38N.#$@,2XV,S<U(#$R+C$S-S4@72Q;,C8N,34U"
7375	"(#(V+C$U-2 S-BXV-34@,S8N-C4U(#(V+C$U-2!=+%LP+C8Y.# S.2 P+C S,3,W,C4@,\"XR,3DV,#@@72D[\"G!A=&-H*%LQ+C8S-S4@,38N.#$@"
7376	",C<N,S$@,3(N,3,W-2 Q+C8S-S4@72Q;,34N-C4U(#$U+C8U-2 R-BXQ-34@,C8N,34U(#$U+C8U-2!=+%LP+CDS,S,S,R P+C(P,SDR,B P+C$T,3"
7377	"$W-B!=3L<&%T8V@H6S$R+C$S-S4@-#@N,S$@,S<N.#$@,C<N,S$@,38N.#$@,2XV,S<U(#$R+C$S-S4@72Q;-2XQ-34@-2XQ-34@,34N-C4U(#4N"
7378	",34U(#$U+C8U-2 Q-2XV-34@-2XQ-34@72Q;,\"XV.3@P,SD@,\"XP,S$S-S(U(# N,C$Y-C X(%TI.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!E;F"
7379	"0@:6-O;B!G<F%P:&EC<R<I.PIF<')I;G1F\"<G+\"=#3TU-14Y4.B!B96=I;B!I8V]N('1E>'0G3L*9G!R:6YT9B@G)RPG0T]-345.5#H@96YD(&"
7380	"EC;VX@=&5X=\"<I.P . , 8 ( ! % \" 0 0 X P !@ @ "
7381	" $ 4 ( ! ! #@ # & \" 0 !0 @ $ "
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7383	" 4 ( 0 0 ! ! ! !62$1,#@ $ & \" 0 !0 @ ! #0 $ "
7384	" $ T !84U0@1&5F875L=',J #@ $ & \" 0 !0 @ ! #0 $ $ T !)4T"
7385	"4@1&5F875L=',J #@ #@ & \" 8 !0 @ ! 0 $ \"0 @ X X "
7386	" !@ @ & 4 ( 0 $ ! D ( . >!P 8 ( @ % "
7387	"\" $ ! 0 % 0 '@ $ \"^!0 :6YF;V5D:70 >&EL:6YX9F%M:6QY "
7388	" <&%R= <W!E960 <&%C:V%G90 "
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7391	"]T>7!E7W-G861V86YC960 <')O:E]T>7!E 4WEN=&A?9FEL95]S9V%D=F%N8V5D "
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7395	"%N8V5D 9&)L7V]V<F1?<V=A9'9A;F-E9 8V]R95]G96YE<F%T:6]N7W-G861V86YC960 8V]R95]G96YE<F%T"
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7404	"7V9C;@ >&QE9&MS971T:6YG<V1A=&$ . 2 8 ( ! % \""
7405	" $ 1 0 0 $0 \"!3>7-T96T@1V5N97)A=&]R X X !@ @ $ 4 ( 0"
7406	" < ! ! ' =FER=&5X-@ . 0 8 ( ! % \" $ * 0 0 \"@"
7407	" 'AC-G9L>#(T,'0 . , 8 ( ! % \" $ \" 0 0 ( +3( X X !@"
7408	" @ $ 4 ( 0 8 ! ! & 9F8Q,34V . , 8 ( ! % \" "
7409	" 0 0 X P !@ @ $ 4 ( 0 , ! ! P!84U0 #@ "
7410	"# & \" 0 !0 @ $ $ . 0 8 ( ! % \" "
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7417	" #@ # & \" 0 !0 @ $ $ . , 8 ( ! % "
7418	" \" $ # 0 0 , ;V9F X P !@ @ $ 4 ( 0 ( ! ! @ Q, "
7419	" #@ # & \" 0 !0 @ ! @ $ $ \" #$P . , 8 ( ! % "
7420	" \" 0 0 X P !@ @ $ 4 ( ! ! "
7421	" #@ # & \" 0 !0 @ $ $ . , 8 ( ! % "
7422	"\" 0 0 X !( !@ @ $ 4 ( 0 !@ ! ! 8 0"
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7426	" 8 ( ! % \" $ ! 0 0 $ , X ! !@ @ $ 4 ( 0 "
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7436	".3,S,S,S(# N,C S.3(R(# N,30Q,3<V(%TI.PIP871C:\"A;,3(N,3,W-2 T.\"XS,2 S-RXX,2 R-RXS,2 Q-BXX,2 Q+C8S-S4@,3(N,3,W-2!="
7437	"+%LU+C$U-2 U+C$U-2 Q-2XV-34@-2XQ-34@,34N-C4U(#$U+C8U-2 U+C$U-2!=+%LP+C8Y.# S.2 P+C S,3,W,C4@,\"XR,3DV,#@@72D[\"F9P"
7438	"<FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N(&=R87!H:6-S)RD[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&)E9VEN(&EC;VX@=&5X=\"<I.PIF<')"
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7441	" % \" 0 0 X P !@ @ $ 4 ( 0 , ! ! "
7442	"P!O9F8 #@ # & \" 0 !0 @ ! ! $ $ $ %9(1$P. 0 8 ( ! "
7443	" % \" $ - 0 0 #0 %A35\"!$969A=6QT<RH . 0 8 ( ! % \" $ "
7444	" - 0 0 #0 $E312!$969A=6QT<RH . . 8 ( !@ % \" $ ! 0 "
7445	" ) \" #@ #@ & \" 8 !0 @ ! 0 $ \"0 @ X "
7446	" X !@ @ $ 4 ( 0 8 ! ! & .2XR+C Q . 0 8 ( ! "
7447	"% \" $ - 0 0 #0 'AL961K<V5T=&EN9W, . 0 8 ( ! % \" $ "
7448	"/ 0 0 #P 'AL961K<')E8V]M<&EL90 . 0 8 ( ! % \" $ - 0 0"
7449	" #0 'AL961K=7!D871E9FX . P < 8 ( @ % \" $ ! 0 % 0 & $ X "
7450	"0 97AP;W)T 97AP;W)T9&ER <V5L96-T:6]N=&%G 97AP;W)T9&ER<&%"
7451	"T: ;6%J;W( ;6EN;W( :'=?8V]M<&%T:6)I;&ET>0 ;"
7452	"6%J7W-L:61E<@ ;6EN;W)?<VQI9&5R :'=?8V]M<&%T:6)I;&ET>5]S;&ED97( :7-$979E;&]P;65N= "
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7454	" @ ! 0 $ \"0 @ X P !@ @ $ 4 ( ! "
7455	"! #@ $ & \" 0 !0 @ ! $ $ $ ! !T87)G971?9&ER96-T;W)Y#@ #"
7456	" & \" 0 !0 @ $ $ . . 8 ( !@ % \" "
7457	"$ ! 0 ) \" / _#@ #@ & \" 8 !0 @ ! 0 $ \"0 "
7458	" @ X P !@ @ $ 4 ( 0 $ ! ! 0!D #@ #@ & \" "
7459	"8 !0 @ ! 0 $ \"0 @ #P/PX X !@ @ & 4 ( 0 $"
7460	" ! D ( KD?A>A2N[S\\. . 8 ( !@ % \" $ ! 0 ) \" "
7461	" %E #@ #@ & \" 8 !0 @ ! 0 $ \"0 @ #P/PX X !@ "
7462	"@ & 4 ( 0 $ ! D ( . 6 , 8 ( @ % \" $"
7463	" ! 0 % 0 !0 $ * 8FD !P;W)T X \" 0 !@ @ \" 4 ( 0 $"
7464	" ! 4 ! % 0 \\ !C;VPQ &-O;#( 8V]L,P #@ & & \" $ !0 @ ! 0 $"
7465	" #@ # & \" 0 !0 @ ! 0 $ $ ! \" . 8 8 ( 0 "
7466	" % \" $ ! 0 . , 8 ( ! % \" $ ! 0 0 $ ( X"
7467	" !@ !@ @ ! 4 ( 0 $ ! X P !@ @ $ 4 ( 0 $ "
7468	" ! ! 0 @ #@ ( ! & \" ( !0 @ ! 0 $ !0 $ 4 ! #P &-O;#"
7469	"$ 8V]L,@!C;VPS . 8 8 ( 0 % \" $ ! 0 . , 8 ( ! "
7470	"% \" $ ! 0 0 $ ( X !@ !@ @ ! 4 ( 0 $ ! X P"
7471	" !@ @ $ 4 ( 0 $ ! ! 0 @ #@ & & \" $ !0 @ ! "
7472	" 0 $ #@ # & \" 0 !0 @ ! 0 $ $ ! \" "
7473	}
7474	}

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