[5170] | 1 | |
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| 2 | function deinterleaver_ram(this_block) |
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| 3 | |
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| 4 | this_block.setTopLevelLanguage('Verilog'); |
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| 5 | |
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| 6 | this_block.setEntityName('deinterleaver_ram'); |
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| 7 | |
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| 8 | % System Generator has to assume that your entity has a combinational feed through; |
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| 9 | % if it doesn't, then comment out the following line: |
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| 10 | this_block.tagAsCombinational; |
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| 11 | |
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| 12 | this_block.addSimulinkInport('dina'); |
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| 13 | this_block.addSimulinkInport('wea'); |
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| 14 | this_block.addSimulinkInport('addra'); |
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| 15 | this_block.addSimulinkInport('dinb'); |
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| 16 | this_block.addSimulinkInport('web'); |
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| 17 | this_block.addSimulinkInport('addrb'); |
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| 18 | |
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| 19 | this_block.addSimulinkOutport('douta'); |
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| 20 | this_block.addSimulinkOutport('doutb'); |
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| 21 | |
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| 22 | douta_port = this_block.port('douta'); |
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| 23 | douta_port.setType('UFix_4_0'); |
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| 24 | doutb_port = this_block.port('doutb'); |
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| 25 | doutb_port.setType('UFix_4_0'); |
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| 26 | |
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| 27 | % ----------------------------- |
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| 28 | if (this_block.inputTypesKnown) |
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| 29 | % do input type checking, dynamic output type and generic setup in this code block. |
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| 30 | |
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| 31 | if (this_block.port('dina').width ~= 32); |
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| 32 | this_block.setError('Input data type for port "dina" must have width=32.'); |
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| 33 | end |
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| 34 | |
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| 35 | if (this_block.port('wea').width ~= 1); |
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| 36 | this_block.setError('Input data type for port "wea" must have width=1.'); |
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| 37 | end |
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| 38 | |
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| 39 | if (this_block.port('addra').width ~= 9); |
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| 40 | this_block.setError('Input data type for port "addra" must have width=9.'); |
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| 41 | end |
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| 42 | |
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| 43 | if (this_block.port('dinb').width ~= 32); |
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| 44 | this_block.setError('Input data type for port "dinb" must have width=32.'); |
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| 45 | end |
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| 46 | |
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| 47 | if (this_block.port('web').width ~= 1); |
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| 48 | this_block.setError('Input data type for port "web" must have width=1.'); |
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| 49 | end |
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| 50 | |
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| 51 | if (this_block.port('addrb').width ~= 9); |
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| 52 | this_block.setError('Input data type for port "addrb" must have width=9.'); |
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| 53 | end |
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| 54 | |
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| 55 | end % if(inputTypesKnown) |
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| 56 | % ----------------------------- |
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| 57 | |
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| 58 | % ----------------------------- |
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| 59 | if (this_block.inputRatesKnown) |
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| 60 | setup_as_single_rate(this_block,'clk','ce') |
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| 61 | end % if(inputRatesKnown) |
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| 62 | % ----------------------------- |
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| 63 | |
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| 64 | % (!) Set the inout port rate to be the same as the first input |
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| 65 | % rate. Change the following code if this is untrue. |
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| 66 | uniqueInputRates = unique(this_block.getInputRates); |
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| 67 | |
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| 68 | |
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| 69 | % Add addtional source files as needed. |
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| 70 | % |------------- |
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| 71 | % | Add files in the order in which they should be compiled. |
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| 72 | % | If two files "a.vhd" and "b.vhd" contain the entities |
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| 73 | % | entity_a and entity_b, and entity_a contains a |
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| 74 | % | component of type entity_b, the correct sequence of |
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| 75 | % | addFile() calls would be: |
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| 76 | % | this_block.addFile('b.vhd'); |
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| 77 | % | this_block.addFile('a.vhd'); |
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| 78 | % |------------- |
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| 79 | |
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| 80 | % this_block.addFile(''); |
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| 81 | % this_block.addFile(''); |
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| 82 | this_block.addFile('blackboxes/dp_ram_wr_32b_rd_4b_2048b.ngc'); |
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| 83 | this_block.addFile('blackboxes/deinterleaver_ram.v'); |
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| 84 | |
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| 85 | return; |
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| 86 | |
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| 87 | |
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| 88 | % ------------------------------------------------------------ |
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| 89 | |
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| 90 | function setup_as_single_rate(block,clkname,cename) |
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| 91 | inputRates = block.inputRates; |
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| 92 | uniqueInputRates = unique(inputRates); |
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| 93 | if (length(uniqueInputRates)==1 & uniqueInputRates(1)==Inf) |
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| 94 | block.addError('The inputs to this block cannot all be constant.'); |
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| 95 | return; |
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| 96 | end |
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| 97 | if (uniqueInputRates(end) == Inf) |
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| 98 | hasConstantInput = true; |
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| 99 | uniqueInputRates = uniqueInputRates(1:end-1); |
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| 100 | end |
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| 101 | if (length(uniqueInputRates) ~= 1) |
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| 102 | block.addError('The inputs to this block must run at a single rate.'); |
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| 103 | return; |
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| 104 | end |
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| 105 | theInputRate = uniqueInputRates(1); |
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| 106 | for i = 1:block.numSimulinkOutports |
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| 107 | block.outport(i).setRate(theInputRate); |
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| 108 | end |
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| 109 | block.addClkCEPair(clkname,cename,theInputRate); |
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| 110 | return; |
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| 111 | |
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| 112 | % ------------------------------------------------------------ |
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| 113 | |
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