source:
ReferenceDesigns/w3_802.11/sysgen/wlan_phy_rx_pmd/blackboxes
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| vb_decoder_top_config.m | 4.7 KB | 4394 | 8 years | murphpo | First Rx PHY with 11n SISO support; copying MAC core with new name (no … |
| deinterleaver_ram.m | 3.6 KB | 5170 | 7 years | murphpo | Redesigned Rx de-interleaver, again. Previous architecture was too … |
| deinterleaver_ram.v | 5.1 KB | 5170 | 7 years | murphpo | Redesigned Rx de-interleaver, again. Previous architecture was too … |
| dp_ram_wr_32b_rd_4b_2048b.ngc | 25.8 KB | 5170 | 7 years | murphpo | Redesigned Rx de-interleaver, again. Previous architecture was too … |
| dp_ram_wr_32b_rd_4b_2048b.xco | 3.2 KB | 5170 | 7 years | murphpo | Redesigned Rx de-interleaver, again. Previous architecture was too … |
| vb_decoder_top.v | 6.0 KB | 5176 | 7 years | murphpo | Increased decoder metric precision to 8 bits; avoids rare overflow |
| bit_match_ram.v | 4.2 KB | 6151 | 6 years | murphpo | Redesigned DSSS Rx frontend for better synchronization performance at … |
| bit_match_ram_blkmemgen.ngc | 26.7 KB | 6151 | 6 years | murphpo | Redesigned DSSS Rx frontend for better synchronization performance at … |
| bit_match_ram_blkmemgen.xco | 3.2 KB | 6151 | 6 years | murphpo | Redesigned DSSS Rx frontend for better synchronization performance at … |
| count_ones_32b.v | 2.2 KB | 6152 | 6 years | murphpo | Added zero initial values |
| bit_match_ram_config.m | 3.3 KB | 6193 | 6 years | murphpo | Fixing comments |
| count_ones_32b_config.m | 2.6 KB | 6193 | 6 years | murphpo | Fixing comments |
| vb_decoder_rest.v | 84.3 KB | 6299 | 5 years | murphpo | Added pipeline reg in decoder Removed ILA in Rx PHY (easy to replace - … |
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