[1609] | 1 | %Make sure the Tx init has already been loaded |
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| 2 | ofdm_tx_supermimo_init; |
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| 3 | |
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| 4 | %Do not use 16! Breaks Alamouti Rx timing |
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| 5 | %Symbol_Timing_Offset = 15; %Use for no cyclic shift offset w/ antB preamble enabled, countLoad=229 |
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| 6 | |
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| 7 | %Symbol_Timing_Offset = 12; %Use for no cyclic shift offset w/ SISO, antB channel disabled, countLoad=229 |
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| 8 | Symbol_Timing_Offset = 10; |
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| 9 | |
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| 10 | PktDet_Delay = 58+32 + ... %UFix7_0 packet detect delay |
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| 11 | Symbol_Timing_Offset*2^7 + ... %UFix6_0 FFT window offset |
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| 12 | 0*2^16 + ... %UFix5_0 CFO calc delay, in samples |
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| 13 | (117* 2^24); %UFix8_8 threshold |
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| 14 | % (round(0.15 * 2^8)* 2^24); %UFix8_8 threshold |
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| 15 | |
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| 16 | pktByteNums = numHeaderBytes + ... |
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| 17 | byteIndex_numPayloadBytes(1)*2^8 + ... |
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| 18 | byteIndex_numPayloadBytes(2)*2^16 + ... |
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| 19 | byteIndex_simpleDynModMasks * 2^24; |
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| 20 | |
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| 21 | rx_SISO_Mode = tx_SISO_Mode; |
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| 22 | |
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| 23 | pktTiming_controlCounter_bits = 16; |
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| 24 | |
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| 25 | %Structure of packet following detection |
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| 26 | %Short symbols |
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| 27 | pktTiming_ss_num = 6; |
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| 28 | pktTiming_ss_length = length(shortSymbol_time); |
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| 29 | %Long symbols |
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| 30 | pktTiming_ls_num = 2; |
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| 31 | pktTiming_ls_length = length(longSymbol_time); |
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| 32 | %Long symbol cyclic prefix |
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| 33 | pktTiming_lscp_length = 32; |
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| 34 | |
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| 35 | pktTiming_count_ssStart = 0; |
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| 36 | pktTiming_count_lscpStart = (pktTiming_count_ssStart + pktTiming_ss_num*pktTiming_ss_length); |
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| 37 | pktTiming_count_lsStart = (pktTiming_count_lscpStart + pktTiming_lscp_length); |
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| 38 | pktTiming_count_payloadStart = pktTiming_count_lsStart + pktTiming_ls_num*pktTiming_ls_length; |
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| 39 | |
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| 40 | %Packet detection threshold |
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| 41 | pkt_crossCorr_thresh = 0.7; |
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| 42 | pkt_energy_thresh = 0; |
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| 43 | |
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[1629] | 44 | rxReg_pktDetCorr = ... |
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[1729] | 45 | 2^00 * 90 + ...%(floor(0.7*128)) + ... %min correlation/power ratio (UFix8_7) |
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[1733] | 46 | 2^08 * 5 + ...(300) + ... %min power (UFix16_8) |
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[1629] | 47 | 0; |
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| 48 | |
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[1609] | 49 | %In alamouti mode, the Rx syncs to the earlier preamble |
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| 50 | %LongCorrCounterLoad = 229; |
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| 51 | %LongCorrCounterLoad = 232; |
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| 52 | LongCorrCounterLoad = 253-8;%234; |
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| 53 | |
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| 54 | Rx_PktDet_LongCorrThresholds = 8000; |
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| 55 | |
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[1729] | 56 | Rx_PktDet_LongCorr_Params = ... |
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| 57 | 2^0 * LongCorrCounterLoad + ... |
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| 58 | 2^8 * 255 + ... %LongCorr CFO capt index |
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[1733] | 59 | 2^16 * 0 + ...%90-32 + ... %LongCorr window start |
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| 60 | 2^24 * 255; %180+32; %LongCorr window end |
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[1609] | 61 | |
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| 62 | %Interrupt control register has 8 bits: |
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| 63 | %0: Rx Pkt Interrupts Reset |
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| 64 | %1: Rx Header Interrupts Reset |
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| 65 | %2: Tx Done Interrupt Reset |
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| 66 | %3: Rx Good Pkt Interrupt Enable |
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| 67 | %4: Rx Bad Pkt Interrupt Enable |
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| 68 | %5: Rx Good Header Interrupt Enable |
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| 69 | %6: Rx Bad Header Interrupt Enable |
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| 70 | %7: Tx Done Interrupt Enable |
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| 71 | reg_InterruptControl = ... |
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| 72 | 0 + ... %3 bits [RxPkt, RxHeader, TxDone] interrupt resets |
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[1613] | 73 | 0*15 * 2^3 + ... %4 bits[LSB:MSB]=[goodPkt, badPkt, goodHdr, badHdr] interrupt enables |
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[1609] | 74 | 0 * 2^7; %1 bit for TxDone enable |
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| 75 | |
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| 76 | %32-bit register holds both pkt buffer offsets (16LSB+8) and interrupt control (8LSB) |
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| 77 | reg_Interrupt_PktBuf_Control = ... |
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| 78 | reg_InterruptControl + ... |
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| 79 | 1 * 2^16 + ... %6 bits for Tx pkt buff offset |
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| 80 | 0 * 2^24; %6 bits for Rx pkt buff offset |
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| 81 | |
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| 82 | minPilotChanMag = (0.01 * 2^12); %UFix12_12 |
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| 83 | reg_PilotCalcParams = (4 * 2^16) + (minPilotChanMag); |
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| 84 | |
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| 85 | regRx_preCFOoptions = ... |
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| 86 | 0 * 2^0 + ... %Use coarse CFO estimate |
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| 87 | 1 * 2^1 + ... %Use pilot CFO estimate |
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| 88 | 0; |
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| 89 | |
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| 90 | regRx_pilotCalcCorrection = round(1.00115 * 2^31); |
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| 91 | regRx_coarseCalcCorrection = round((1.3e-3 - 1.2982e-3)*2^32); |
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| 92 | %Initialization values for the long correlator |
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| 93 | % The correlator only stores the signs of the values in a long trainin symbol |
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| 94 | % This code and the correlator block were designed by Dr. Chris Dick |
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| 95 | |
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| 96 | %Fix2_0 version of longSym |
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| 97 | longCorr_coef_nbits = 3; |
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| 98 | longCorr_coef_bp = 0; |
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| 99 | LTS = fliplr(longSymbol_time./max(abs(longSymbol_time))); |
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| 100 | |
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| 101 | %longCorr_coef_i = [-1*sign(real(fliplr(LTS))) 0]; |
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| 102 | %longCorr_coef_q = [sign(imag(fliplr(LTS))) 0]; |
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| 103 | |
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| 104 | longCorr_coef_i = [-4*real(LTS) 0]; |
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| 105 | longCorr_coef_q = [4*imag(LTS) 0]; |
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| 106 | ii = find(longCorr_coef_i < -3.5); |
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| 107 | longCorr_coef_i(ii) = -3; |
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| 108 | ii = find(longCorr_coef_q < -3.5); |
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| 109 | longCorr_coef_q(ii) = -3; |
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| 110 | |
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| 111 | %Shift the correlation pattern by 16 to allow the calculation |
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| 112 | % to finish in time to decide the beginning of the payload |
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| 113 | %L = [longSymbol_time(50:64) longSymbol_time(1:49)]; |
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| 114 | L = [longSymbol_time]; |
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| 115 | |
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| 116 | ccr = -1*sign(real(fliplr(L))); |
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| 117 | ccr = [ccr 0]; |
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| 118 | ii = find(ccr==0); |
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| 119 | ccr(ii)=1; |
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| 120 | |
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| 121 | cci = 1*sign(fliplr(imag(L))); |
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| 122 | cci = [cci 0]; |
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| 123 | ii=find(cci==0); |
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| 124 | cci(ii)=1; |
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| 125 | |
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| 126 | ii = find(ccr==-1); |
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| 127 | hr = zeros(1,length(ccr)); |
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| 128 | hr(ii) = 1; |
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| 129 | |
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| 130 | ii = find(cci==-1); |
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| 131 | hi = zeros(1,length(cci)); |
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| 132 | hi(ii) = 1; |
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| 133 | |
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| 134 | long_cor_acc_n_bits = 6; |
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| 135 | %long_cor_acc_n_bits = 4; |
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| 136 | Tr1 = 1/4; |
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| 137 | |
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| 138 | %Demodulator input precision |
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| 139 | symbol_unmap_bp= 15; |
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| 140 | symbol_unmap_nb= 16; |
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| 141 | |
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| 142 | RxReg_FixedPktLen = 0;%2^32 + 512; |
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| 143 | |
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| 144 | %Popluate the RxControlBits register |
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| 145 | % Each bit has a different function |
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| 146 | %0x1: 1: Reset BER |
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| 147 | %0x2: 2: Require long correlation for pkt detection |
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| 148 | %0x4: 4: Enable dynamic packet lengths |
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| 149 | %0x8: 8: Big sub-pkt buffer mode (16KB max pkt size) |
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| 150 | %0x10: 16: Enable SISO mode |
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| 151 | %0x20: 32: Require 2 long correlations for pkt detection |
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| 152 | %0x40: 64: Require short correlation or ext pkt detection |
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| 153 | %0x80: 128: Record channel estimates |
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| 154 | %0x100: 256: Record channel estimate magnitudes |
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| 155 | %0x200: 512: bypass CFO correction |
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| 156 | %0x400: 1024: Enable coarse CFO estimation |
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| 157 | %0x800: 2048: CFO debug output selection |
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| 158 | %0x1000:4096: Compensate for RF gain in RSSI input |
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| 159 | %0x4000:16384: Bypass division during EQ |
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| 160 | %0x8000:32768: Disable Rx PHY on Tx (not useful for simulation!) |
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| 161 | %0x1_0000:65536: Enable simple dynamic modulation |
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| 162 | %0x2_0000:131072: Enable switching diversity |
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| 163 | %0x4_0000:262144: Use antenna B in SISO mode |
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| 164 | %0x8_0000:524288: Enable Rx reset on bad header CRC |
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| 165 | %0x10_0000: 1048576: Enable Rx Alamouti mode |
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| 166 | %0x20_0000: 2097152: Enable flexBER mode |
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| 167 | %0x40_0000: 4194304: Ignore headers for BER |
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| 168 | %0x80_0000: 8388608: Per-packet BER reset |
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| 169 | %0x100_0000: 16777216: Force-enable radio RxEn |
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| 170 | %0x200_0000: 33554432: SaveAF waveform |
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| 171 | %0x400_0000: Reset autoResponse flagA |
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| 172 | %0x800_0000: Reset autoResponse flagB |
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| 173 | %0x2000_0000: 536870912: Enable channel magnitude masking (only useful in Alamouti mode) |
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| 174 | %0x8000_0000: 2147483648: Global Rx reset |
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| 175 | |
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| 176 | rx_controlBits = 1 * 2 ... %Long correlation |
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| 177 | + 1 * 4 ... %Dyn pkt lengths |
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| 178 | + 0 * 8 ... %1=big sub-pkt buffers |
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| 179 | + 1 * 16 * rx_SISO_Mode ... |
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| 180 | + 1 * 32 ... %2 long correlations |
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| 181 | + 1 * 64 ... %short correlation |
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| 182 | + 1 * 128 ... %record channel estimates |
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| 183 | + 1 * 256 ... %record channel estimate mags |
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[1729] | 184 | + 0 * 512 ... %bypass CFO%%%%%%%%%%%% |
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[1609] | 185 | + 1 * 1024 ... %1=Enable coarse CFO estimation |
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| 186 | + 1 * 4096 ... %Compensate for RFgain in RSSI input |
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| 187 | + 0 * 16384 ... %1=Bypass EQ division |
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| 188 | + 0 * 32768 ... %0=Don't disable Rx during Tx |
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| 189 | + 1 * 65536 ... %1=Use simple dynamic modulation |
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| 190 | + 0 * 131072 ... %1=Use switching diversity in SISO mode |
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| 191 | + 0 * 262144 ... %1=force AntB in SISO mode |
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| 192 | + 1 * 524288 ... %1=Reset Rx on bad header |
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| 193 | + 1 * 1048576 * tx_Alamouti_Mode ... |
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| 194 | + 0 * 2097152 ... %1=flex BER mode |
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| 195 | + 1 * 33554432 ... %1=Save AF waveform |
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| 196 | + 0 * 4194304 ... %1=ignore headers (and header-only packets) for BER calculation |
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| 197 | + 0 * 8388608 ... %1=Per-packet BER reset |
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| 198 | + 0 * 16777216 ... %Don't force RxEn in simulation (used in hardware though) |
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| 199 | + 1 * 536870912 * tx_Alamouti_Mode ... %Enables chan mag checking/masking |
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| 200 | + 0 * 2147483648; %Global Rx reset |
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| 201 | |
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| 202 | |
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| 203 | %Min chan est magnitudes (Two UFix16_15 values, re-interpreted as UFix16_0) |
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| 204 | regRx_chanEst_minMag = ((0.5)*2^15) + ((0.5 * 2^15)*2^16); |
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| 205 | |
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[1679] | 206 | %Pkt detector control register |
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| 207 | pktDet_controlBits = 0 * 2^0 ... %Pkt det master reset |
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| 208 | + 0 * 2^1 ... %Ignore all pktDet events |
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| 209 | + 0 * 2^2 ... %Clock divider for RSSI ADC |
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| 210 | + 1 * 2^3 ... %Enable the CSMA IDLEFORDIFS output |
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| 211 | + 1 * 2^4 ... %Pkt det mode (1=antA OR antB, 0=antA AND antB) |
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| 212 | + 1 * 2^5 ... %Accept pkt det events on antA |
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| 213 | + 1 * 2^6 ... %Accept pkt det events on antB |
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| 214 | + 0 * 2^7 ... %Enable the external pkt det input |
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[1729] | 215 | + 0 * 2^8 ... %Enable the RSSI/energy-threshold detector |
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[1679] | 216 | + 1 * 2^9 ... %Enable the auto-correlation detector |
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| 217 | + 0; |
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| 218 | |
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[1609] | 219 | %Post-equalization scaling |
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| 220 | %This value is used to scale the equalizer's output before demodulation |
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| 221 | %This is used to correct for any fixed gain/attenuation the full system has |
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| 222 | % The value shouldn't be channel or modulation dependent |
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| 223 | % It does depend on the number of training symbols (1/training) |
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| 224 | if(tx_SISO_Mode) |
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| 225 | rxScaling = 2; |
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| 226 | else |
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| 227 | rxScaling = 1; |
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| 228 | end |
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| 229 | |
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| 230 | %AF scaling; UFix18_12 |
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| 231 | reg_AF_Tx_Scaling = 2944;%2 * 2^12; |
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| 232 | |
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| 233 | reg_AF_Tx_Blanking = (320+80) + ( (320+80+79)*2^16); |
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| 234 | |
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| 235 | % This scaling value resides in a UFix_32_0 register |
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| 236 | % The value is split into two 16 bit values, then |
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| 237 | % each is re-interpreted as a UFix_16_11 |
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| 238 | rx_postEq_scaling = round(rxScaling*2^11) * (1 + 2^16); |
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| 239 | %mod((rxScaling*2^11),2^16) + (2^16 * mod((rxScaling*2^11),2^16)); |
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| 240 | |
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| 241 | %Load Chipscope capture data |
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| 242 | AntA_ADC_I = 0;AntA_ADC_Q = 0; csInterp = 1; t_start = 1; t_stop = 1;%2260; |
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[1733] | 243 | %xlLoadChipScopeData('chipscope_captures\PHY_c_badHdr_0.prn'); csInterp = 2; t_start = 1; |
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[1609] | 244 | |
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| 245 | rxAntI.time = []; |
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| 246 | rxAntQ.time = []; |
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| 247 | rxAntI.signals.values = AntA_ADC_I(t_start:csInterp:end); |
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| 248 | rxAntQ.signals.values = AntA_ADC_Q(t_start:csInterp:end); |
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| 249 | if(length(AntA_ADC_I) > 1) |
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| 250 | simOnly_simLength = 1000 + 4*(length(AntA_ADC_I) - t_start); |
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| 251 | end |
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| 252 | |
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