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Last change
on this file was
4443,
checked in by welsh, 9 years ago
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Updates for WARPLab 7.5.0. Version 3.00.b.
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File size:
724 bytes
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| 1 | README |
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| 2 | |
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| 3 | This AGC core originated from the 802.11 reference design and was modified for WARPLab |
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| 4 | as part of the WARPLab 7.5.0 release. This is straight copy of the w3 AGC, renamed for the |
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| 5 | WARP v2 hardware, except for the following modifications: |
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| 6 | |
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| 7 | - Updated Model properties to reference w3_warplab_agc_init.m |
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| 8 | - Updated EDK processor block to use PLB bus |
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| 9 | - Updated ADC inputs to be Fix_14_13 vs Fix_12_11 |
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| 10 | - Updated pipeline for new 14 bit inputs |
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| 11 | - DCO correlator increased bit widths from 17 to 19 |
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| 12 | - NOTE: The IQ Magnitude calculations are the same as before because the extra precision does not matter |
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| 13 | - Changed sysgen clock from 160 MHz to 80 MHz |
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| 14 | - Updated IQ valid generation |
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| 17 | |
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