Last change
on this file was
4443,
checked in by welsh, 9 years ago
|
Updates for WARPLab 7.5.0. Version 3.00.b.
|
File size:
724 bytes
|
Line | |
---|
1 | README |
---|
2 | |
---|
3 | This AGC core originated from the 802.11 reference design and was modified for WARPLab |
---|
4 | as part of the WARPLab 7.5.0 release. This is straight copy of the w3 AGC, renamed for the |
---|
5 | WARP v2 hardware, except for the following modifications: |
---|
6 | |
---|
7 | - Updated Model properties to reference w3_warplab_agc_init.m |
---|
8 | - Updated EDK processor block to use PLB bus |
---|
9 | - Updated ADC inputs to be Fix_14_13 vs Fix_12_11 |
---|
10 | - Updated pipeline for new 14 bit inputs |
---|
11 | - DCO correlator increased bit widths from 17 to 19 |
---|
12 | - NOTE: The IQ Magnitude calculations are the same as before because the extra precision does not matter |
---|
13 | - Changed sysgen clock from 160 MHz to 80 MHz |
---|
14 | - Updated IQ valid generation |
---|
15 | |
---|
16 | |
---|
17 | |
---|
Note: See
TracBrowser
for help on using the repository browser.