[4746] | 1 | % Load data from capture |
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| 2 | % |
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| 3 | % xlLoadChipScopeData('../wlan_phy_rx/cs_capt/wlan_cs_capt_5.prn'); cs_interp = 1; cs_start = 1; |
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| 4 | % payload_vec = [zeros(25,1); complex(ADC_I(cs_start:cs_interp:end), ADC_Q(cs_start:cs_interp:end));]; |
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[4183] | 5 | |
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[4746] | 6 | % Sinusoid test vector |
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| 7 | % |
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| 8 | % ts_tx = 1 / 40e6; |
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| 9 | % t = [0:ts_tx:(10000 * ts_tx)].'; % Create time vector (Sample Frequency is ts_tx (Hz)) |
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| 10 | % sinusoid = 0.2 * exp(j*2*pi * 5e6 * t); % Create 5 MHz sinusoid |
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| 11 | % payload_vec = [sinusoid]; |
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[4183] | 12 | |
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[4746] | 13 | % No test vector |
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| 14 | % |
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[4183] | 15 | payload_vec = 0; |
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[4746] | 16 | |
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[4183] | 17 | raw_rx_I.time = []; |
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| 18 | raw_rx_Q.time = []; |
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| 19 | |
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| 20 | DCO_I = 0.05; |
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| 21 | DCO_Q = 0; |
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| 22 | G_I = 2; |
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| 23 | G_Q = 2; |
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| 24 | |
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| 25 | raw_rx_I.signals.values = DCO_I + G_I*real(payload_vec); |
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| 26 | raw_rx_Q.signals.values = DCO_Q + G_Q*imag(payload_vec); |
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| 27 | |
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| 28 | |
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| 29 | PHY_CONFIG_PKT_DET_CORR_THRESH = 90; |
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| 30 | PHY_CONFIG_PKT_DET_ENERGY_THRESH = 14; |
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| 31 | PHY_CONFIG_PKT_DET_MIN_DURR = 4; |
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| 32 | |
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| 33 | %% Register Init |
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| 34 | |
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| 35 | % Timing registers |
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[4796] | 36 | AGC_TIMING_CAPT_RSSI_1 = 1; |
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| 37 | AGC_TIMING_CAPT_RSSI_2 = 30; |
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| 38 | AGC_TIMING_CAPT_V_DB = 90; |
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| 39 | AGC_TIMING_DONE = 96; |
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[4183] | 40 | |
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[4796] | 41 | AGC_TIMING_START_DCO = 100; |
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| 42 | AGC_TIMING_EN_IIR_FILT = 100 + 34; |
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[4183] | 43 | |
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[4796] | 44 | AGC_TIMING_RESET_RXHP = 4; |
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| 45 | AGC_TIMING_RESET_G_RF = 250; |
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| 46 | AGC_TIMING_RESET_G_BB = 250; |
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[4183] | 47 | |
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| 48 | % Config register |
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[4796] | 49 | AGC_G_RF_THRESH_32 = 256 - 56; % Reinterpret Fix8_0 to UFix8_0 |
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| 50 | AGC_G_RF_THRESH_21 = 256 - 37; % Reinterpret Fix8_0 to UFix8_0 |
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| 51 | AGC_RSSI_AVG_LEN_SEL = 2; |
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| 52 | AGC_V_DB_ADJ = 4; % Reinterpret Fix6_0 to UFix6_0 |
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[4183] | 53 | AGC_INIT_G_BB = 24; |
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| 54 | |
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| 55 | % Target register |
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[4796] | 56 | AGC_TARGET_PWR = 64 - 16; % Reinterpret Fix6_0 to UFix6_0 |
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[4183] | 57 | |
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| 58 | % IIR filt coefficients |
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[4796] | 59 | DCO_IIR_Coef_A1 = -0.996863331833438; |
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| 60 | DCO_IIR_Coef_B0 = 0.99843166591671906; |
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[4183] | 61 | |
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| 62 | % Rx Power - RSSI calib register (-power values in dBm) |
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| 63 | RSSI_MIN_PWR_G_RF_3 = 100; |
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| 64 | RSSI_MIN_PWR_G_RF_2 = 85; |
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| 65 | RSSI_MIN_PWR_G_RF_1 = 70; |
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| 66 | |
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[4796] | 67 | % Register initial values |
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[4798] | 68 | REG_ACG_OVERRIDE = hex2dec('00000000'); |
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| 69 | REG_AGC_RESET_MODE = hex2dec('00000001'); |
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| 70 | REG_AGC_RX_LENGTH = hex2dec('FFFFFFFF'); |
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[4796] | 71 | |
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[4183] | 72 | REG_AGC_Timing_AGC = ... |
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| 73 | 2^0 * AGC_TIMING_CAPT_RSSI_1 + ... % UFix8_0 |
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| 74 | 2^8 * AGC_TIMING_CAPT_RSSI_2 + ... % UFix8_0 |
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| 75 | 2^16 * AGC_TIMING_CAPT_V_DB + ... % UFix8_0 |
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| 76 | 2^24 * AGC_TIMING_DONE; % UFix8_0 |
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| 77 | |
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| 78 | REG_AGC_Timing_DCO = ... |
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| 79 | 2^0 * AGC_TIMING_START_DCO + ... % UFix8_0 |
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| 80 | 2^8 * AGC_TIMING_EN_IIR_FILT + ... % UFix8_0 |
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| 81 | 0; |
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| 82 | |
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| 83 | REG_AGC_Timing_Reset = ... |
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| 84 | 2^0 * AGC_TIMING_RESET_RXHP + ... % UFix8_0 |
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| 85 | 2^8 * AGC_TIMING_RESET_G_RF + ... % UFix8_0 |
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| 86 | 2^16 * AGC_TIMING_RESET_G_BB + ... % UFix8_0 |
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| 87 | 0; |
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| 88 | |
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| 89 | REG_AGC_Config = ... |
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| 90 | 2^0 * AGC_G_RF_THRESH_32 + ... % Fix8_0 |
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| 91 | 2^8 * AGC_G_RF_THRESH_21 + ... % Fix8_0 |
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| 92 | 2^16 * AGC_RSSI_AVG_LEN_SEL + ... % UFix2_0 |
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| 93 | 2^18 * AGC_V_DB_ADJ + ... % Fix6_0 |
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| 94 | 2^24 * AGC_INIT_G_BB + ... % UFix5_0 |
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| 95 | 0; |
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| 96 | |
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| 97 | REG_AGC_Target = AGC_TARGET_PWR; |
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| 98 | |
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| 99 | REG_AGC_IIR_Coef_A1 = DCO_IIR_Coef_A1; |
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| 100 | REG_AGC_IIR_Coef_B0 = DCO_IIR_Coef_B0; |
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| 101 | |
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| 102 | REG_AGC_RSSI_RX_PWR_CALIB = ... |
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| 103 | 2^0 * RSSI_MIN_PWR_G_RF_3 + ... % UFix8_0 |
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| 104 | 2^8 * RSSI_MIN_PWR_G_RF_2 + ... % UFix8_0 |
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| 105 | 2^16 * RSSI_MIN_PWR_G_RF_1 + ... % UFix8_0 |
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| 106 | 0; |
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| 107 | |
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| 108 | |
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