Model {
  Name			  "warp_timer"
  Version		  6.6
  MdlSubVersion		  0
  GraphicalInterface {
    NumRootInports	    0
    NumRootOutports	    0
    ParameterArgumentNames  ""
    ComputedModelVersion    "1.226"
    NumModelReferences	    0
    NumTestPointedSignals   0
  }
  SavedCharacterEncoding  "windows-1252"
  SaveDefaultBlockParams  on
  SampleTimeColors	  on
  LibraryLinkDisplay	  "none"
  WideLines		  off
  ShowLineDimensions	  off
  ShowPortDataTypes	  off
  ShowLoopsOnError	  on
  IgnoreBidirectionalLines off
  ShowStorageClass	  off
  ShowTestPointIcons	  on
  ShowViewerIcons	  on
  SortedOrder		  off
  ExecutionContextIcon	  off
  ShowLinearizationAnnotations on
  ScopeRefreshTime	  0.035000
  OverrideScopeRefreshTime on
  DisableAllScopes	  off
  DataTypeOverride	  "UseLocalSettings"
  MinMaxOverflowLogging	  "UseLocalSettings"
  MinMaxOverflowArchiveMode "Overwrite"
  BlockNameDataTip	  off
  BlockParametersDataTip  off
  BlockDescriptionStringDataTip	off
  ToolBar		  on
  StatusBar		  on
  BrowserShowLibraryLinks off
  BrowserLookUnderMasks	  off
  Created		  "Sun Feb 18 17:49:04 2007"
  Creator		  "CMC"
  UpdateHistory		  "UpdateHistoryNever"
  ModifiedByFormat	  "%<Auto>"
  LastModifiedBy	  "CMC"
  ModifiedDateFormat	  "%<Auto>"
  LastModifiedDate	  "Wed Jul 23 11:21:32 2008"
  ModelVersionFormat	  "1.%<AutoIncrement:226>"
  ConfigurationManager	  "None"
  SimulationMode	  "normal"
  LinearizationMsg	  "none"
  Profile		  off
  ParamWorkspaceSource	  "MATLABWorkspace"
  AccelSystemTargetFile	  "accel.tlc"
  AccelTemplateMakefile	  "accel_default_tmf"
  AccelMakeCommand	  "make_rtw"
  AccelVerboseBuild	  off
  TryForcingSFcnDF	  off
  RecordCoverage	  off
  CovPath		  "/"
  CovSaveName		  "covdata"
  CovMetricSettings	  "dw"
  CovNameIncrementing	  off
  CovHtmlReporting	  on
  covSaveCumulativeToWorkspaceVar on
  CovSaveSingleToWorkspaceVar on
  CovCumulativeVarName	  "covCumulativeData"
  CovCumulativeReport	  off
  CovReportOnPause	  on
  ExtModeBatchMode	  off
  ExtModeEnableFloating	  on
  ExtModeTrigType	  "manual"
  ExtModeTrigMode	  "normal"
  ExtModeTrigPort	  "1"
  ExtModeTrigElement	  "any"
  ExtModeTrigDuration	  1000
  ExtModeTrigDurationFloating "auto"
  ExtModeTrigHoldOff	  0
  ExtModeTrigDelay	  0
  ExtModeTrigDirection	  "rising"
  ExtModeTrigLevel	  0
  ExtModeArchiveMode	  "off"
  ExtModeAutoIncOneShot	  off
  ExtModeIncDirWhenArm	  off
  ExtModeAddSuffixToVar	  off
  ExtModeWriteAllDataToWs off
  ExtModeArmWhenConnect	  on
  ExtModeSkipDownloadWhenConnect off
  ExtModeLogAll		  on
  ExtModeAutoUpdateStatusClock on
  BufferReuse		  on
  ProdHWDeviceType	  "32-bit Generic"
  ShowModelReferenceBlockVersion off
  ShowModelReferenceBlockIO off
  Array {
    Type		    "Handle"
    Dimension		    1
    Simulink.ConfigSet {
      $ObjectID		      1
      Version		      "1.2.0"
      Array {
	Type			"Handle"
	Dimension		7
	Simulink.SolverCC {
	  $ObjectID		  2
	  Version		  "1.2.0"
	  StartTime		  "0.0"
	  StopTime		  "1000"
	  AbsTol		  "auto"
	  FixedStep		  "auto"
	  InitialStep		  "auto"
	  MaxNumMinSteps	  "-1"
	  MaxOrder		  5
	  ConsecutiveZCsStepRelTol "10*128*eps"
	  MaxConsecutiveZCs	  "1000"
	  ExtrapolationOrder	  4
	  NumberNewtonIterations  1
	  MaxStep		  "auto"
	  MinStep		  "auto"
	  MaxConsecutiveMinStep	  "1"
	  RelTol		  "1e-3"
	  SolverMode		  "Auto"
	  Solver		  "ode45"
	  SolverName		  "ode45"
	  ZeroCrossControl	  "UseLocalSettings"
	  AlgebraicLoopSolver	  "TrustRegion"
	  SolverResetMethod	  "Fast"
	  PositivePriorityOrder	  off
	  AutoInsertRateTranBlk	  off
	  SampleTimeConstraint	  "Unconstrained"
	  RateTranMode		  "Deterministic"
	}
	Simulink.DataIOCC {
	  $ObjectID		  3
	  Version		  "1.2.0"
	  Decimation		  "1"
	  ExternalInput		  "[t, u]"
	  FinalStateName	  "xFinal"
	  InitialState		  "xInitial"
	  LimitDataPoints	  on
	  MaxDataPoints		  "1000"
	  LoadExternalInput	  off
	  LoadInitialState	  off
	  SaveFinalState	  off
	  SaveFormat		  "Array"
	  SaveOutput		  on
	  SaveState		  off
	  SignalLogging		  on
	  InspectSignalLogs	  off
	  SaveTime		  on
	  StateSaveName		  "xout"
	  TimeSaveName		  "tout"
	  OutputSaveName	  "yout"
	  SignalLoggingName	  "logsout"
	  OutputOption		  "RefineOutputTimes"
	  OutputTimes		  "[]"
	  Refine		  "1"
	}
	Simulink.OptimizationCC {
	  $ObjectID		  4
	  Array {
	    Type		    "Cell"
	    Dimension		    5
	    Cell		    "ZeroExternalMemoryAtStartup"
	    Cell		    "ZeroInternalMemoryAtStartup"
	    Cell		    "InitFltsAndDblsToZero"
	    Cell		    "OptimizeModelRefInitCode"
	    Cell		    "NoFixptDivByZeroProtection"
	    PropName		    "DisabledProps"
	  }
	  Version		  "1.2.0"
	  BlockReduction	  on
	  BooleanDataType	  on
	  ConditionallyExecuteInputs on
	  InlineParams		  off
	  InlineInvariantSignals  off
	  OptimizeBlockIOStorage  on
	  BufferReuse		  on
	  EnforceIntegerDowncast  on
	  ExpressionFolding	  on
	  ExpressionDepthLimit	  2147483647
	  FoldNonRolledExpr	  on
	  LocalBlockOutputs	  on
	  RollThreshold		  5
	  SystemCodeInlineAuto	  off
	  StateBitsets		  off
	  DataBitsets		  off
	  UseTempVars		  off
	  ZeroExternalMemoryAtStartup on
	  ZeroInternalMemoryAtStartup on
	  InitFltsAndDblsToZero	  on
	  NoFixptDivByZeroProtection off
	  EfficientFloat2IntCast  off
	  OptimizeModelRefInitCode off
	  LifeSpan		  "inf"
	  BufferReusableBoundary  on
	}
	Simulink.DebuggingCC {
	  $ObjectID		  5
	  Version		  "1.2.0"
	  RTPrefix		  "error"
	  ConsistencyChecking	  "none"
	  ArrayBoundsChecking	  "none"
	  SignalInfNanChecking	  "none"
	  ReadBeforeWriteMsg	  "UseLocalSettings"
	  WriteAfterWriteMsg	  "UseLocalSettings"
	  WriteAfterReadMsg	  "UseLocalSettings"
	  AlgebraicLoopMsg	  "warning"
	  ArtificialAlgebraicLoopMsg "warning"
	  CheckSSInitialOutputMsg on
	  CheckExecutionContextPreStartOutputMsg off
	  CheckExecutionContextRuntimeOutputMsg	off
	  SignalResolutionControl "TryResolveAllWithWarning"
	  BlockPriorityViolationMsg "warning"
	  MinStepSizeMsg	  "warning"
	  TimeAdjustmentMsg	  "none"
	  MaxConsecutiveZCsMsg	  "error"
	  SolverPrmCheckMsg	  "warning"
	  InheritedTsInSrcMsg	  "warning"
	  DiscreteInheritContinuousMsg "warning"
	  MultiTaskDSMMsg	  "warning"
	  MultiTaskCondExecSysMsg "none"
	  MultiTaskRateTransMsg	  "error"
	  SingleTaskRateTransMsg  "none"
	  TasksWithSamePriorityMsg "warning"
	  SigSpecEnsureSampleTimeMsg "warning"
	  CheckMatrixSingularityMsg "none"
	  IntegerOverflowMsg	  "warning"
	  Int32ToFloatConvMsg	  "warning"
	  ParameterDowncastMsg	  "error"
	  ParameterOverflowMsg	  "error"
	  ParameterUnderflowMsg	  "none"
	  ParameterPrecisionLossMsg "warning"
	  ParameterTunabilityLossMsg "warning"
	  UnderSpecifiedDataTypeMsg "none"
	  UnnecessaryDatatypeConvMsg "none"
	  VectorMatrixConversionMsg "none"
	  InvalidFcnCallConnMsg	  "error"
	  FcnCallInpInsideContextMsg "Use local settings"
	  SignalLabelMismatchMsg  "none"
	  UnconnectedInputMsg	  "warning"
	  UnconnectedOutputMsg	  "warning"
	  UnconnectedLineMsg	  "warning"
	  SFcnCompatibilityMsg	  "none"
	  UniqueDataStoreMsg	  "none"
	  BusObjectLabelMismatch  "warning"
	  RootOutportRequireBusObject "warning"
	  AssertControl		  "UseLocalSettings"
	  EnableOverflowDetection off
	  ModelReferenceIOMsg	  "none"
	  ModelReferenceVersionMismatchMessage "none"
	  ModelReferenceIOMismatchMessage "none"
	  ModelReferenceCSMismatchMessage "none"
	  ModelReferenceSimTargetVerbose off
	  UnknownTsInhSupMsg	  "warning"
	  ModelReferenceDataLoggingMessage "warning"
	  ModelReferenceSymbolNameMessage "warning"
	  ModelReferenceExtraNoncontSigs "error"
	  StateNameClashWarn	  "warning"
	  StrictBusMsg		  "Warning"
	}
	Simulink.HardwareCC {
	  $ObjectID		  6
	  Version		  "1.2.0"
	  ProdBitPerChar	  8
	  ProdBitPerShort	  16
	  ProdBitPerInt		  32
	  ProdBitPerLong	  32
	  ProdIntDivRoundTo	  "Undefined"
	  ProdEndianess		  "Unspecified"
	  ProdWordSize		  32
	  ProdShiftRightIntArith  on
	  ProdHWDeviceType	  "32-bit Generic"
	  TargetBitPerChar	  8
	  TargetBitPerShort	  16
	  TargetBitPerInt	  32
	  TargetBitPerLong	  32
	  TargetShiftRightIntArith on
	  TargetIntDivRoundTo	  "Undefined"
	  TargetEndianess	  "Unspecified"
	  TargetWordSize	  32
	  TargetTypeEmulationWarnSuppressLevel 0
	  TargetPreprocMaxBitsSint 32
	  TargetPreprocMaxBitsUint 32
	  TargetHWDeviceType	  "Specified"
	  TargetUnknown		  off
	  ProdEqTarget		  on
	}
	Simulink.ModelReferenceCC {
	  $ObjectID		  7
	  Version		  "1.2.0"
	  UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
	  CheckModelReferenceTargetMessage "error"
	  ModelReferenceNumInstancesAllowed "Multi"
	  ModelReferencePassRootInputsByReference on
	  ModelReferenceMinAlgLoopOccurrences off
	}
	Simulink.RTWCC {
	  $BackupClass		  "Simulink.RTWCC"
	  $ObjectID		  8
	  Array {
	    Type		    "Cell"
	    Dimension		    1
	    Cell		    "IncludeHyperlinkInReport"
	    PropName		    "DisabledProps"
	  }
	  Version		  "1.2.0"
	  SystemTargetFile	  "grt.tlc"
	  GenCodeOnly		  off
	  MakeCommand		  "make_rtw"
	  GenerateMakefile	  on
	  TemplateMakefile	  "grt_default_tmf"
	  GenerateReport	  off
	  SaveLog		  off
	  RTWVerbose		  on
	  RetainRTWFile		  off
	  ProfileTLC		  off
	  TLCDebug		  off
	  TLCCoverage		  off
	  TLCAssert		  off
	  ProcessScriptMode	  "Default"
	  ConfigurationMode	  "Optimized"
	  ConfigAtBuild		  off
	  IncludeHyperlinkInReport off
	  LaunchReport		  off
	  TargetLang		  "C"
	  IncludeBusHierarchyInRTWFileBlockHierarchyMap	off
	  IncludeERTFirstTime	  on
	  Array {
	    Type		    "Handle"
	    Dimension		    2
	    Simulink.CodeAppCC {
	      $ObjectID		      9
	      Array {
		Type			"Cell"
		Dimension		9
		Cell			"IgnoreCustomStorageClasses"
		Cell			"InsertBlockDesc"
		Cell			"SFDataObjDesc"
		Cell			"SimulinkDataObjDesc"
		Cell			"DefineNamingRule"
		Cell			"SignalNamingRule"
		Cell			"ParamNamingRule"
		Cell			"InlinedPrmAccess"
		Cell			"CustomSymbolStr"
		PropName		"DisabledProps"
	      }
	      Version		      "1.2.0"
	      ForceParamTrailComments off
	      GenerateComments	      on
	      IgnoreCustomStorageClasses on
	      IncHierarchyInIds	      off
	      MaxIdLength	      31
	      PreserveName	      off
	      PreserveNameWithParent  off
	      ShowEliminatedStatement off
	      IncAutoGenComments      off
	      SimulinkDataObjDesc     off
	      SFDataObjDesc	      off
	      IncDataTypeInIds	      off
	      PrefixModelToSubsysFcnNames on
	      MangleLength	      1
	      CustomSymbolStrGlobalVar "$R$N$M"
	      CustomSymbolStrType     "$N$R$M"
	      CustomSymbolStrField    "$N$M"
	      CustomSymbolStrFcn      "$R$N$M$F"
	      CustomSymbolStrBlkIO    "rtb_$N$M"
	      CustomSymbolStrTmpVar   "$N$M"
	      CustomSymbolStrMacro    "$R$N$M"
	      DefineNamingRule	      "None"
	      ParamNamingRule	      "None"
	      SignalNamingRule	      "None"
	      InsertBlockDesc	      off
	      SimulinkBlockComments   on
	      EnableCustomComments    off
	      InlinedPrmAccess	      "Literals"
	      ReqsInCode	      off
	    }
	    Simulink.GRTTargetCC {
	      $BackupClass	      "Simulink.TargetCC"
	      $ObjectID		      10
	      Array {
		Type			"Cell"
		Dimension		12
		Cell			"IncludeMdlTerminateFcn"
		Cell			"CombineOutputUpdateFcns"
		Cell			"SuppressErrorStatus"
		Cell			"ERTCustomFileBanners"
		Cell			"GenerateSampleERTMain"
		Cell			"MultiInstanceERTCode"
		Cell			"PurelyIntegerCode"
		Cell			"SupportNonFinite"
		Cell			"SupportComplex"
		Cell			"SupportAbsoluteTime"
		Cell			"SupportContinuousTime"
		Cell			"SupportNonInlinedSFcns"
		PropName		"DisabledProps"
	      }
	      Version		      "1.2.0"
	      TargetFcnLib	      "ansi_tfl_tmw.mat"
	      TargetLibSuffix	      ""
	      TargetPreCompLibLocation ""
	      GenFloatMathFcnCalls    "ANSI_C"
	      UtilityFuncGeneration   "Auto"
	      GenerateFullHeader      on
	      GenerateSampleERTMain   off
	      GenerateTestInterfaces  off
	      IsPILTarget	      off
	      ModelReferenceCompliant on
	      IncludeMdlTerminateFcn  on
	      CombineOutputUpdateFcns off
	      SuppressErrorStatus     off
	      IncludeFileDelimiter    "Auto"
	      ERTCustomFileBanners    off
	      SupportAbsoluteTime     on
	      LogVarNameModifier      "rt_"
	      MatFileLogging	      on
	      MultiInstanceERTCode    off
	      SupportNonFinite	      on
	      SupportComplex	      on
	      PurelyIntegerCode	      off
	      SupportContinuousTime   on
	      SupportNonInlinedSFcns  on
	      EnableShiftOperators    on
	      ParenthesesLevel	      "Nominal"
	      PortableWordSizes	      off
	      ModelStepFunctionPrototypeControlCompliant off
	      ExtMode		      off
	      ExtModeStaticAlloc      off
	      ExtModeTesting	      off
	      ExtModeStaticAllocSize  1000000
	      ExtModeTransport	      0
	      ExtModeMexFile	      "ext_comm"
	      RTWCAPISignals	      off
	      RTWCAPIParams	      off
	      RTWCAPIStates	      off
	      GenerateASAP2	      off
	    }
	    PropName		    "Components"
	  }
	}
	PropName		"Components"
      }
      Name		      "Configuration"
      CurrentDlgPage	      "Solver"
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
  }
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      Constant
      Value		      "1"
      VectorParams1D	      on
      SamplingMode	      "Sample based"
      OutDataTypeMode	      "Inherit from 'Constant value'"
      OutDataType	      "sfix(16)"
      ConRadixGroup	      "Use specified scaling"
      OutScaling	      "2^0"
      SampleTime	      "inf"
      FramePeriod	      "inf"
    }
    Block {
      BlockType		      DiscretePulseGenerator
      PulseType		      "Sample based"
      TimeSource	      "Use simulation time"
      Amplitude		      "1"
      Period		      "2"
      PulseWidth	      "1"
      PhaseDelay	      "0"
      SampleTime	      "1"
      VectorParams1D	      on
    }
    Block {
      BlockType		      Inport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      LatchByDelayingOutsideSignal off
      LatchByCopyingInsideSignal off
      Interpolate	      on
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      Reference
    }
    Block {
      BlockType		      Scope
      ModelBased	      off
      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
      SaveToWorkspace	      off
      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      "FromPortIcon"
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      TreatAsAtomicUnit	      off
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      Terminator
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    UseDisplayTextAsClickCallback off
  }
  LineDefaults {
    FontName		    "Arial"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "warp_timer"
    Location		    [58, 190, 1369, 1018]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
    TiledPageScale	    1
    ShowPageBoundaries	    off
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      " System Generator"
      Tag		      "genX"
      Ports		      []
      Position		      [12, 12, 63, 62]
      ShowName		      off
      AttributesFormatString  "System\\nGenerator"
      UserDataPersistent      on
      UserData		      "DataTag0"
      SourceBlock	      "xbsIndex_r4/ System Generator"
      SourceType	      "Xilinx System Generator Block"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      infoedit		      " System Generator"
      xilinxfamily	      "virtex2p"
      part		      "xc2vp70"
      speed		      "-6"
      package		      "ff1517"
      synthesis_tool	      "XST"
      clock_wrapper	      "Clock Enables"
      directory		      "C:/Documents and Settings/CMC/Desktop/warp_time"
"r_exp"
      testbench		      off
      simulink_period	      "1"
      sysclk_period	      "10"
      dcm_input_clock_period  "100"
      incr_netlist	      off
      trim_vbits	      "Everywhere in SubSystem"
      dbl_ovrd		      "According to Block Masks"
      core_generation	      "According to Block Masks"
      run_coregen	      off
      deprecated_control      off
      eval_field	      "0"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "sysgen"
      block_version	      "8.2"
      sg_icon_stat	      "51,50,-1,-1,red,beige,0,07734"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 51 51 0 ],[0 0 50 50 ],[0.93 0.92 0.86]);\npatch([12 4 16 4 12 25 29 3"
"3 47 36 25 17 29 17 25 36 47 33 29 25 12 ],[5 13 25 37 45 45 41 45 45 34 45 3"
"7 25 13 5 16 5 5 9 5 5 ],[0.6 0.2 0.25]);\nplot([0 0 51 51 0 ],[0 50 50 0 0 ]"
");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
"n text');\nfprintf('','COMMENT: end icon text');\n"
      sg_blockgui_xml	      "<!--  *  Copyright (c) 2005, Xilinx, Inc.  All "
"Rights Reserved.            --><!--  *  Reproduction or reuse, in any form, w"
"ithout the explicit written  --><!--  *  consent of Xilinx, Inc., is strictly"
" prohibited.                  --><sysgenblock has_userdata=\"true\" tag=\"gen"
"X\" block_type=\"sysgen\" simulinkname=\" System Generator\" >\n <icon width="
"\"51\" bg_color=\"beige\" height=\"50\" caption_format=\"System\\nGenerator\""
" wmark_color=\"red\" />\n <callbacks DeleteFcn=\"xlSysgenGUI('delete', gcs, g"
"cbh);\" OpenFcn=\"xlSysgenGUI('startup',gcs,gcbh)\" ModelCloseFcn=\"xlSysgenG"
"UI('Close',gcs,gcbh)\" PostSaveFcn=\"xlSysgenGUI('Save')\" />\n <libraries>\n"
"  <library name=\"xbsIndex\" />\n  <library name=\"xbsBasic\" />\n  <library "
"name=\"xbsTools\" />\n </libraries>\n <subsystem_model file=\"system_generato"
"r_subsystem.mdl\" />\n <blockgui label=\"Xilinx System Generator\" >\n  <edit"
"box evaluate=\"false\" multi_line=\"true\" name=\"infoedit\" read_only=\"true"
"\" default=\" System Generator\" />\n  <editbox evaluate=\"false\" name=\"xil"
"inxfamily\" default=\"Virtex4\" label=\"Xilinx family\" />\n  <editbox evalua"
"te=\"false\" name=\"part\" default=\"xc4vsx35\" label=\"Part\" />\n  <editbox"
" evaluate=\"false\" name=\"speed\" default=\"-10\" label=\"Speed\" />\n  <edi"
"tbox evaluate=\"false\" name=\"package\" default=\"ff668\" label=\"Package\" "
"/>\n  <listbox evaluate=\"true\" name=\"synthesis_tool\" default=\"XST\" labe"
"l=\"Synthesis tool\" >\n   <item value=\"Spectrum\" />\n   <item value=\"Synp"
"lify\" />\n   <item value=\"Synplify Pro\" />\n   <item value=\"XST\" />\n   "
"<item value=\"Precision\" />\n  </listbox>\n  <editbox evaluate=\"false\" nam"
"e=\"directory\" default=\"./netlist\" label=\"Target directory\" />\n  <check"
"box evaluate=\"true\" name=\"testbench\" default=\"off\" label=\"Testbench\" "
"/>\n  <editbox evaluate=\"true\" name=\"simulink_period\" default=\"1\" label"
"=\"Simulink period\" />\n  <editbox evaluate=\"true\" name=\"sysclk_period\" "
"default=\"10\" label=\"System clock period\" />\n  <checkbox evaluate=\"true"
"\" name=\"incr_netlist\" default=\"off\" label=\"Incremental netlisting\" />"
"\n  <listbox evaluate=\"true\" name=\"trim_vbits\" default=\"Everywhere in Su"
"bSystem\" label=\"Trim valid bits\" >\n   <item value=\"According to Block Ma"
"sks\" />\n   <item value=\"Everywhere in SubSystem\" />\n   <item value=\"No "
"Where in SubSystem\" />\n  </listbox>\n  <listbox evaluate=\"true\" name=\"db"
"l_ovrd\" default=\"According to Block Masks\" label=\"Override with doubles\""
" >\n   <item value=\"According to Block Masks\" />\n   <item value=\"Everywhe"
"re in SubSystem\" />\n   <item value=\"No Where in SubSystem\" />\n  </listbo"
"x>\n  <listbox evaluate=\"true\" name=\"core_generation\" default=\"According"
" to Block Masks\" label=\"Generate cores\" >\n   <item value=\"According to B"
"lock Masks\" />\n   <item value=\"Everywhere Available\" />\n   <item value="
"\"Not Needed - Already Generated\" />\n  </listbox>\n  <checkbox evaluate=\"t"
"rue\" name=\"run_coregen\" default=\"off\" label=\"Run CoreGen\" />\n  <check"
"box evaluate=\"true\" name=\"deprecated_control\" default=\"off\" label=\"Sho"
"w deprecated controls\" />\n  <hiddenvar evaluate=\"true\" name=\"eval_field"
"\" default=\"0\" />\n </blockgui>\n</sysgenblock>\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Concat"
      Ports		      [4, 1]
      Position		      [740, 320, 925, 350]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "xbsIndex_r4/Concat"
      SourceType	      "Xilinx Bus Concatenator Block"
      infoedit		      "Concatenates two or more inputs.  Output will b"
"e cast to an unsigned value with the binary point at zero."
      num_inputs	      "4"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "concat"
      block_version	      "9.1.01"
      sg_icon_stat	      "185,30,4,1,white,blue,0,ad63c393,down"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 185 185 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([85 80 87 80 85 93 "
"95 97 105 98 92 87 93 87 92 98 105 97 95 93 85 ],[3 8 15 22 27 27 25 27 27 20"
" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 185 185 0 0 ],[0 0 3"
"0 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b"
"egin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black')"
";port_label('input',4,'lo');\nfprintf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Concat1"
      Ports		      [3, 1]
      Position		      [889, 230, 911, 255]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "xbsIndex_r4/Concat"
      SourceType	      "Xilinx Bus Concatenator Block"
      infoedit		      "Concatenates two or more inputs.  Output will b"
"e cast to an unsigned value with the binary point at zero."
      num_inputs	      "3"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,336,165"
      block_type	      "concat"
      block_version	      "9.1.01"
      sg_icon_stat	      "22,25,1,1,white,blue,0,97cf21e1,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 3"
"8 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 4"
"5 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port"
"_label('input',3,'lo');\nfprintf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Concat2"
      Ports		      [3, 1]
      Position		      [844, 230, 866, 255]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "xbsIndex_r4/Concat"
      SourceType	      "Xilinx Bus Concatenator Block"
      infoedit		      "Concatenates two or more inputs.  Output will b"
"e cast to an unsigned value with the binary point at zero."
      num_inputs	      "3"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,336,165"
      block_type	      "concat"
      block_version	      "9.1.01"
      sg_icon_stat	      "22,25,1,1,white,blue,0,97cf21e1,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 3"
"8 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 4"
"5 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port"
"_label('input',3,'lo');\nfprintf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Concat3"
      Ports		      [3, 1]
      Position		      [799, 230, 821, 255]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "xbsIndex_r4/Concat"
      SourceType	      "Xilinx Bus Concatenator Block"
      infoedit		      "Concatenates two or more inputs.  Output will b"
"e cast to an unsigned value with the binary point at zero."
      num_inputs	      "3"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,336,165"
      block_type	      "concat"
      block_version	      "9.1.01"
      sg_icon_stat	      "22,25,1,1,white,blue,0,97cf21e1,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 3"
"8 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 4"
"5 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port"
"_label('input',3,'lo');\nfprintf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Concat4"
      Ports		      [3, 1]
      Position		      [754, 230, 776, 255]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "xbsIndex_r4/Concat"
      SourceType	      "Xilinx Bus Concatenator Block"
      infoedit		      "Concatenates two or more inputs.  Output will b"
"e cast to an unsigned value with the binary point at zero."
      num_inputs	      "3"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,336,165"
      block_type	      "concat"
      block_version	      "9.1.01"
      sg_icon_stat	      "22,25,1,1,white,blue,0,97cf21e1,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 3"
"8 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 4"
"5 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port"
"_label('input',3,'lo');\nfprintf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      Constant
      Name		      "Constant"
      Position		      [15, 191, 35, 209]
      Value		      "0"
    }
    Block {
      BlockType		      Reference
      Name		      "Constant1"
      Ports		      [0, 1]
      Position		      [410, 205, 445, 225]
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      arith_type	      "Boolean"
      const		      "1"
      n_bits		      "1"
      bin_pt		      "0"
      explicit_period	      off
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is"
" deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,400,346"
      block_type	      "constant"
      block_version	      "8.2"
      sg_icon_stat	      "35,20,0,1,white,blue,0,06094819,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29"
" 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 "
"19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 "
"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
"on text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: "
"end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Constant2"
      Ports		      [0, 1]
      Position		      [410, 420, 445, 440]
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      arith_type	      "Boolean"
      const		      "1"
      n_bits		      "1"
      bin_pt		      "0"
      explicit_period	      off
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is"
" deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "constant"
      block_version	      "8.2"
      sg_icon_stat	      "35,20,0,1,white,blue,0,06094819,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29"
" 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 "
"19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 "
"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
"on text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: "
"end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Constant3"
      Ports		      [0, 1]
      Position		      [410, 635, 445, 655]
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      arith_type	      "Boolean"
      const		      "1"
      n_bits		      "1"
      bin_pt		      "0"
      explicit_period	      off
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is"
" deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "constant"
      block_version	      "8.2"
      sg_icon_stat	      "35,20,0,1,white,blue,0,06094819,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29"
" 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 "
"19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 "
"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
"on text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: "
"end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Constant4"
      Ports		      [0, 1]
      Position		      [410, 850, 445, 870]
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      arith_type	      "Boolean"
      const		      "1"
      n_bits		      "1"
      bin_pt		      "0"
      explicit_period	      off
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is"
" deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "constant"
      block_version	      "8.2"
      sg_icon_stat	      "35,20,0,1,white,blue,0,06094819,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29"
" 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 "
"19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 "
"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
"on text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: "
"end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Constant5"
      Ports		      [0, 1]
      Position		      [810, 395, 845, 415]
      SourceBlock	      "xbsIndex_r4/Constant"
      SourceType	      "Xilinx Constant Block Block"
      arith_type	      "Boolean"
      const		      "1"
      n_bits		      "1"
      bin_pt		      "0"
      explicit_period	      off
      period		      "1"
      dsp48_infoedit	      "The use of this block for DSP48 instructions is"
" deprecated.  Please use the Opmode block."
      equ		      "P=C"
      opselect		      "C"
      inp2		      "PCIN>>17"
      opr		      "+"
      inp1		      "P"
      carry		      "CIN"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,400,346"
      block_type	      "constant"
      block_version	      "8.2"
      sg_icon_stat	      "35,20,0,1,white,blue,0,06094819,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29"
" 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 "
"19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 "
"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
"on text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: "
"end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Convert"
      Ports		      [1, 1]
      Position		      [889, 270, 911, 300]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "xbsIndex_r4/Convert"
      SourceType	      "Xilinx Type Converter Block"
      infoedit		      "Hardware notes: rounding and saturating require"
" hardware resources; truncating and wrapping do not."
      arith_type	      "Unsigned"
      n_bits		      "8"
      bin_pt		      "0"
      quantization	      "Truncate"
      overflow		      "Wrap"
      latency		      "0"
      dbl_ovrd		      off
      pipeline		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,374,375"
      block_type	      "convert"
      block_version	      "9.1.01"
      sg_icon_stat	      "22,30,1,1,white,blue,0,74901e60,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25"
" 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMME"
"NT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Convert1"
      Ports		      [1, 1]
      Position		      [844, 270, 866, 300]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "xbsIndex_r4/Convert"
      SourceType	      "Xilinx Type Converter Block"
      infoedit		      "Hardware notes: rounding and saturating require"
" hardware resources; truncating and wrapping do not."
      arith_type	      "Unsigned"
      n_bits		      "8"
      bin_pt		      "0"
      quantization	      "Truncate"
      overflow		      "Wrap"
      latency		      "0"
      dbl_ovrd		      off
      pipeline		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,374,375"
      block_type	      "convert"
      block_version	      "9.1.01"
      sg_icon_stat	      "22,30,1,1,white,blue,0,74901e60,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25"
" 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMME"
"NT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Convert2"
      Ports		      [1, 1]
      Position		      [799, 270, 821, 300]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "xbsIndex_r4/Convert"
      SourceType	      "Xilinx Type Converter Block"
      infoedit		      "Hardware notes: rounding and saturating require"
" hardware resources; truncating and wrapping do not."
      arith_type	      "Unsigned"
      n_bits		      "8"
      bin_pt		      "0"
      quantization	      "Truncate"
      overflow		      "Wrap"
      latency		      "0"
      dbl_ovrd		      off
      pipeline		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,374,375"
      block_type	      "convert"
      block_version	      "9.1.01"
      sg_icon_stat	      "22,30,1,1,white,blue,0,74901e60,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25"
" 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMME"
"NT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Convert3"
      Ports		      [1, 1]
      Position		      [754, 270, 776, 300]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "xbsIndex_r4/Convert"
      SourceType	      "Xilinx Type Converter Block"
      infoedit		      "Hardware notes: rounding and saturating require"
" hardware resources; truncating and wrapping do not."
      arith_type	      "Unsigned"
      n_bits		      "8"
      bin_pt		      "0"
      quantization	      "Truncate"
      overflow		      "Wrap"
      latency		      "0"
      dbl_ovrd		      off
      pipeline		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,374,375"
      block_type	      "convert"
      block_version	      "9.1.01"
      sg_icon_stat	      "22,30,1,1,white,blue,0,74901e60,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25"
" 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMME"
"NT: end icon text');\n"
    }
    Block {
      BlockType		      SubSystem
      Name		      "EDK Processor"
      Ports		      []
      Position		      [15, 98, 64, 149]
      CopyFcn		      "xlProcBlockCopyCallback(gcbh);xlBlockMoveCallba"
"ck(gcbh);"
      DeleteFcn		      "xlDestroyGui(gcbh);"
      LoadFcn		      "xlBlockLoadCallback(gcbh);"
      ModelCloseFcn	      "xlDestroyGui(gcbh);"
      PreSaveFcn	      "xlBlockPreSaveCallback(gcbh);"
      PostSaveFcn	      "xlBlockPostSaveCallback(gcbh);"
      DestroyFcn	      "xlDestroyGui(gcbh);"
      OpenFcn		      "bh=gcbh;xlProcBlockCallbacks('populatesharedmem"
"orylistbox',bh);xlOpenGui(bh, 'edkprocessor_gui.xml', @xlProcBlockEnablement,"
" @xlProcBlockAction)"
      CloseFcn		      "xlDestroyGui(gcbh);"
      MoveFcn		      "xlBlockMoveCallback(gcbh);"
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      MaskHideContents	      off
      MaskType		      "Xilinx EDK Processor Block"
      MaskDescription	      "Xilinx EDK Processor"
      MaskHelp		      "eval('');xlDoc('-book','sysgen','-topic','EDK_P"
"rocessor');"
      MaskPromptString	      "Configure Processor for|EDK Project| |Available"
" Memories| | |Bus Type|Base Address| |Lock| |Dual Clocks|Constraint file| |In"
"herit Device Type| | | | | | | | | | | | | | | | | | "
      MaskStyleString	      "popup(EDK pcore generation|HDL netlisting),edit"
",edit,popup(<empty>),edit,edit,popup(PLB|FSL),edit,edit,checkbox,edit,checkbo"
"x,edit,edit,checkbox,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,e"
"dit,edit,edit,edit,edit,edit,edit"
      MaskTunableValueString  "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
",on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
      MaskCallbackString      "||||||||||||||||||||||||||||||||"
      MaskEnableString	      "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
",on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
      MaskVisibilityString    "on,on,off,on,on,off,on,on,off,on,off,on,on,off,"
"on,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off"
      MaskToolTipString	      "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
",on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
      MaskVarAliasString      ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
      MaskVariables	      "mode=&1;xmp=&2;MemVisToProc=&3;AvailableMemorie"
"s=&4;portInterfaceTable=&5;bus_type_sgadvanced=&6;bus_type=@7;baseaddr=&8;bas"
"eaddr_lock_sgadvanced=&9;baseaddr_lock=@10;dual_clock_sgadvanced=&11;dual_clo"
"ck=@12;ucf_file=&13;inheritDeviceType_sgadvanced=&14;inheritDeviceType=@15;cl"
"ock_name=&16;internalPortList=&17;resetPolarity=&18;memxtable=&19;procinfo=&2"
"0;fslifaceports=&21;memmapdirty=&22;blockname=&23;xpsintstyle=&24;proc=&25;ha"
"s_advanced_control=@26;sggui_pos=&27;block_type=&28;block_version=&29;sg_icon"
"_stat=&30;sg_mask_display=&31;sg_list_contents=&32;sg_blockgui_xml=&33;"
      MaskInitialization      "try\n  tmp_gcb = gcb;\n  tmp_gcbh = gcbh;\n  if"
" (strcmp('SysGenIndex',get_param(bdroot(tmp_gcbh),'tag')) && ~isempty(regexp("
"bdroot(tmp_gcb), '^xbs', 'once')))\n    return;\n  end;\n  xlMungeMaskParams;"
"\n  serialized_declarations = '{}';\n  xledkprocessor_init();\n  ptable_ = xl"
"blockprep(get_param(tmp_gcb, 'MaskWSVariables'));\ncatch\n  global dbgsysgen;"
"\n  if(~isempty(dbgsysgen) && dbgsysgen)\n    e = regexprep(lasterr, '\\n', '"
"\\nError: ');\n    disp(['Error: While running MaskInit code on block ' tmp_g"
"cb ': ' e]);\n    error(e);\n  end\nend\n"
      MaskDisplay	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 49 49 0 ],[0 0 51 51 ],[0.77 0.82 0.91]);\npatch([11 3 14 3 11 24 28 3"
"2 46 35 25 17 27 17 25 35 46 32 28 24 11 ],[6 14 25 36 44 44 40 44 44 33 43 3"
"5 25 15 7 17 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 49 49 0 0 ],[0 0 51 51 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ndisp('MicroBlaze');\n\nfprintf('','COMMENT: end icon text');\n"
      MaskSelfModifiable      on
      MaskIconFrame	      off
      MaskIconOpaque	      on
      MaskIconRotate	      "none"
      MaskIconUnits	      "autoscale"
      MaskValueString	      "EDK pcore generation||<qt bgcolor=\"#FFFFFF\"><"
"div><img src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\"
"images\\registerplus.gif\"> &lt;&lt;timer0_countTo&gt;&gt;<br></div><div><img"
" src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\"
"registerplus.gif\"> &lt;&lt;timer0_timeLeft&gt;&gt;<br></div><div><img src=\""
"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registe"
"rplus.gif\"> &lt;&lt;timer1_countTo&gt;&gt;<br></div><div><img src=\"C:\\Xili"
"nx_101\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gi"
"f\"> &lt;&lt;timer1_timeLeft&gt;&gt;<br></div><div><img src=\"C:\\Xilinx_101"
"\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> &"
"lt;&lt;timer2_countTo&gt;&gt;<br></div><div><img src=\"C:\\Xilinx_101\\DSP_To"
"ols\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> &lt;&lt;t"
"imer2_timeLeft&gt;&gt;<br></div><div><img src=\"C:\\Xilinx_101\\DSP_Tools\\co"
"mmon\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> &lt;&lt;timer3_c"
"ountTo&gt;&gt;<br></div><div><img src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bi"
"n\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> &lt;&lt;timer3_timeLeft&"
"gt;&gt;<br></div><div><img src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\"
"..\\sysgen\\data\\images\\registerplus.gif\"> &lt;&lt;timer_control_r&gt;&gt;"
"<br></div><div><img src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\..\\sys"
"gen\\data\\images\\registerplus.gif\"> &lt;&lt;timer_control_w&gt;&gt;<br></d"
"iv><div><img src=\"C:\\Xilinx_101\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\da"
"ta\\images\\registerplus.gif\"> &lt;&lt;timer_status&gt;&gt;<br></div></qt>|<"
"empty>|{'exposed'=>[],'portdir'=>[],'portname'=>[],'shortname'=>[]}||PLB|0x80"
"000000||off||off|||off|plb|{}|0|{'mlist'=>['warp_timer/From Register1','warp_"
"timer/To Register','warp_timer/From Register3','warp_timer/To Register1','war"
"p_timer/From Register4','warp_timer/To Register2','warp_timer/From Register5'"
",'warp_timer/To Register3','warp_timer/timer_control/To Register5','warp_time"
"r/timer_control/From Register2','warp_timer/To Register4'],'mlname'=>['\\'tim"
"er0_countTo\\'','\\'timer0_timeLeft\\'','\\'timer1_countTo\\'','\\'timer1_tim"
"eLeft\\'','\\'timer2_countTo\\'','\\'timer2_timeLeft\\'','\\'timer3_countTo\\"
"'','\\'timer3_timeLeft\\'','\\'timer_control_r\\'','\\'timer_control_w\\'','"
"\\'timer_status\\''],'mlstate'=>[0.00000000000000000,0.00000000000000000,0.00"
"000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0"
".00000000000000000,0.00000000000000000,0.00000000000000000,0.0000000000000000"
"0,0.00000000000000000]}|{'xmliface'=>'Xilinx//microblaze//iface.xml'}|[0,0]|o"
"ff||default||0|35,24,383,441|edkprocessor|2.4|49,51,-1,-1,white,blue,0,07734,"
"right|fprintf('','COMMENT: begin icon graphics');\npatch([0 49 49 0 ],[0 0 51"
" 51 ],[0.77 0.82 0.91]);\npatch([11 3 14 3 11 24 28 32 46 35 25 17 27 17 25 3"
"5 46 32 28 24 11 ],[6 14 25 36 44 44 40 44 44 33 43 35 25 15 7 17 6 6 10 6 6 "
"],[0.98 0.96 0.92]);\nplot([0 49 49 0 0 ],[0 0 51 51 0 ]);\nfprintf('','COMME"
"NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf(''"
",'COMMENT: end icon text');\n|{'table'=>{'AvailableMemories'=>'popup(<empty>)"
"','userSelections'=>{'AvailableMemories'=>'<empty>'}}}|"
      MaskTabNameString	      ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
      System {
	Name			"EDK Processor"
	Location		[514, 109, 754, 491]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Constant
	  Name			  "Constant"
	  Position		  [40, 100, 60, 120]
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant1"
	  Position		  [40, 160, 60, 180]
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant2"
	  Position		  [40, 220, 60, 240]
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant3"
	  Position		  [40, 280, 60, 300]
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant4"
	  Position		  [40, 335, 60, 355]
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant5"
	  Ports			  [0, 1]
	  Position		  [20, 32, 75, 58]
	  ShowName		  off
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Unsigned"
	  const			  "0"
	  n_bits		  "1"
	  bin_pt		  "0"
	  explicit_period	  "on"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "55,26,1,1,white,blue,0,72d575a1,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMME"
"NT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "Sl_wait"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Constant
	  Name			  "Constant6"
	  Position		  [40, 455, 60, 475]
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register"
	  Ports			  [0, 1]
	  Position		  [260, 522, 320, 578]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Bl"
"ock"
	  infoedit		  "Register block that reads data to a shared "
"memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer0_timeLeft'"
	  init			  "0"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  ownership		  "Owned and initialized elsewhere"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,4b212927,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
"COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer0_timeLeft_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register1"
	  Ports			  [0, 1]
	  Position		  [260, 612, 320, 668]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Bl"
"ock"
	  infoedit		  "Register block that reads data to a shared "
"memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer1_timeLeft'"
	  init			  "0"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  ownership		  "Owned and initialized elsewhere"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,4b212927,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
"COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer1_timeLeft_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register2"
	  Ports			  [0, 1]
	  Position		  [260, 697, 320, 753]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Bl"
"ock"
	  infoedit		  "Register block that reads data to a shared "
"memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer2_timeLeft'"
	  init			  "0"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  ownership		  "Owned and initialized elsewhere"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,4b212927,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
"COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer2_timeLeft_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register3"
	  Ports			  [0, 1]
	  Position		  [260, 782, 320, 838]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Bl"
"ock"
	  infoedit		  "Register block that reads data to a shared "
"memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer3_timeLeft'"
	  init			  "0"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  ownership		  "Owned and initialized elsewhere"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,4b212927,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
"COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer3_timeLeft_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register4"
	  Ports			  [0, 1]
	  Position		  [260, 872, 320, 928]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Bl"
"ock"
	  infoedit		  "Register block that reads data to a shared "
"memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer_control_r'"
	  init			  "0"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  ownership		  "Owned and initialized elsewhere"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,4b212927,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
"COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer_control_r_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register5"
	  Ports			  [0, 1]
	  Position		  [260, 957, 320, 1013]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Bl"
"ock"
	  infoedit		  "Register block that reads data to a shared "
"memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer_status'"
	  init			  "0"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  ownership		  "Owned and initialized elsewhere"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "fromreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,4b212927,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
"COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer_status_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "PLB_ABus"
	  Ports			  [1, 1]
	  Position		  [110, 160, 175, 180]
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type "
"Simulink integer, double and fixed point to  Xilinx fixed point type.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level input ports."
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  dbl_ovrd		  "off"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'PLB_ABus'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "65,20,1,1,white,yellow,0,bc55d28f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "PLB_ABus"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "PLB_PAValid"
	  Ports			  [1, 1]
	  Position		  [110, 220, 175, 240]
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type "
"Simulink integer, double and fixed point to  Xilinx fixed point type.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level input ports."
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  dbl_ovrd		  "off"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'PLB_PAValid'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "65,20,1,1,white,yellow,0,bc55d28f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "PLB_PAValid"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "PLB_RNW"
	  Ports			  [1, 1]
	  Position		  [110, 280, 175, 300]
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type "
"Simulink integer, double and fixed point to  Xilinx fixed point type.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level input ports."
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  dbl_ovrd		  "off"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'PLB_RNW'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "65,20,1,1,white,yellow,0,bc55d28f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "PLB_RNW"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "PLB_wrDBus"
	  Ports			  [1, 1]
	  Position		  [110, 335, 175, 355]
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type "
"Simulink integer, double and fixed point to  Xilinx fixed point type.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level input ports."
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  dbl_ovrd		  "off"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'PLB_wrDBus'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "65,20,1,1,white,yellow,0,bc55d28f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "PLB_wrDBus"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "SPLB_Rst"
	  Ports			  [1, 1]
	  Position		  [110, 100, 175, 120]
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type "
"Simulink integer, double and fixed point to  Xilinx fixed point type.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level input ports."
	  arith_type		  "Unsigned"
	  n_bits		  "1"
	  bin_pt		  "0"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  dbl_ovrd		  "off"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'SPLB_Rst'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "65,20,1,1,white,yellow,0,bc55d28f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "SPLB_Rst"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_addrAck"
	  Ports			  [1, 1]
	  Position		  [460, 135, 520, 155]
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed p"
"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
"P>Hardware notes:  In hardware these blocks become top level output ports or "
"are discarded, depending on how they are configured."
	  hdl_port		  "on"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'Sl_addrAck'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,20,1,1,white,yellow,0,38220381,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_rdComp"
	  Ports			  [1, 1]
	  Position		  [460, 185, 520, 205]
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed p"
"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
"P>Hardware notes:  In hardware these blocks become top level output ports or "
"are discarded, depending on how they are configured."
	  hdl_port		  "on"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'Sl_rdComp'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,20,1,1,white,yellow,0,38220381,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_rdDAck"
	  Ports			  [1, 1]
	  Position		  [460, 350, 520, 370]
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed p"
"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
"P>Hardware notes:  In hardware these blocks become top level output ports or "
"are discarded, depending on how they are configured."
	  hdl_port		  "on"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'Sl_rdDAck'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,20,1,1,white,yellow,0,38220381,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_rdDBus"
	  Ports			  [1, 1]
	  Position		  [460, 410, 520, 430]
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed p"
"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
"P>Hardware notes:  In hardware these blocks become top level output ports or "
"are discarded, depending on how they are configured."
	  hdl_port		  "on"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'Sl_rdDBus'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,20,1,1,white,yellow,0,38220381,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_wait"
	  Ports			  [1, 1]
	  Position		  [110, 30, 170, 50]
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed p"
"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
"P>Hardware notes:  In hardware these blocks become top level output ports or "
"are discarded, depending on how they are configured."
	  hdl_port		  "on"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'Sl_wait'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,20,1,1,white,yellow,0,38220381,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_wrComp"
	  Ports			  [1, 1]
	  Position		  [460, 285, 520, 305]
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed p"
"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
"P>Hardware notes:  In hardware these blocks become top level output ports or "
"are discarded, depending on how they are configured."
	  hdl_port		  "on"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'Sl_wrComp'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,20,1,1,white,yellow,0,38220381,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Sl_wrDAck"
	  Ports			  [1, 1]
	  Position		  [460, 235, 520, 255]
	  SourceBlock		  "xbsIndex_r4/Gateway Out"
	  SourceType		  "Xilinx Gateway Out Block"
	  infoedit		  "Gateway out block.  Converts Xilinx fixed p"
"oint inputs into ouputs of type Simulink integer, double, or fixed point.<P><"
"P>Hardware notes:  In hardware these blocks become top level output ports or "
"are discarded, depending on how they are configured."
	  hdl_port		  "on"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'Sl_wrDAck'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayout"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,20,1,1,white,yellow,0,38220381,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2"
"9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator"
	  Position		  [630, 135, 650, 155]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator1"
	  Position		  [630, 185, 650, 205]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator2"
	  Position		  [630, 350, 650, 370]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator3"
	  Position		  [630, 400, 650, 420]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator4"
	  Position		  [280, 30, 300, 50]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator5"
	  Position		  [630, 235, 650, 255]
	  ShowName		  off
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator6"
	  Position		  [630, 285, 650, 305]
	  ShowName		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register"
	  Ports			  [2, 1]
	  Position		  [610, 452, 670, 508]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Bloc"
"k"
	  infoedit		  "Register block that writes data to a shared"
" memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer0_countTo'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  "on"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,77cabcdf,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
"fprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer0_countTo_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register1"
	  Ports			  [2, 1]
	  Position		  [610, 537, 670, 593]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Bloc"
"k"
	  infoedit		  "Register block that writes data to a shared"
" memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer1_countTo'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  "on"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,77cabcdf,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
"fprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer1_countTo_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register2"
	  Ports			  [2, 1]
	  Position		  [610, 627, 670, 683]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Bloc"
"k"
	  infoedit		  "Register block that writes data to a shared"
" memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer2_countTo'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  "on"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,77cabcdf,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
"fprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer2_countTo_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register3"
	  Ports			  [2, 1]
	  Position		  [610, 712, 670, 768]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Bloc"
"k"
	  infoedit		  "Register block that writes data to a shared"
" memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer3_countTo'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  "on"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,77cabcdf,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
"fprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer3_countTo_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register4"
	  Ports			  [2, 1]
	  Position		  [610, 797, 670, 853]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Bloc"
"k"
	  infoedit		  "Register block that writes data to a shared"
" memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer_control_w'"
	  init			  "0"
	  ownership		  "Owned and initialized elsewhere"
	  explicit_data_type	  "on"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "toreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,77cabcdf,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
"fprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "timer_control_w_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "plb_decode"
	  Ports			  [7, 9]
	  Position		  [205, 84, 375, 496]
	  SourceBlock		  "xbsIndex_r4/MCode"
	  SourceType		  "Xilinx MCode Block Block"
	  infoedit		  "Pass input values to a MATLAB function for "
"evaluation in Xilinx fixed-point type. The input ports of the block are input"
" arguments of the function. The output ports of the block are output argument"
"s of the function."
	  mfname		  "xlmax"
	  explicit_period	  "off"
	  period		  "1"
	  dbl_ovrd		  "off"
	  enable_stdout		  "off"
	  enable_debug		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  mfilecontent		  "function [wrDBusReg, addrAck, rdComp, wrDAc"
"k, bankAddr, RNWReg, rdDAck, rdDBus, linearAddr] = ...\n    plb_bus_decode(pl"
"bRst, plbABus, plbPAValid, plbRNW, plbWrDBus, rdData, addrPref)\n\n% constant"
" variables (TODO: should pass from outside)\nADDRPREF_LEN = 20;\nBANKADDR_LEN"
" = 2;\nLINEARADDR_LEN = 8;\nABUS_LEN = 32;\nDBUS_LEN = 32;\n\n% declare and i"
"nitialize persistent variables\n% register input bus signals\npersistent plbR"
"stReg_, plbRstReg_ = xl_state(0, {xlBoolean});\npersistent plbABusReg_, plbAB"
"usReg_ = xl_state(0, {xlUnsigned, ABUS_LEN, 0});\npersistent plbPAValidReg_, "
"plbPAValidReg_ = xl_state(0, {xlBoolean});\npersistent plbRNWReg_, plbRNWReg_"
" = xl_state(0, {xlUnsigned, 1, 0});\npersistent plbWrDBusReg_, plbWrDBusReg_ "
"= xl_state(0, {xlUnsigned, DBUS_LEN, 0});\n\n% ===== rest of the outputs ===="
"=\n\nbankAddr   = xl_slice(plbABusReg_, 2+BANKADDR_LEN+LINEARADDR_LEN-1, 2+LI"
"NEARADDR_LEN);\nlinearAddr = xl_slice(plbABusReg_, 2+LINEARADDR_LEN-1, 2);\nR"
"NWReg = plbRNWReg_;\nwrDBusReg = plbWrDBusReg_;\n\n% ===== p_select =====\n\n"
"% register PAValid\npersistent aValidReg, aValidReg = xl_state(0, {xlBoolean}"
");\naValidReg = plbPAValidReg_;\n\n% extract and register the address prefix"
"\naddrPref_in = xl_slice(plbABusReg_, xl_nbits(plbABusReg_)-1, xl_nbits(plbAB"
"usReg_)-ADDRPREF_LEN);\nif addrPref_in == addrPref\n    ps1 = true;\nelse \n "
"   ps1 = false;\nend \n\npersistent ps1Reg, ps1Reg = xl_state(0, ps1);\nps1Re"
"g = ps1;\n\nps = xl_and(ps1Reg, aValidReg);\n\n% ===== addrAck =====\n\n% reg"
"ister ps\npersistent psReg, psReg = xl_state(0, ps);\n\naddrAck = xfix({xlUns"
"igned, 1, 0}, xl_and(xl_not(plbRstReg_), ps, xl_not(psReg)));\n\npsReg = ps;"
"\n\n% ===== rdComp, rd/wr DAck =====\n \nrdComp1 = xfix({xlUnsigned, 1, 0}, x"
"l_and(addrAck, RNWReg));\n\nNUM_rdCompDelay = 3;\npersistent rdCompDelay, rdC"
"ompDelay = xl_state(zeros(1, NUM_rdCompDelay), rdComp1, NUM_rdCompDelay);\nrd"
"Comp2 = rdCompDelay.back;\nrdCompDelay.push_front_pop_back(rdComp1);\n\npersi"
"stent rdCompReg, rdCompReg = xl_state(0, rdComp1);\nrdComp = rdCompReg;\nrdCo"
"mpReg = rdComp2;\n\npersistent rdDAckReg, rdDAckReg = xl_state(0, rdComp1);\n"
"rdDAck = rdDAckReg;\nrdDAckReg = rdComp;\n\npersistent wrDAckReg, wrDAckReg ="
" xl_state(0, addrAck);\nwrDAck = wrDAckReg;\nwrDAckReg = xl_and(addrAck, xl_n"
"ot(RNWReg));\n\n% ===== rdDBus =====\n\nrdSel = xl_or(rdComp2, rdComp);\n\nif"
" rdSel == 1\n    rdDBus1 = rdData;\nelse\n    rdDBus1 = 0;\nend % if\n\npersi"
"stent rdDBusReg, rdDBusReg = xl_state(0, rdDBus1);\nrdDBus = rdDBusReg;\nrdDB"
"usReg = rdDBus1;\n\n% rdDBus = xl_concat(rdDBus32, rdDBus32);\n% rdDBus = rdD"
"Bus32;\n\n% ===== update the persistent variables =====\n\nplbRstReg_ = plbRs"
"t;\nplbABusReg_ = plbABus;\nplbPAValidReg_ = plbPAValid;\nplbRNWReg_ = plbRNW"
";\nplbWrDBusReg_ = xl_slice(plbWrDBus, DBUS_LEN-1, 0);\n"
	  suppress_output	  "1"
	  defparams		  "{}"
	  hide_port_list	  "{}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mcode"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "170,412,1,1,white,blue,0,8b15b975,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 170 170 0 ],[0 0 412 412 ],[0.77 0.82 0.91]);\npatch([40 12 52 12 "
"40 85 97 109 157 119 83 57 97 57 83 119 157 109 97 85 40 ],[139 167 207 247 2"
"75 275 263 275 275 237 273 247 207 167 141 177 139 139 151 139 139 ],[0.98 0."
"96 0.92]);\nplot([0 170 170 0 0 ],[0 0 412 412 0 ]);\nfprintf('','COMMENT: en"
"d icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');p"
"ort_label('input',1,'plbRst');\ncolor('black');port_label('input',2,'plbABus'"
");\ncolor('black');port_label('input',3,'plbPAValid');\ncolor('black');port_l"
"abel('input',4,'plbRNW');\ncolor('black');port_label('input',5,'plbWrDBus');"
"\ncolor('black');port_label('input',6,'rdData');\ncolor('black');port_label('"
"input',7,'addrPref');\ncolor('black');port_label('output',1,'wrDBusReg');\nco"
"lor('black');port_label('output',2,'addrAck');\ncolor('black');port_label('ou"
"tput',3,'rdComp');\ncolor('black');port_label('output',4,'wrDAck');\ncolor('b"
"lack');port_label('output',5,'bankAddr');\ncolor('black');port_label('output'"
",6,'RNWReg');\ncolor('black');port_label('output',7,'rdDAck');\ncolor('black'"
");port_label('output',8,'rdDBus');\ncolor('black');port_label('output',9,'lin"
"earAddr');\ncolor('black');disp('\\bf{xlmax}','texmode','on');\nfprintf('','C"
"OMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "wrDBusReg"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    2
	    Name		    "Sl_addrAck"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    3
	    Name		    "Sl_rdComp"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    4
	    Name		    "Sl_wrDAck"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    5
	    Name		    "bankAddr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    6
	    Name		    "RNWReg"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    7
	    Name		    "Sl_rdDAck"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    8
	    Name		    "Sl_rdDBus"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    9
	    Name		    "linearAddr"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "plb_memmap"
	  Ports			  [16, 11]
	  Position		  [405, 477, 575, 728]
	  SourceBlock		  "xbsIndex_r4/MCode"
	  SourceType		  "Xilinx MCode Block Block"
	  infoedit		  "Pass input values to a MATLAB function for "
"evaluation in Xilinx fixed-point type. The input ports of the block are input"
" arguments of the function. The output ports of the block are output argument"
"s of the function."
	  mfname		  "xlmax"
	  explicit_period	  "off"
	  period		  "1"
	  dbl_ovrd		  "off"
	  enable_stdout		  "off"
	  enable_debug		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  mfilecontent		  "function [read_bank_out, sm_timer0_countTo_"
"din, sm_timer0_countTo_en, sm_timer1_countTo_din, sm_timer1_countTo_en, sm_ti"
"mer2_countTo_din, sm_timer2_countTo_en, sm_timer3_countTo_din, sm_timer3_coun"
"tTo_en, sm_timer_control_w_din, sm_timer_control_w_en] = plb_memmap_select(wr"
"DBus, bankAddr, linearAddr, RNWReg, addrAck, sm_timer0_timeLeft, sm_timer1_ti"
"meLeft, sm_timer2_timeLeft, sm_timer3_timeLeft, sm_timer_control_r, sm_timer_"
"status, sm_timer0_countTo, sm_timer1_countTo, sm_timer2_countTo, sm_timer3_co"
"untTo, sm_timer_control_w)\n\n\n% connvert the input data to UFix_32_0 (the b"
"us data type)\n% 'From Register' blocks\n% sm_timer0_timeLeft_bus = xfix({xlU"
"nsigned, 32, 0}, 0);\nsm_timer0_timeLeft_bus = xl_force(sm_timer0_timeLeft, x"
"lUnsigned, 0);\n\n% sm_timer1_timeLeft_bus = xfix({xlUnsigned, 32, 0}, 0);\ns"
"m_timer1_timeLeft_bus = xl_force(sm_timer1_timeLeft, xlUnsigned, 0);\n\n% sm_"
"timer2_timeLeft_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_timer2_timeLeft_bus ="
" xl_force(sm_timer2_timeLeft, xlUnsigned, 0);\n\n% sm_timer3_timeLeft_bus = x"
"fix({xlUnsigned, 32, 0}, 0);\nsm_timer3_timeLeft_bus = xl_force(sm_timer3_tim"
"eLeft, xlUnsigned, 0);\n\n% sm_timer_control_r_bus = xfix({xlUnsigned, 32, 0}"
", 0);\nsm_timer_control_r_bus = xl_force(sm_timer_control_r, xlUnsigned, 0);"
"\n\n% sm_timer_status_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_timer_status_bu"
"s = xl_force(sm_timer_status, xlUnsigned, 0);\n\n% 'To Register' blocks\n% sm"
"_timer0_countTo_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_timer0_countTo_dout "
"= xl_force(sm_timer0_countTo, xlUnsigned, 0);\n\n% sm_timer1_countTo_dout = x"
"fix({xlUnsigned, 32, 0}, 0);\nsm_timer1_countTo_dout = xl_force(sm_timer1_cou"
"ntTo, xlUnsigned, 0);\n\n% sm_timer2_countTo_dout = xfix({xlUnsigned, 32, 0},"
" 0);\nsm_timer2_countTo_dout = xl_force(sm_timer2_countTo, xlUnsigned, 0);\n"
"\n% sm_timer3_countTo_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_timer3_countTo"
"_dout = xl_force(sm_timer3_countTo, xlUnsigned, 0);\n\n% sm_timer_control_w_d"
"out = xfix({xlUnsigned, 32, 0}, 0);\nsm_timer_control_w_dout = xl_force(sm_ti"
"mer_control_w, xlUnsigned, 0);\n\n% 'From FIFO' blocks\n% 'To FIFO' blocks\n%"
" 'Shared Memory' blocks\n\n% 'dout' ports of 'From Register' blocks\n\n% regi"
"stered register mux output\npersistent reg_bank_out_reg; reg_bank_out_reg = x"
"l_state(0, {xlUnsigned, 32, 0});\nreg_bank_out = reg_bank_out_reg;\n\nif line"
"arAddr == 5\n    reg_bank_out_reg = sm_timer0_timeLeft_bus;\nelseif linearAdd"
"r == 6\n    reg_bank_out_reg = sm_timer1_timeLeft_bus;\nelseif linearAddr == "
"7\n    reg_bank_out_reg = sm_timer2_timeLeft_bus;\nelseif linearAddr == 8\n  "
"  reg_bank_out_reg = sm_timer3_timeLeft_bus;\nelseif linearAddr == 9\n    reg"
"_bank_out_reg = sm_timer_control_r_bus;\nelseif linearAddr == 10\n    reg_ban"
"k_out_reg = sm_timer_status_bus;\nelseif linearAddr == 0\n    reg_bank_out_re"
"g = sm_timer0_countTo_dout;\nelseif linearAddr == 1\n    reg_bank_out_reg = s"
"m_timer1_countTo_dout;\nelseif linearAddr == 2\n    reg_bank_out_reg = sm_tim"
"er2_countTo_dout;\nelseif linearAddr == 3\n    reg_bank_out_reg = sm_timer3_c"
"ountTo_dout;\nelseif linearAddr == 4\n    reg_bank_out_reg = sm_timer_control"
"_w_dout;\nend\n\n\n% 'From FIFO' and 'To FIFO' blocks\n\n\n\n\n\nopCode = xl_"
"concat(addrAck, RNWReg, bankAddr, linearAddr);\n\n% 'Shared Memory' blocks\n"
"\n\n\n\n\n% 'din' ports of 'Shared Memory' blocks\n\n\n% 'we' ports of 'Share"
"d Memory' blocks\n\n\n% 'addr' ports of 'Shared Memory' blocks\n\n\n% 're' po"
"rts of 'From FIFO' blocks\n\n\n% 'en' ports of 'To Register' blocks\nif opCod"
"e == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n                       xfix"
"({xlUnsigned, xl_nbits(linearAddr), 0}, 0))\n    sm_timer0_countTo_en = true;"
"\nelse\n    sm_timer0_countTo_en = false;\nend\nif opCode == xl_concat(xfix({"
"xlUnsigned, 4, 0}, 10), ...\n                       xfix({xlUnsigned, xl_nbit"
"s(linearAddr), 0}, 1))\n    sm_timer1_countTo_en = true;\nelse\n    sm_timer1"
"_countTo_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10"
"), ...\n                       xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 2)"
")\n    sm_timer2_countTo_en = true;\nelse\n    sm_timer2_countTo_en = false;"
"\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n            "
"           xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 3))\n    sm_timer3_cou"
"ntTo_en = true;\nelse\n    sm_timer3_countTo_en = false;\nend\nif opCode == x"
"l_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n                       xfix({xlUn"
"signed, xl_nbits(linearAddr), 0}, 4))\n    sm_timer_control_w_en = true;\nels"
"e\n    sm_timer_control_w_en = false;\nend\n\n\n% 'din' ports of 'To FIFO' bl"
"ocks\n\n\n% 'we' ports of 'To FIFO' blocks\n\n\n% 'din' ports of 'To Register"
"' blocks\nsm_timer0_countTo_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n"
"                                 xlUnsigned, ...\n                           "
"      0);\nsm_timer1_countTo_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ..."
"\n                                 xlUnsigned, ...\n                         "
"        0);\nsm_timer2_countTo_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), .."
".\n                                 xlUnsigned, ...\n                        "
"         0);\nsm_timer3_countTo_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ."
"..\n                                 xlUnsigned, ...\n                       "
"          0);\nsm_timer_control_w_din = xl_force(xl_slice(wrDBus, 32 - 1, 0),"
" ...\n                                 xlUnsigned, ...\n                     "
"            0);\n\n\npersistent read_bank_out_reg; read_bank_out_reg = xl_sta"
"te(0, {xlUnsigned, 32, 0});\nread_bank_out = read_bank_out_reg;\n\npersistent"
" bankAddr_reg; bankAddr_reg = xl_state(0, bankAddr);\n\nif bankAddr_reg == 0"
"\n    % Bank 0: Shared Memories\n    read_bank_out_reg = 0;\nelseif bankAddr_"
"reg == 1\n    % Bank 1: From/To FIFOs\n    read_bank_out_reg =  0;\nelseif ba"
"nkAddr_reg == 2\n    % Bank 1: From/To Registers\n    read_bank_out_reg = reg"
"_bank_out;\nelseif bankAddr_reg == 3\n    % Bank 1: Configure Registers\n    "
"read_bank_out_reg = 0;\nend\n\nbankAddr_reg = bankAddr;\n"
	  suppress_output	  "1"
	  defparams		  "{}"
	  hide_port_list	  "{}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mcode"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "170,251,1,1,white,blue,0,90fea270,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 170 170 0 ],[0 0 251 251 ],[0.77 0.82 0.91]);\npatch([40 12 52 12 "
"40 85 97 109 157 119 83 57 97 57 83 119 157 109 97 85 40 ],[59 87 127 167 195"
" 195 183 195 195 157 193 167 127 87 61 97 59 59 71 59 59 ],[0.98 0.96 0.92]);"
"\nplot([0 170 170 0 0 ],[0 0 251 251 0 ]);\nfprintf('','COMMENT: end icon gra"
"phics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label("
"'input',1,'wrDBus');\ncolor('black');port_label('input',2,'bankAddr');\ncolor"
"('black');port_label('input',3,'linearAddr');\ncolor('black');port_label('inp"
"ut',4,'RNWReg');\ncolor('black');port_label('input',5,'addrAck');\ncolor('bla"
"ck');port_label('input',6,'sm_timer0_timeLeft');\ncolor('black');port_label('"
"input',7,'sm_timer1_timeLeft');\ncolor('black');port_label('input',8,'sm_time"
"r2_timeLeft');\ncolor('black');port_label('input',9,'sm_timer3_timeLeft');\nc"
"olor('black');port_label('input',10,'sm_timer_control_r');\ncolor('black');po"
"rt_label('input',11,'sm_timer_status');\ncolor('black');port_label('input',12"
",'sm_timer0_countTo');\ncolor('black');port_label('input',13,'sm_timer1_count"
"To');\ncolor('black');port_label('input',14,'sm_timer2_countTo');\ncolor('bla"
"ck');port_label('input',15,'sm_timer3_countTo');\ncolor('black');port_label('"
"input',16,'sm_timer_control_w');\ncolor('black');port_label('output',1,'read_"
"bank_out');\ncolor('black');port_label('output',2,'sm_timer0_countTo_din');\n"
"color('black');port_label('output',3,'sm_timer0_countTo_en');\ncolor('black')"
";port_label('output',4,'sm_timer1_countTo_din');\ncolor('black');port_label('"
"output',5,'sm_timer1_countTo_en');\ncolor('black');port_label('output',6,'sm_"
"timer2_countTo_din');\ncolor('black');port_label('output',7,'sm_timer2_countT"
"o_en');\ncolor('black');port_label('output',8,'sm_timer3_countTo_din');\ncolo"
"r('black');port_label('output',9,'sm_timer3_countTo_en');\ncolor('black');por"
"t_label('output',10,'sm_timer_control_w_din');\ncolor('black');port_label('ou"
"tput',11,'sm_timer_control_w_en');\ncolor('black');disp('\\bf{xlmax}','texmod"
"e','on');\nfprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "rdData"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    2
	    Name		    "timer0_countTo_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    3
	    Name		    "timer0_countTo_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    4
	    Name		    "timer1_countTo_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    5
	    Name		    "timer1_countTo_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    6
	    Name		    "timer2_countTo_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    7
	    Name		    "timer2_countTo_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    8
	    Name		    "timer3_countTo_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    9
	    Name		    "timer3_countTo_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    10
	    Name		    "timer_control_w_din"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	  Port {
	    PortNumber		    11
	    Name		    "timer_control_w_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "sg_plb_addrpref"
	  Ports			  [1, 1]
	  Position		  [110, 455, 175, 475]
	  SourceBlock		  "xbsIndex_r4/Gateway In"
	  SourceType		  "Xilinx Gateway In Block"
	  infoedit		  "Gateway in block.  Converts inputs of type "
"Simulink integer, double and fixed point to  Xilinx fixed point type.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level input ports."
	  arith_type		  "Unsigned"
	  n_bits		  "20"
	  bin_pt		  "0"
	  quantization		  "Round  (unbiased: +/- Inf)"
	  overflow		  "Saturate"
	  period		  "xlGetSimulinkPeriod(gcb)"
	  dbl_ovrd		  "off"
	  timing_constraint	  "None"
	  locs_specified	  "off"
	  LOCs			  "{}"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  sginterface		  "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map"
"ped_port'=>'sg_plb_addrpref'}},'iopad'=>{'constraint'=>'#'}}"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "gatewayin"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "65,20,1,1,white,yellow,0,bc55d28f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3"
"2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14"
" 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2"
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "addrPref"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Line {
	  Name			  "Sl_addrAck"
	  SrcBlock		  "plb_decode"
	  SrcPort		  2
	  Points		  [0, 0]
	  Branch {
	    Labels		    [1, 0]
	    Points		    [5, 0; 0, 395]
	    DstBlock		    "plb_memmap"
	    DstPort		    5
	  }
	  Branch {
	    Labels		    [0, 0]
	    Points		    [30, 0; 0, -10]
	    DstBlock		    "Sl_addrAck"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "Sl_wrDAck"
	  SrcBlock		  "plb_decode"
	  SrcPort		  4
	  Points		  [0, 0]
	  Branch {
	    Labels		    [1, 0]
	    DstBlock		    "Sl_wrDAck"
	    DstPort		    1
	  }
	  Branch {
	    Labels		    [0, 0]
	    Points		    [30, 0; 0, 50]
	    DstBlock		    "Sl_wrComp"
	    DstPort		    1
	  }
	}
	Line {
	  Name			  "timer_control_w_en"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  11
	  Points		  [10, 0; 0, 135]
	  DstBlock		  "To Register4"
	  DstPort		  2
	}
	Line {
	  Name			  "timer_control_w_din"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  10
	  Points		  [10, 0; 0, 125]
	  DstBlock		  "To Register4"
	  DstPort		  1
	}
	Line {
	  Name			  "timer3_countTo_en"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  9
	  Points		  [10, 0; 0, 90]
	  DstBlock		  "To Register3"
	  DstPort		  2
	}
	Line {
	  Name			  "timer3_countTo_din"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  8
	  Points		  [10, 0; 0, 80]
	  DstBlock		  "To Register3"
	  DstPort		  1
	}
	Line {
	  Name			  "timer2_countTo_en"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  7
	  Points		  [10, 0; 0, 45]
	  DstBlock		  "To Register2"
	  DstPort		  2
	}
	Line {
	  Name			  "timer2_countTo_din"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  6
	  Points		  [15, 0]
	  DstBlock		  "To Register2"
	  DstPort		  1
	}
	Line {
	  Name			  "timer1_countTo_en"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  5
	  Points		  [15, 0]
	  DstBlock		  "To Register1"
	  DstPort		  2
	}
	Line {
	  Name			  "timer1_countTo_din"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  4
	  Points		  [15, 0]
	  DstBlock		  "To Register1"
	  DstPort		  1
	}
	Line {
	  Name			  "timer0_countTo_en"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  3
	  Points		  [10, 0; 0, -50]
	  DstBlock		  "To Register"
	  DstPort		  2
	}
	Line {
	  Name			  "timer0_countTo_din"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  2
	  Points		  [10, 0; 0, -60]
	  DstBlock		  "To Register"
	  DstPort		  1
	}
	Line {
	  Name			  "rdData"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_memmap"
	  SrcPort		  1
	  Points		  [0, -35; -195, 0; 0, 35; -200, 0; 0, -95]
	  DstBlock		  "plb_decode"
	  DstPort		  6
	}
	Line {
	  Name			  "timer_control_w_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "To Register4"
	  SrcPort		  1
	  Points		  [0, -50; -285, 0]
	  DstBlock		  "plb_memmap"
	  DstPort		  16
	}
	Line {
	  Name			  "timer3_countTo_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "To Register3"
	  SrcPort		  1
	  Points		  [0, -35; -90, 0; 0, 30; -200, 0; 0, -35]
	  DstBlock		  "plb_memmap"
	  DstPort		  15
	}
	Line {
	  Name			  "timer2_countTo_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "To Register2"
	  SrcPort		  1
	  Points		  [0, 50; -90, 0; 0, 30; -200, 0; 0, -50]
	  DstBlock		  "plb_memmap"
	  DstPort		  14
	}
	Line {
	  Name			  "timer1_countTo_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "To Register1"
	  SrcPort		  1
	  Points		  [0, 55; -90, 0; 0, 115; -200, 0; 0, -65]
	  DstBlock		  "plb_memmap"
	  DstPort		  13
	}
	Line {
	  Name			  "timer0_countTo_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "To Register"
	  SrcPort		  1
	  Points		  [0, -35; -290, 0; 0, 210]
	  DstBlock		  "plb_memmap"
	  DstPort		  12
	}
	Line {
	  Name			  "timer_status_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "From Register5"
	  SrcPort		  1
	  Points		  [60, 0; 0, -345]
	  DstBlock		  "plb_memmap"
	  DstPort		  11
	}
	Line {
	  Name			  "timer_control_r_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "From Register4"
	  SrcPort		  1
	  Points		  [60, 0; 0, -275]
	  DstBlock		  "plb_memmap"
	  DstPort		  10
	}
	Line {
	  Name			  "timer3_timeLeft_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "From Register3"
	  SrcPort		  1
	  Points		  [60, 0; 0, -200]
	  DstBlock		  "plb_memmap"
	  DstPort		  9
	}
	Line {
	  Name			  "timer2_timeLeft_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "From Register2"
	  SrcPort		  1
	  Points		  [60, 0; 0, -130]
	  DstBlock		  "plb_memmap"
	  DstPort		  8
	}
	Line {
	  Name			  "timer1_timeLeft_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "From Register1"
	  SrcPort		  1
	  Points		  [60, 0; 0, -60]
	  DstBlock		  "plb_memmap"
	  DstPort		  7
	}
	Line {
	  Name			  "timer0_timeLeft_dout"
	  Labels		  [0, 0]
	  SrcBlock		  "From Register"
	  SrcPort		  1
	  Points		  [60, 0; 0, 15]
	  DstBlock		  "plb_memmap"
	  DstPort		  6
	}
	Line {
	  Name			  "RNWReg"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  6
	  Points		  [5, 0; 0, 200]
	  DstBlock		  "plb_memmap"
	  DstPort		  4
	}
	Line {
	  Name			  "linearAddr"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  9
	  Points		  [5, 0; 0, 50]
	  DstBlock		  "plb_memmap"
	  DstPort		  3
	}
	Line {
	  Name			  "bankAddr"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  5
	  Points		  [5, 0; 0, 215]
	  DstBlock		  "plb_memmap"
	  DstPort		  2
	}
	Line {
	  Name			  "wrDBusReg"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  1
	  Points		  [10, 0]
	  DstBlock		  "plb_memmap"
	  DstPort		  1
	}
	Line {
	  Name			  "Sl_rdDBus"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  8
	  Points		  [65, 0]
	  DstBlock		  "Sl_rdDBus"
	  DstPort		  1
	}
	Line {
	  Name			  "Sl_rdDAck"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  7
	  Points		  [65, 0]
	  DstBlock		  "Sl_rdDAck"
	  DstPort		  1
	}
	Line {
	  Name			  "Sl_rdComp"
	  Labels		  [0, 0]
	  SrcBlock		  "plb_decode"
	  SrcPort		  3
	  Points		  [65, 0]
	  DstBlock		  "Sl_rdComp"
	  DstPort		  1
	}
	Line {
	  Name			  "addrPref"
	  Labels		  [0, 0]
	  SrcBlock		  "sg_plb_addrpref"
	  SrcPort		  1
	  Points		  [10, 0]
	  DstBlock		  "plb_decode"
	  DstPort		  7
	}
	Line {
	  Name			  "PLB_wrDBus"
	  Labels		  [0, 0]
	  SrcBlock		  "PLB_wrDBus"
	  SrcPort		  1
	  Points		  [5, 0; 0, 5]
	  DstBlock		  "plb_decode"
	  DstPort		  5
	}
	Line {
	  Name			  "PLB_RNW"
	  Labels		  [0, 0]
	  SrcBlock		  "PLB_RNW"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  4
	}
	Line {
	  Name			  "PLB_PAValid"
	  Labels		  [0, 0]
	  SrcBlock		  "PLB_PAValid"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  3
	}
	Line {
	  Name			  "PLB_ABus"
	  Labels		  [0, 0]
	  SrcBlock		  "PLB_ABus"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  2
	}
	Line {
	  Name			  "SPLB_Rst"
	  Labels		  [0, 0]
	  SrcBlock		  "SPLB_Rst"
	  SrcPort		  1
	  DstBlock		  "plb_decode"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant6"
	  SrcPort		  1
	  DstBlock		  "sg_plb_addrpref"
	  DstPort		  1
	}
	Line {
	  Name			  "Sl_wait"
	  Labels		  [0, 0]
	  SrcBlock		  "Constant5"
	  SrcPort		  1
	  Points		  [5, 0; 0, -5]
	  DstBlock		  "Sl_wait"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant4"
	  SrcPort		  1
	  DstBlock		  "PLB_wrDBus"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant3"
	  SrcPort		  1
	  DstBlock		  "PLB_RNW"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant2"
	  SrcPort		  1
	  DstBlock		  "PLB_PAValid"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  DstBlock		  "PLB_ABus"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "SPLB_Rst"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_wrComp"
	  SrcPort		  1
	  DstBlock		  "Terminator6"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_wrDAck"
	  SrcPort		  1
	  DstBlock		  "Terminator5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_wait"
	  SrcPort		  1
	  DstBlock		  "Terminator4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_rdDBus"
	  SrcPort		  1
	  Points		  [45, 0; 0, -10]
	  DstBlock		  "Terminator3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_rdDAck"
	  SrcPort		  1
	  DstBlock		  "Terminator2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_rdComp"
	  SrcPort		  1
	  DstBlock		  "Terminator1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sl_addrAck"
	  SrcPort		  1
	  DstBlock		  "Terminator"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "From Register1"
      Ports		      [0, 1]
      Position		      [235, 162, 260, 188]
      ShowName		      off
      AttributesFormatString  "From Register\\n<< %<shared_memory_name> >>"
      SourceBlock	      "xbsIndex_r4/From Register"
      SourceType	      "Xilinx Shared Memory Based From Register Block"
      infoedit		      "Register block that reads data to a shared memo"
"ry register.  Delay of one sample period."
      shared_memory_name      "'timer0_countTo'"
      init		      "500"
      period		      "1"
      ownership		      "Locally owned and initialized"
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "514,418,383,246"
      block_type	      "fromreg"
      block_version	      "8.2"
      sg_icon_stat	      "25,26,0,1,white,blue,0,4b212927,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "From Register3"
      Ports		      [0, 1]
      Position		      [235, 377, 260, 403]
      ShowName		      off
      AttributesFormatString  "From Register\\n<< %<shared_memory_name> >>"
      SourceBlock	      "xbsIndex_r4/From Register"
      SourceType	      "Xilinx Shared Memory Based From Register Block"
      infoedit		      "Register block that reads data to a shared memo"
"ry register.  Delay of one sample period."
      shared_memory_name      "'timer1_countTo'"
      init		      "500"
      period		      "1"
      ownership		      "Locally owned and initialized"
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "514,418,383,246"
      block_type	      "fromreg"
      block_version	      "8.2"
      sg_icon_stat	      "25,26,0,1,white,blue,0,4b212927,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "From Register4"
      Ports		      [0, 1]
      Position		      [235, 592, 260, 618]
      ShowName		      off
      AttributesFormatString  "From Register\\n<< %<shared_memory_name> >>"
      SourceBlock	      "xbsIndex_r4/From Register"
      SourceType	      "Xilinx Shared Memory Based From Register Block"
      infoedit		      "Register block that reads data to a shared memo"
"ry register.  Delay of one sample period."
      shared_memory_name      "'timer2_countTo'"
      init		      "500"
      period		      "1"
      ownership		      "Locally owned and initialized"
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "514,418,383,246"
      block_type	      "fromreg"
      block_version	      "8.2"
      sg_icon_stat	      "25,26,0,1,white,blue,0,4b212927,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "From Register5"
      Ports		      [0, 1]
      Position		      [235, 807, 260, 833]
      ShowName		      off
      AttributesFormatString  "From Register\\n<< %<shared_memory_name> >>"
      SourceBlock	      "xbsIndex_r4/From Register"
      SourceType	      "Xilinx Shared Memory Based From Register Block"
      infoedit		      "Register block that reads data to a shared memo"
"ry register.  Delay of one sample period."
      shared_memory_name      "'timer3_countTo'"
      init		      "500"
      period		      "1"
      ownership		      "Locally owned and initialized"
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "514,418,383,246"
      block_type	      "fromreg"
      block_version	      "8.2"
      sg_icon_stat	      "25,26,0,1,white,blue,0,4b212927,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway Out"
      Ports		      [1, 1]
      Position		      [1030, 385, 1090, 405]
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,336,386"
      block_type	      "gatewayout"
      block_version	      "10.1.2"
      sg_icon_stat	      "60,20,1,1,white,grey,0,b3a044a9,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 20 20 ],[0.88 0.88 0.88]);\npatch([24 21 26 21 24 29 30"
" 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 "
"15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 "
"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
"on text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_la"
"bel('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT:"
" end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway Out1"
      Ports		      [1, 1]
      Position		      [565, 784, 625, 796]
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,336,386"
      block_type	      "gatewayout"
      block_version	      "10.1.2"
      sg_icon_stat	      "60,12,1,1,white,grey,0,b3a044a9,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([27 25 28 25 27 30 31"
" 32 35 32 29 27 30 27 29 32 35 32 31 30 27 ],[1 3 6 9 11 11 10 11 11 8 11 9 6"
" 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 12 12 0 ]);\n"
"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
"xt');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('"
"output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end "
"icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway Out2"
      Ports		      [1, 1]
      Position		      [565, 804, 625, 816]
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,336,386"
      block_type	      "gatewayout"
      block_version	      "10.1.2"
      sg_icon_stat	      "60,12,1,1,white,grey,0,b3a044a9,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([27 25 28 25 27 30 31"
" 32 35 32 29 27 30 27 29 32 35 32 31 30 27 ],[1 3 6 9 11 11 10 11 11 8 11 9 6"
" 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 12 12 0 ]);\n"
"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
"xt');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('"
"output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end "
"icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway Out3"
      Ports		      [1, 1]
      Position		      [565, 824, 625, 836]
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,336,386"
      block_type	      "gatewayout"
      block_version	      "10.1.2"
      sg_icon_stat	      "60,12,1,1,white,grey,0,b3a044a9,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([27 25 28 25 27 30 31"
" 32 35 32 29 27 30 27 29 32 35 32 31 30 27 ],[1 3 6 9 11 11 10 11 11 8 11 9 6"
" 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 12 12 0 ]);\n"
"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
"xt');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('"
"output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end "
"icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway Out4"
      Ports		      [1, 1]
      Position		      [565, 844, 625, 856]
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,336,386"
      block_type	      "gatewayout"
      block_version	      "10.1.2"
      sg_icon_stat	      "60,12,1,1,white,grey,0,b3a044a9,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([27 25 28 25 27 30 31"
" 32 35 32 29 27 30 27 29 32 35 32 31 30 27 ],[1 3 6 9 11 11 10 11 11 8 11 9 6"
" 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 12 12 0 ]);\n"
"fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te"
"xt');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('"
"output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end "
"icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "IDLEFORDIFS"
      Ports		      [1, 1]
      Position		      [55, 192, 120, 208]
      SourceBlock	      "xbsIndex_r4/Gateway In"
      SourceType	      "Xilinx Gateway In Block"
      infoedit		      "Gateway in block.  Converts inputs of type Simu"
"link integer, double and fixed point to  Xilinx fixed point type.<P><P>Hardwa"
"re notes:  In hardware these blocks become top level input ports."
      arith_type	      "Unsigned"
      n_bits		      "1"
      bin_pt		      "0"
      quantization	      "Round  (unbiased: +/- Inf)"
      overflow		      "Saturate"
      period		      "1"
      dbl_ovrd		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,356,432"
      block_type	      "gatewayin"
      block_version	      "8.2"
      sg_icon_stat	      "65,16,1,1,white,yellow,0,bc55d28f,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33"
" 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 "
"15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 "
"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
"on text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','t"
"exmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMME"
"NT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Logical"
      Ports		      [4, 1]
      Position		      [940, 32, 980, 78]
      SourceBlock	      "xbsIndex_r4/Logical"
      SourceType	      "Xilinx Logical Block Block"
      logical_function	      "OR"
      inputs		      "4"
      en		      off
      latency		      "0"
      precision		      "Full"
      arith_type	      "Unsigned"
      n_bits		      "16"
      bin_pt		      "0"
      align_bp		      on
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "logical"
      block_version	      "9.1.01"
      sg_icon_stat	      "40,46,4,1,white,blue,0,ad4bab34,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 40 40 0 ],[0 0 46 46 ],[0.77 0.82 0.91]);\npatch([10 3 12 3 10 21 24 2"
"7 38 29 20 14 24 14 20 29 38 27 24 21 10 ],[7 14 23 32 39 39 36 39 39 30 39 3"
"3 23 13 7 16 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 46 46 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on'"
");\nfprintf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      Scope
      Name		      "Scope"
      Ports		      [6]
      Position		      [1140, 280, 1175, 410]
      Floating		      off
      Location		      [312, 172, 828, 965]
      Open		      off
      NumInputPorts	      "6"
      ZoomMode		      "xonly"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
	axes2			"%<SignalLabel>"
	axes3			"%<SignalLabel>"
	axes4			"%<SignalLabel>"
	axes5			"%<SignalLabel>"
	axes6			"%<SignalLabel>"
      }
      YMin		      "-5~-5~-5~-5~-5~-5"
      YMax		      "5~5~5~5~5~5"
      SaveName		      "ScopeData2"
      DataFormat	      "StructureWithTime"
      SampleTime	      "0"
    }
    Block {
      BlockType		      Scope
      Name		      "Scope1"
      Ports		      [4]
      Position		      [700, 781, 750, 859]
      Floating		      off
      Location		      [548, 233, 1084, 926]
      Open		      off
      NumInputPorts	      "4"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
	axes2			"%<SignalLabel>"
	axes3			"%<SignalLabel>"
	axes4			"%<SignalLabel>"
      }
      YMin		      "-5~-5~-5~-5"
      YMax		      "5~5~5~5"
      SaveName		      "ScopeData1"
      DataFormat	      "StructureWithTime"
      SampleTime	      "0"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice"
      Ports		      [1, 1]
      Position		      [175, 15, 205, 35]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "0"
      base1		      "LSB of Input"
      bit0		      "0"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice1"
      Ports		      [1, 1]
      Position		      [175, 40, 205, 60]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "1"
      base1		      "LSB of Input"
      bit0		      "1"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice10"
      Ports		      [1, 1]
      Position		      [175, 330, 205, 350]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "18"
      base1		      "LSB of Input"
      bit0		      "12"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice11"
      Ports		      [1, 1]
      Position		      [175, 355, 205, 375]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "19"
      base1		      "LSB of Input"
      bit0		      "13"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice12"
      Ports		      [1, 1]
      Position		      [175, 445, 205, 465]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "24"
      base1		      "LSB of Input"
      bit0		      "16"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice13"
      Ports		      [1, 1]
      Position		      [175, 470, 205, 490]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "25"
      base1		      "LSB of Input"
      bit0		      "17"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice14"
      Ports		      [1, 1]
      Position		      [175, 495, 205, 515]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "26"
      base1		      "LSB of Input"
      bit0		      "18"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice15"
      Ports		      [1, 1]
      Position		      [175, 520, 205, 540]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "27"
      base1		      "LSB of Input"
      bit0		      "19"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice16"
      Ports		      [1, 1]
      Position		      [175, 545, 205, 565]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "27"
      base1		      "LSB of Input"
      bit0		      "20"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice17"
      Ports		      [1, 1]
      Position		      [175, 570, 205, 590]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "27"
      base1		      "LSB of Input"
      bit0		      "21"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice18"
      Ports		      [1, 1]
      Position		      [175, 660, 205, 680]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "27"
      base1		      "LSB of Input"
      bit0		      "24"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice19"
      Ports		      [1, 1]
      Position		      [175, 685, 205, 705]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "27"
      base1		      "LSB of Input"
      bit0		      "25"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice2"
      Ports		      [1, 1]
      Position		      [175, 65, 205, 85]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "2"
      base1		      "LSB of Input"
      bit0		      "2"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice20"
      Ports		      [1, 1]
      Position		      [175, 710, 205, 730]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "27"
      base1		      "LSB of Input"
      bit0		      "26"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice21"
      Ports		      [1, 1]
      Position		      [175, 735, 205, 755]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "27"
      base1		      "LSB of Input"
      bit0		      "27"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice22"
      Ports		      [1, 1]
      Position		      [175, 760, 205, 780]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "27"
      base1		      "LSB of Input"
      bit0		      "28"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice23"
      Ports		      [1, 1]
      Position		      [175, 785, 205, 805]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "27"
      base1		      "LSB of Input"
      bit0		      "29"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice3"
      Ports		      [1, 1]
      Position		      [175, 90, 205, 110]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "3"
      base1		      "LSB of Input"
      bit0		      "3"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "439,299,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice4"
      Ports		      [1, 1]
      Position		      [175, 115, 205, 135]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "8"
      base1		      "LSB of Input"
      bit0		      "4"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice5"
      Ports		      [1, 1]
      Position		      [175, 140, 205, 160]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "9"
      base1		      "LSB of Input"
      bit0		      "5"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice6"
      Ports		      [1, 1]
      Position		      [175, 230, 205, 250]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "10"
      base1		      "LSB of Input"
      bit0		      "8"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice7"
      Ports		      [1, 1]
      Position		      [175, 255, 205, 275]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "11"
      base1		      "LSB of Input"
      bit0		      "9"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice8"
      Ports		      [1, 1]
      Position		      [175, 280, 205, 300]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "16"
      base1		      "LSB of Input"
      bit0		      "10"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Slice9"
      Ports		      [1, 1]
      Position		      [175, 305, 205, 325]
      SourceBlock	      "xbsIndex_r4/Slice"
      SourceType	      "Xilinx Bit Slice Extractor Block"
      infoedit		      "Extracts a given range of bits from each input "
"sample and presents it at the output.  The output type is ordinarily unsigned"
" with binary point at zero, but can be Boolean when the slice is one bit wide"
".<P><P>Hardware notes: In hardware this block costs nothing."
      nbits		      "1"
      boolean_output	      on
      mode		      "Lower Bit Location + Width"
      bit1		      "17"
      base1		      "LSB of Input"
      bit0		      "11"
      base0		      "LSB of Input"
      dbl_ovrd		      off
      has_advanced_control    "0"
      sggui_pos		      "20,20,442,407"
      block_type	      "slice"
      block_version	      "9.1.01"
      sg_icon_stat	      "30,20,1,1,white,blue,0,b1026674,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32"
" 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 "
"21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i"
"con text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "TIMEREXPIRE"
      Ports		      [1, 1]
      Position		      [1000, 45, 1060, 65]
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,356,352"
      block_type	      "gatewayout"
      block_version	      "8.2"
      sg_icon_stat	      "60,20,1,1,white,yellow,0,38220381,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30"
" 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 "
"15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 "
"]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic"
"on text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_la"
"bel('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMM"
"ENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "To Register"
      Ports		      [2, 1]
      Position		      [465, 176, 520, 229]
      ShowName		      off
      AttributesFormatString  "To Register\\n<< %<shared_memory_name> >>"
      SourceBlock	      "xbsIndex_r4/To Register"
      SourceType	      "Xilinx Shared Memory Based To Register Block"
      infoedit		      "Register block that writes data to a shared mem"
"ory register.  Delay of one sample period."
      shared_memory_name      "'timer0_timeLeft'"
      init		      "0"
      ownership		      "Locally owned and initialized"
      explicit_data_type      on
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,383,270"
      block_type	      "toreg"
      block_version	      "8.2"
      sg_icon_stat	      "55,53,2,1,white,blue,0,77cabcdf,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');por"
"t_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfpri"
"ntf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "To Register1"
      Ports		      [2, 1]
      Position		      [465, 391, 520, 444]
      ShowName		      off
      AttributesFormatString  "To Register\\n<< %<shared_memory_name> >>"
      SourceBlock	      "xbsIndex_r4/To Register"
      SourceType	      "Xilinx Shared Memory Based To Register Block"
      infoedit		      "Register block that writes data to a shared mem"
"ory register.  Delay of one sample period."
      shared_memory_name      "'timer1_timeLeft'"
      init		      "0"
      ownership		      "Locally owned and initialized"
      explicit_data_type      on
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,383,270"
      block_type	      "toreg"
      block_version	      "8.2"
      sg_icon_stat	      "55,53,2,1,white,blue,0,77cabcdf,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');por"
"t_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfpri"
"ntf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "To Register2"
      Ports		      [2, 1]
      Position		      [465, 606, 520, 659]
      ShowName		      off
      AttributesFormatString  "To Register\\n<< %<shared_memory_name> >>"
      SourceBlock	      "xbsIndex_r4/To Register"
      SourceType	      "Xilinx Shared Memory Based To Register Block"
      infoedit		      "Register block that writes data to a shared mem"
"ory register.  Delay of one sample period."
      shared_memory_name      "'timer2_timeLeft'"
      init		      "0"
      ownership		      "Locally owned and initialized"
      explicit_data_type      on
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,383,270"
      block_type	      "toreg"
      block_version	      "8.2"
      sg_icon_stat	      "55,53,2,1,white,blue,0,77cabcdf,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');por"
"t_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfpri"
"ntf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "To Register3"
      Ports		      [2, 1]
      Position		      [465, 821, 520, 874]
      ShowName		      off
      AttributesFormatString  "To Register\\n<< %<shared_memory_name> >>"
      SourceBlock	      "xbsIndex_r4/To Register"
      SourceType	      "Xilinx Shared Memory Based To Register Block"
      infoedit		      "Register block that writes data to a shared mem"
"ory register.  Delay of one sample period."
      shared_memory_name      "'timer3_timeLeft'"
      init		      "0"
      ownership		      "Locally owned and initialized"
      explicit_data_type      on
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "20,20,383,270"
      block_type	      "toreg"
      block_version	      "8.2"
      sg_icon_stat	      "55,53,2,1,white,blue,0,77cabcdf,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');por"
"t_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfpri"
"ntf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "To Register4"
      Ports		      [2, 1]
      Position		      [865, 366, 920, 419]
      ShowName		      off
      AttributesFormatString  "To Register\\n<< %<shared_memory_name> >>"
      SourceBlock	      "xbsIndex_r4/To Register"
      SourceType	      "Xilinx Shared Memory Based To Register Block"
      infoedit		      "Register block that writes data to a shared mem"
"ory register.  Delay of one sample period."
      shared_memory_name      "'timer_status'"
      init		      "0"
      ownership		      "Locally owned and initialized"
      explicit_data_type      on
      arith_type	      "Unsigned"
      n_bits		      "32"
      bin_pt		      "0"
      dbl_ovrd		      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "290,195,381,270"
      block_type	      "toreg"
      block_version	      "9.1.01"
      sg_icon_stat	      "55,53,2,1,white,blue,0,77cabcdf,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3"
"8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4"
"0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');por"
"t_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfpri"
"ntf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      SubSystem
      Name		      "timer"
      Ports		      [8, 4]
      Position		      [290, 12, 400, 213]
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      MaskHideContents	      off
      System {
	Name			"timer"
	Location		[573, 442, 1553, 899]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "start"
	  Position		  [15, 163, 45, 177]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "stop"
	  Position		  [15, 288, 45, 302]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "resume"
	  Position		  [15, 188, 45, 202]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "pause"
	  Position		  [15, 313, 45, 327]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "mode"
	  Position		  [155, 23, 185, 37]
	  Port			  "5"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "interruptReset"
	  Position		  [680, 178, 710, 192]
	  Port			  "6"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "countTo"
	  Position		  [515, 83, 545, 97]
	  Port			  "7"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "idlefordifs_inp"
	  Position		  [155, 93, 185, 107]
	  Port			  "8"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "AddSub"
	  Ports			  [2, 1]
	  Position		  [665, 234, 710, 281]
	  SourceBlock		  "xbsIndex_r4/AddSub"
	  SourceType		  "Xilinx Adder/Subtractor Block"
	  mode			  "Subtraction"
	  use_carryin		  off
	  use_carryout		  off
	  en			  off
	  latency		  "0"
	  precision		  "User Defined"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  pipelined		  off
	  use_rpm		  on
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "addsub"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,46b4c804,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 "
"34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 "
"53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58"
" 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
"ort_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}'"
",'texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  Ports			  [0, 1]
	  Position		  [520, 349, 550, 361]
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Unsigned"
	  const			  "0"
	  n_bits		  "32"
	  bin_pt		  "0"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "50,50,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,12,1,1,white,blue,0,72d575a1,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 30 30 0 ],[0 0 12 12 ],[0.77 0.82 0.91]);\npatch([12 10 13 10 12 1"
"5 16 17 20 17 14 12 15 12 14 17 20 17 16 15 12 ],[1 3 6 9 11 11 10 11 11 8 11"
" 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]"
");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
"n text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: e"
"nd icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant1"
	  Ports			  [0, 1]
	  Position		  [155, 57, 190, 73]
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Unsigned"
	  const			  "1"
	  n_bits		  "1"
	  bin_pt		  "0"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,16,0,1,white,blue,0,06094819,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMME"
"NT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  Ports			  [1, 1]
	  Position		  [290, 55, 325, 75]
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating req"
"uire hardware resources; truncating and wrapping do not."
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,461,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,20,1,1,white,blue,0,74901e60,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2"
"3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20"
" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 "
"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
"OMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Counter"
	  Ports			  [2, 1]
	  Position		  [485, 119, 545, 221]
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are t"
"he least expensive in hardware.  A count limited counter is implemented by co"
"mbining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  use_rpm		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,630"
	  block_type		  "counter"
	  block_version		  "8.2"
	  sg_icon_stat		  "60,102,2,1,white,blue,0,46c73e85,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 "
"34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 "
"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nf"
"printf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  Ports			  [1, 1]
	  Position		  [660, 371, 705, 389]
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement)"
" operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1ab4a85f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 18 18 ],[0.77 0.82 0.91]);\npatch([18 15 19 15 18 2"
"3 24 25 30 26 22 19 23 19 22 26 30 25 24 23 18 ],[2 5 9 13 16 16 15 16 16 12 "
"16 13 9 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 18 18 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text"
"');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  Ports			  [2, 1]
	  Position		  [360, 174, 405, 216]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,261"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,42,2,1,white,blue,0,087b5522,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode'"
",'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  Ports			  [3, 1]
	  Position		  [430, 127, 465, 163]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "3"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,36,3,1,white,blue,0,bd50cad4,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
"'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  Ports			  [3, 1]
	  Position		  [187, 245, 223, 280]
	  Orientation		  "up"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "3"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "36,35,3,1,white,blue,0,bd50cad4,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
"'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical3"
	  Ports			  [2, 1]
	  Position		  [170, 159, 200, 206]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "30,47,2,1,white,blue,0,f4a65842,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
"'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical4"
	  Ports			  [2, 1]
	  Position		  [735, 328, 780, 397]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,69,2,1,white,blue,0,087b5522,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 69 69 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 "
"25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[17 24 35 46 53 53 50 53 53 43"
" 53 46 35 24 17 27 17 17 20 17 17 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],["
"0 0 69 69 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME"
"NT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','te"
"xmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  Ports			  [3, 1]
	  Position		  [215, 13, 260, 117]
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,613f58e1,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3"
" 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70"
" 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 4"
"5 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphi"
"cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
"put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po"
"rt_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfpr"
"intf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational"
	  Ports			  [2, 1]
	  Position		  [585, 126, 625, 184]
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,58,2,1,white,blue,0,1b68ef8e,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 "
"50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
"ort_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\newlinez^"
"{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  Ports			  [2, 1]
	  Position		  [585, 326, 630, 364]
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a>b"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,38,1,1,white,blue,0,c445790c,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 38 38 ],[0.77 0.82 0.91]);\npatch([12 6 15 6 12 22 "
"25 28 39 31 23 17 26 17 23 31 39 28 25 22 12 ],[4 10 19 28 34 34 31 34 34 26 "
"34 28 19 10 4 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 38 "
"38 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');po"
"rt_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a>b}\\newlinez^{"
"-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R_Latch1"
	  Ports			  [2, 1]
	  Position		  [245, 167, 285, 238]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R_Latch1"
	    Location		    [837, 103, 1234, 376]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      Position		      [95, 58, 125, 72]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      Position		      [95, 88, 125, 102]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [220, 82, 250, 108]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
" text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      Ports		      [3, 1]
	      Position		      [150, 70, 195, 120]
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      "on"
	      en		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,50,1,1,white,blue,0,923c1847,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      Position		      [285, 63, 315, 77]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [10, 0; 0, 55; -130, 0]
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		Points			[0, -25]
		DstBlock		"Q"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Inverter"
		DstPort			1
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R_Latch2"
	  Ports			  [2, 1]
	  Position		  [745, 140, 785, 200]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R_Latch2"
	    Location		    [521, 318, 918, 591]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      Position		      [95, 58, 125, 72]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      Position		      [95, 88, 125, 102]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [220, 82, 250, 108]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
" text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      Ports		      [3, 1]
	      Position		      [150, 70, 195, 120]
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      "on"
	      en		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,50,1,1,white,blue,0,923c1847,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      Position		      [285, 63, 315, 77]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		DstBlock		"Inverter"
		DstPort			1
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Q"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [10, 0; 0, 55; -130, 0]
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "posedge"
	  Ports			  [1, 1]
	  Position		  [75, 163, 105, 177]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "posedge"
	    Location		    [459, 339, 854, 490]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "In"
	      Position		      [20, 33, 50, 47]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      Ports		      [1, 1]
	      Position		      [80, 67, 140, 123]
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain"
", each link of which is an SRL16 followed by a flip-flop. If register retimin"
"g is enabled, the delay line is a chain of flip-flops."
	      en		      "off"
	      latency		      "1"
	      dbl_ovrd		      "off"
	      reg_retiming	      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "60,56,1,1,white,blue,0,fc531c0e,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
"'','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [170, 66, 225, 124]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,58,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
"con text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      Ports		      [2, 1]
	      Position		      [260, 25, 315, 85]
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      "off"
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,60,1,1,white,blue,0,087b5522,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
"ode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Out"
	      Position		      [340, 48, 370, 62]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [5, 0; 0, -25]
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "In"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	      Branch {
		Points			[0, 55]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Out"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "posedge1"
	  Ports			  [1, 1]
	  Position		  [75, 188, 105, 202]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "posedge1"
	    Location		    [459, 339, 854, 490]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "In"
	      Position		      [20, 33, 50, 47]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      Ports		      [1, 1]
	      Position		      [80, 67, 140, 123]
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain"
", each link of which is an SRL16 followed by a flip-flop. If register retimin"
"g is enabled, the delay line is a chain of flip-flops."
	      en		      "off"
	      latency		      "1"
	      dbl_ovrd		      "off"
	      reg_retiming	      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "60,56,1,1,white,blue,0,fc531c0e,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
"'','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [170, 66, 225, 124]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,58,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
"con text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      Ports		      [2, 1]
	      Position		      [260, 25, 315, 85]
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      "off"
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,60,1,1,white,blue,0,087b5522,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
"ode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Out"
	      Position		      [340, 48, 370, 62]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Out"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "In"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		Points			[0, 55]
		DstBlock		"Delay"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [5, 0; 0, -25]
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Outport
	  Name			  "interrupt"
	  Position		  [810, 163, 840, 177]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "active"
	  Position		  [350, 253, 380, 267]
	  Port			  "2"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "paused"
	  Position		  [820, 358, 850, 372]
	  Port			  "3"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "timeLeft"
	  Position		  [740, 253, 770, 267]
	  Port			  "4"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "start"
	  SrcPort		  1
	  DstBlock		  "posedge"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "posedge"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Logical3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -15]
	    DstBlock		    "Logical1"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "mode"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "countTo"
	  SrcPort		  1
	  Points		  [10, 0; 0, 50]
	  Branch {
	    Points		    [0, 105]
	    DstBlock		    "AddSub"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Relational"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Relational"
	  SrcPort		  1
	  Points		  [5, 0]
	  Branch {
	    Points		    [0, -80; -230, 0; 0, 60]
	    DstBlock		    "Logical1"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "S-R_Latch2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 140]
	    DstBlock		    "Logical2"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Counter"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    Labels		    [1, 0]
	    DstBlock		    "Relational"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 100]
	    DstBlock		    "AddSub"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 165]
	    DstBlock		    "Relational1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "idlefordifs_inp"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  Points		  [15, 0]
	  DstBlock		  "Logical"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "interruptReset"
	  SrcPort		  1
	  DstBlock		  "S-R_Latch2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  Points		  [0, -20]
	  DstBlock		  "S-R_Latch1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "S-R_Latch2"
	  SrcPort		  1
	  DstBlock		  "interrupt"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "stop"
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    DstBlock		    "Logical2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -150]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "S-R_Latch1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    DstBlock		    "Logical"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 55]
	    DstBlock		    "active"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 175]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "AddSub"
	  SrcPort		  1
	  DstBlock		  "timeLeft"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "resume"
	  SrcPort		  1
	  DstBlock		  "posedge1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  DstBlock		  "S-R_Latch1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "posedge1"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "pause"
	  SrcPort		  1
	  Points		  [155, 0]
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  DstBlock		  "paused"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "timer0_active"
      Ports		      [1, 1]
      Position		      [1000, 83, 1060, 97]
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "gatewayout"
      block_version	      "9.1.01"
      sg_icon_stat	      "60,14,1,1,white,yellow,0,38220381,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([26 24 27 24 26 30 31"
" 32 36 33 30 28 31 28 30 33 36 32 31 30 26 ],[2 4 7 10 12 12 11 12 12 9 12 10"
" 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 14 14 0 ]);"
"\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon "
"text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label"
"('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT"
": end icon text');\n"
    }
    Block {
      BlockType		      SubSystem
      Name		      "timer1"
      Ports		      [8, 4]
      Position		      [290, 227, 400, 428]
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      MaskHideContents	      off
      System {
	Name			"timer1"
	Location		[58, 190, 1298, 1018]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "start"
	  Position		  [15, 163, 45, 177]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "stop"
	  Position		  [15, 288, 45, 302]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "resume"
	  Position		  [15, 188, 45, 202]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "pause"
	  Position		  [15, 313, 45, 327]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "mode"
	  Position		  [155, 23, 185, 37]
	  Port			  "5"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "interruptReset"
	  Position		  [680, 178, 710, 192]
	  Port			  "6"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "countTo"
	  Position		  [515, 83, 545, 97]
	  Port			  "7"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "idlefordifs_inp"
	  Position		  [155, 93, 185, 107]
	  Port			  "8"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "AddSub"
	  Ports			  [2, 1]
	  Position		  [665, 234, 710, 281]
	  SourceBlock		  "xbsIndex_r4/AddSub"
	  SourceType		  "Xilinx Adder/Subtractor Block"
	  mode			  "Subtraction"
	  use_carryin		  off
	  use_carryout		  off
	  en			  off
	  latency		  "0"
	  precision		  "User Defined"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  pipelined		  off
	  use_rpm		  on
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "addsub"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,46b4c804,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 "
"34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 "
"53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58"
" 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
"ort_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}'"
",'texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  Ports			  [0, 1]
	  Position		  [520, 349, 550, 361]
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Unsigned"
	  const			  "0"
	  n_bits		  "32"
	  bin_pt		  "0"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "50,50,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,12,1,1,white,blue,0,72d575a1,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 30 30 0 ],[0 0 12 12 ],[0.77 0.82 0.91]);\npatch([12 10 13 10 12 1"
"5 16 17 20 17 14 12 15 12 14 17 20 17 16 15 12 ],[1 3 6 9 11 11 10 11 11 8 11"
" 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]"
");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
"n text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: e"
"nd icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant1"
	  Ports			  [0, 1]
	  Position		  [155, 57, 190, 73]
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Unsigned"
	  const			  "1"
	  n_bits		  "1"
	  bin_pt		  "0"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,16,0,1,white,blue,0,06094819,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMME"
"NT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  Ports			  [1, 1]
	  Position		  [290, 55, 325, 75]
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating req"
"uire hardware resources; truncating and wrapping do not."
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,461,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,20,1,1,white,blue,0,74901e60,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2"
"3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20"
" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 "
"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
"OMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Counter"
	  Ports			  [2, 1]
	  Position		  [485, 119, 545, 221]
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are t"
"he least expensive in hardware.  A count limited counter is implemented by co"
"mbining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  use_rpm		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,630"
	  block_type		  "counter"
	  block_version		  "8.2"
	  sg_icon_stat		  "60,102,2,1,white,blue,0,46c73e85,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 "
"34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 "
"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nf"
"printf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  Ports			  [1, 1]
	  Position		  [660, 371, 705, 389]
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement)"
" operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,251"
	  block_type		  "inv"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1ab4a85f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 18 18 ],[0.77 0.82 0.91]);\npatch([18 15 19 15 18 2"
"3 24 25 30 26 22 19 23 19 22 26 30 25 24 23 18 ],[2 5 9 13 16 16 15 16 16 12 "
"16 13 9 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 18 18 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text"
"');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  Ports			  [2, 1]
	  Position		  [360, 174, 405, 216]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,261"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,42,2,1,white,blue,0,087b5522,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode'"
",'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  Ports			  [3, 1]
	  Position		  [430, 127, 465, 163]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "3"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,36,3,1,white,blue,0,bd50cad4,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
"'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  Ports			  [3, 1]
	  Position		  [187, 245, 223, 280]
	  Orientation		  "up"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "3"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "36,35,3,1,white,blue,0,bd50cad4,up"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 36 36 0 ],[0 0 35 35 ],[0.77 0.82 0.91]);\npatch([9 3 11 3 9 18 21"
" 24 34 26 19 14 22 14 19 26 34 24 21 18 9 ],[4 10 18 26 32 32 29 32 32 24 31 "
"26 18 10 5 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 36 36 0 0 ],[0 0 35 35 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on'"
");\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical3"
	  Ports			  [2, 1]
	  Position		  [170, 159, 200, 206]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "30,47,2,1,white,blue,0,f4a65842,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
"'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical4"
	  Ports			  [2, 1]
	  Position		  [735, 328, 780, 397]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,261"
	  block_type		  "logical"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,69,1,1,white,blue,0,087b5522,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 69 69 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 "
"25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[17 24 35 46 53 53 50 53 53 43"
" 53 46 35 24 17 27 17 17 20 17 17 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],["
"0 0 69 69 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME"
"NT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','te"
"xmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  Ports			  [3, 1]
	  Position		  [215, 13, 260, 117]
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,613f58e1,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3"
" 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70"
" 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 4"
"5 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphi"
"cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
"put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po"
"rt_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfpr"
"intf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational"
	  Ports			  [2, 1]
	  Position		  [585, 126, 625, 184]
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,58,2,1,white,blue,0,1b68ef8e,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 "
"50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
"ort_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\newlinez^"
"{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  Ports			  [2, 1]
	  Position		  [585, 326, 630, 364]
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a>b"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,38,1,1,white,blue,0,c445790c,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 38 38 ],[0.77 0.82 0.91]);\npatch([12 6 15 6 12 22 "
"25 28 39 31 23 17 26 17 23 31 39 28 25 22 12 ],[4 10 19 28 34 34 31 34 34 26 "
"34 28 19 10 4 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 38 "
"38 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');po"
"rt_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a>b}\\newlinez^{"
"-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R_Latch1"
	  Ports			  [2, 1]
	  Position		  [245, 167, 285, 238]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R_Latch1"
	    Location		    [837, 103, 1234, 376]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      Position		      [95, 58, 125, 72]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      Position		      [95, 88, 125, 102]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [220, 82, 250, 108]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
" text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      Ports		      [3, 1]
	      Position		      [150, 70, 195, 120]
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      "on"
	      en		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,50,1,1,white,blue,0,923c1847,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      Position		      [285, 63, 315, 77]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		DstBlock		"Inverter"
		DstPort			1
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Q"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [10, 0; 0, 55; -130, 0]
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R_Latch2"
	  Ports			  [2, 1]
	  Position		  [745, 140, 785, 200]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R_Latch2"
	    Location		    [521, 318, 918, 591]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      Position		      [95, 58, 125, 72]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      Position		      [95, 88, 125, 102]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [220, 82, 250, 108]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
" text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      Ports		      [3, 1]
	      Position		      [150, 70, 195, 120]
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      "on"
	      en		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,50,1,1,white,blue,0,923c1847,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      Position		      [285, 63, 315, 77]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [10, 0; 0, 55; -130, 0]
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		Points			[0, -25]
		DstBlock		"Q"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Inverter"
		DstPort			1
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "posedge"
	  Ports			  [1, 1]
	  Position		  [75, 163, 105, 177]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "posedge"
	    Location		    [459, 339, 854, 490]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "In"
	      Position		      [20, 33, 50, 47]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      Ports		      [1, 1]
	      Position		      [80, 67, 140, 123]
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain"
", each link of which is an SRL16 followed by a flip-flop. If register retimin"
"g is enabled, the delay line is a chain of flip-flops."
	      en		      "off"
	      latency		      "1"
	      dbl_ovrd		      "off"
	      reg_retiming	      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "60,56,1,1,white,blue,0,fc531c0e,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
"'','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [170, 66, 225, 124]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,58,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
"con text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      Ports		      [2, 1]
	      Position		      [260, 25, 315, 85]
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      "off"
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,60,1,1,white,blue,0,087b5522,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
"ode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Out"
	      Position		      [340, 48, 370, 62]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Out"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "In"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		Points			[0, 55]
		DstBlock		"Delay"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [5, 0; 0, -25]
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "posedge1"
	  Ports			  [1, 1]
	  Position		  [75, 188, 105, 202]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "posedge1"
	    Location		    [459, 339, 854, 490]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "In"
	      Position		      [20, 33, 50, 47]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      Ports		      [1, 1]
	      Position		      [80, 67, 140, 123]
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain"
", each link of which is an SRL16 followed by a flip-flop. If register retimin"
"g is enabled, the delay line is a chain of flip-flops."
	      en		      "off"
	      latency		      "1"
	      dbl_ovrd		      "off"
	      reg_retiming	      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "60,56,1,1,white,blue,0,fc531c0e,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
"'','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [170, 66, 225, 124]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,58,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
"con text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      Ports		      [2, 1]
	      Position		      [260, 25, 315, 85]
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      "off"
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,60,1,1,white,blue,0,087b5522,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
"ode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Out"
	      Position		      [340, 48, 370, 62]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [5, 0; 0, -25]
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "In"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	      Branch {
		Points			[0, 55]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Out"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Outport
	  Name			  "interrupt"
	  Position		  [810, 163, 840, 177]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "active"
	  Position		  [350, 253, 380, 267]
	  Port			  "2"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "paused"
	  Position		  [820, 358, 850, 372]
	  Port			  "3"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "timeLeft"
	  Position		  [740, 253, 770, 267]
	  Port			  "4"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  DstBlock		  "paused"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "pause"
	  SrcPort		  1
	  Points		  [155, 0]
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "posedge1"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  DstBlock		  "S-R_Latch1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "resume"
	  SrcPort		  1
	  DstBlock		  "posedge1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "AddSub"
	  SrcPort		  1
	  DstBlock		  "timeLeft"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S-R_Latch1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    Points		    [0, 175]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 55]
	    DstBlock		    "active"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Logical"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "stop"
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    Points		    [0, -150]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	  Branch {
	    DstBlock		    "Logical2"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "S-R_Latch2"
	  SrcPort		  1
	  DstBlock		  "interrupt"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  Points		  [0, -20]
	  DstBlock		  "S-R_Latch1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "interruptReset"
	  SrcPort		  1
	  DstBlock		  "S-R_Latch2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  Points		  [15, 0]
	  DstBlock		  "Logical"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "idlefordifs_inp"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Counter"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    Points		    [0, 165]
	    DstBlock		    "Relational1"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 100]
	    DstBlock		    "AddSub"
	    DstPort		    2
	  }
	  Branch {
	    Labels		    [1, 0]
	    DstBlock		    "Relational"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Relational"
	  SrcPort		  1
	  Points		  [5, 0]
	  Branch {
	    Points		    [0, 140]
	    DstBlock		    "Logical2"
	    DstPort		    3
	  }
	  Branch {
	    DstBlock		    "S-R_Latch2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -80; -230, 0; 0, 60]
	    DstBlock		    "Logical1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "countTo"
	  SrcPort		  1
	  Points		  [10, 0; 0, 50]
	  Branch {
	    DstBlock		    "Relational"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 105]
	    DstBlock		    "AddSub"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "mode"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "posedge"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    Points		    [0, -15]
	    DstBlock		    "Logical1"
	    DstPort		    3
	  }
	  Branch {
	    DstBlock		    "Logical3"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "start"
	  SrcPort		  1
	  DstBlock		  "posedge"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "timer1_active"
      Ports		      [1, 1]
      Position		      [1000, 103, 1060, 117]
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "gatewayout"
      block_version	      "9.1.01"
      sg_icon_stat	      "60,14,1,1,white,yellow,0,38220381,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([26 24 27 24 26 30 31"
" 32 36 33 30 28 31 28 30 33 36 32 31 30 26 ],[2 4 7 10 12 12 11 12 12 9 12 10"
" 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 14 14 0 ]);"
"\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon "
"text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label"
"('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT"
": end icon text');\n"
    }
    Block {
      BlockType		      SubSystem
      Name		      "timer2"
      Ports		      [8, 4]
      Position		      [290, 442, 400, 643]
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      MaskHideContents	      off
      System {
	Name			"timer2"
	Location		[58, 190, 1298, 1018]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "start"
	  Position		  [15, 163, 45, 177]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "stop"
	  Position		  [15, 288, 45, 302]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "resume"
	  Position		  [15, 188, 45, 202]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "pause"
	  Position		  [15, 313, 45, 327]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "mode"
	  Position		  [155, 23, 185, 37]
	  Port			  "5"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "interruptReset"
	  Position		  [680, 178, 710, 192]
	  Port			  "6"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "countTo"
	  Position		  [515, 83, 545, 97]
	  Port			  "7"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "idlefordifs_inp"
	  Position		  [155, 93, 185, 107]
	  Port			  "8"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "AddSub"
	  Ports			  [2, 1]
	  Position		  [665, 234, 710, 281]
	  SourceBlock		  "xbsIndex_r4/AddSub"
	  SourceType		  "Xilinx Adder/Subtractor Block"
	  mode			  "Subtraction"
	  use_carryin		  off
	  use_carryout		  off
	  en			  off
	  latency		  "0"
	  precision		  "User Defined"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  pipelined		  off
	  use_rpm		  on
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "addsub"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,46b4c804,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 "
"34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 "
"53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58"
" 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
"ort_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}'"
",'texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  Ports			  [0, 1]
	  Position		  [520, 349, 550, 361]
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Unsigned"
	  const			  "0"
	  n_bits		  "32"
	  bin_pt		  "0"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "50,50,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,12,1,1,white,blue,0,72d575a1,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 30 30 0 ],[0 0 12 12 ],[0.77 0.82 0.91]);\npatch([12 10 13 10 12 1"
"5 16 17 20 17 14 12 15 12 14 17 20 17 16 15 12 ],[1 3 6 9 11 11 10 11 11 8 11"
" 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]"
");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
"n text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: e"
"nd icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant1"
	  Ports			  [0, 1]
	  Position		  [155, 57, 190, 73]
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Unsigned"
	  const			  "1"
	  n_bits		  "1"
	  bin_pt		  "0"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,16,0,1,white,blue,0,06094819,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMME"
"NT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  Ports			  [1, 1]
	  Position		  [290, 55, 325, 75]
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating req"
"uire hardware resources; truncating and wrapping do not."
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,461,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,20,1,1,white,blue,0,74901e60,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2"
"3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20"
" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 "
"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
"OMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Counter"
	  Ports			  [2, 1]
	  Position		  [485, 119, 545, 221]
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are t"
"he least expensive in hardware.  A count limited counter is implemented by co"
"mbining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  use_rpm		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,630"
	  block_type		  "counter"
	  block_version		  "8.2"
	  sg_icon_stat		  "60,102,2,1,white,blue,0,46c73e85,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 "
"34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 "
"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nf"
"printf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  Ports			  [1, 1]
	  Position		  [660, 371, 705, 389]
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement)"
" operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1ab4a85f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 18 18 ],[0.77 0.82 0.91]);\npatch([18 15 19 15 18 2"
"3 24 25 30 26 22 19 23 19 22 26 30 25 24 23 18 ],[2 5 9 13 16 16 15 16 16 12 "
"16 13 9 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 18 18 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text"
"');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  Ports			  [2, 1]
	  Position		  [360, 174, 405, 216]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,261"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,42,2,1,white,blue,0,087b5522,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode'"
",'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  Ports			  [3, 1]
	  Position		  [430, 127, 465, 163]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "3"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,36,3,1,white,blue,0,bd50cad4,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
"'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  Ports			  [3, 1]
	  Position		  [187, 245, 223, 280]
	  Orientation		  "up"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "3"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "36,35,3,1,white,blue,0,bd50cad4,up"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 36 36 0 ],[0 0 35 35 ],[0.77 0.82 0.91]);\npatch([9 3 11 3 9 18 21"
" 24 34 26 19 14 22 14 19 26 34 24 21 18 9 ],[4 10 18 26 32 32 29 32 32 24 31 "
"26 18 10 5 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 36 36 0 0 ],[0 0 35 35 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on'"
");\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical3"
	  Ports			  [2, 1]
	  Position		  [170, 159, 200, 206]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "30,47,2,1,white,blue,0,f4a65842,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
"'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical4"
	  Ports			  [2, 1]
	  Position		  [735, 328, 780, 397]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,69,2,1,white,blue,0,087b5522,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 69 69 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 "
"25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[17 24 35 46 53 53 50 53 53 43"
" 53 46 35 24 17 27 17 17 20 17 17 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],["
"0 0 69 69 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME"
"NT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','te"
"xmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  Ports			  [3, 1]
	  Position		  [215, 13, 260, 117]
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,613f58e1,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3"
" 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70"
" 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 4"
"5 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphi"
"cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
"put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po"
"rt_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfpr"
"intf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational"
	  Ports			  [2, 1]
	  Position		  [585, 126, 625, 184]
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,58,2,1,white,blue,0,1b68ef8e,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 "
"50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
"ort_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\newlinez^"
"{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  Ports			  [2, 1]
	  Position		  [585, 326, 630, 364]
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a>b"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,38,1,1,white,blue,0,c445790c,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 38 38 ],[0.77 0.82 0.91]);\npatch([12 6 15 6 12 22 "
"25 28 39 31 23 17 26 17 23 31 39 28 25 22 12 ],[4 10 19 28 34 34 31 34 34 26 "
"34 28 19 10 4 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 38 "
"38 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');po"
"rt_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a>b}\\newlinez^{"
"-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R_Latch1"
	  Ports			  [2, 1]
	  Position		  [245, 167, 285, 238]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R_Latch1"
	    Location		    [837, 103, 1234, 376]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      Position		      [95, 58, 125, 72]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      Position		      [95, 88, 125, 102]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [220, 82, 250, 108]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
" text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      Ports		      [3, 1]
	      Position		      [150, 70, 195, 120]
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      "on"
	      en		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,50,1,1,white,blue,0,923c1847,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      Position		      [285, 63, 315, 77]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [10, 0; 0, 55; -130, 0]
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		Points			[0, -25]
		DstBlock		"Q"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Inverter"
		DstPort			1
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R_Latch2"
	  Ports			  [2, 1]
	  Position		  [745, 140, 785, 200]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R_Latch2"
	    Location		    [521, 318, 918, 591]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      Position		      [95, 58, 125, 72]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      Position		      [95, 88, 125, 102]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [220, 82, 250, 108]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
" text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      Ports		      [3, 1]
	      Position		      [150, 70, 195, 120]
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      "on"
	      en		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,50,1,1,white,blue,0,923c1847,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      Position		      [285, 63, 315, 77]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		DstBlock		"Inverter"
		DstPort			1
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Q"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [10, 0; 0, 55; -130, 0]
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "posedge"
	  Ports			  [1, 1]
	  Position		  [75, 163, 105, 177]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "posedge"
	    Location		    [459, 339, 854, 490]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "In"
	      Position		      [20, 33, 50, 47]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      Ports		      [1, 1]
	      Position		      [80, 67, 140, 123]
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain"
", each link of which is an SRL16 followed by a flip-flop. If register retimin"
"g is enabled, the delay line is a chain of flip-flops."
	      en		      "off"
	      latency		      "1"
	      dbl_ovrd		      "off"
	      reg_retiming	      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "60,56,1,1,white,blue,0,fc531c0e,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
"'','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [170, 66, 225, 124]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,58,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
"con text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      Ports		      [2, 1]
	      Position		      [260, 25, 315, 85]
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      "off"
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,60,1,1,white,blue,0,087b5522,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
"ode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Out"
	      Position		      [340, 48, 370, 62]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [5, 0; 0, -25]
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "In"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	      Branch {
		Points			[0, 55]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Out"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "posedge1"
	  Ports			  [1, 1]
	  Position		  [75, 188, 105, 202]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "posedge1"
	    Location		    [459, 339, 854, 490]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "In"
	      Position		      [20, 33, 50, 47]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      Ports		      [1, 1]
	      Position		      [80, 67, 140, 123]
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain"
", each link of which is an SRL16 followed by a flip-flop. If register retimin"
"g is enabled, the delay line is a chain of flip-flops."
	      en		      "off"
	      latency		      "1"
	      dbl_ovrd		      "off"
	      reg_retiming	      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "60,56,1,1,white,blue,0,fc531c0e,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
"'','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [170, 66, 225, 124]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,58,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
"con text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      Ports		      [2, 1]
	      Position		      [260, 25, 315, 85]
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      "off"
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,60,1,1,white,blue,0,087b5522,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
"ode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Out"
	      Position		      [340, 48, 370, 62]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Out"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "In"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		Points			[0, 55]
		DstBlock		"Delay"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [5, 0; 0, -25]
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Outport
	  Name			  "interrupt"
	  Position		  [810, 163, 840, 177]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "active"
	  Position		  [350, 253, 380, 267]
	  Port			  "2"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "paused"
	  Position		  [820, 358, 850, 372]
	  Port			  "3"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "timeLeft"
	  Position		  [740, 253, 770, 267]
	  Port			  "4"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "start"
	  SrcPort		  1
	  DstBlock		  "posedge"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "posedge"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    DstBlock		    "Logical3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -15]
	    DstBlock		    "Logical1"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "mode"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "countTo"
	  SrcPort		  1
	  Points		  [10, 0; 0, 50]
	  Branch {
	    Points		    [0, 105]
	    DstBlock		    "AddSub"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Relational"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Relational"
	  SrcPort		  1
	  Points		  [5, 0]
	  Branch {
	    Points		    [0, -80; -230, 0; 0, 60]
	    DstBlock		    "Logical1"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "S-R_Latch2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 140]
	    DstBlock		    "Logical2"
	    DstPort		    3
	  }
	}
	Line {
	  SrcBlock		  "Counter"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    Labels		    [1, 0]
	    DstBlock		    "Relational"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 100]
	    DstBlock		    "AddSub"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 165]
	    DstBlock		    "Relational1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "idlefordifs_inp"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  Points		  [15, 0]
	  DstBlock		  "Logical"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "interruptReset"
	  SrcPort		  1
	  DstBlock		  "S-R_Latch2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  Points		  [0, -20]
	  DstBlock		  "S-R_Latch1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "S-R_Latch2"
	  SrcPort		  1
	  DstBlock		  "interrupt"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "stop"
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    DstBlock		    "Logical2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -150]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "S-R_Latch1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    DstBlock		    "Logical"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 55]
	    DstBlock		    "active"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 175]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "AddSub"
	  SrcPort		  1
	  DstBlock		  "timeLeft"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "resume"
	  SrcPort		  1
	  DstBlock		  "posedge1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  DstBlock		  "S-R_Latch1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "posedge1"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "pause"
	  SrcPort		  1
	  Points		  [155, 0]
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  DstBlock		  "paused"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "timer2_active"
      Ports		      [1, 1]
      Position		      [1000, 123, 1060, 137]
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "gatewayout"
      block_version	      "9.1.01"
      sg_icon_stat	      "60,14,1,1,white,yellow,0,38220381,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([26 24 27 24 26 30 31"
" 32 36 33 30 28 31 28 30 33 36 32 31 30 26 ],[2 4 7 10 12 12 11 12 12 9 12 10"
" 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 14 14 0 ]);"
"\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon "
"text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label"
"('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT"
": end icon text');\n"
    }
    Block {
      BlockType		      SubSystem
      Name		      "timer3"
      Ports		      [8, 4]
      Position		      [290, 657, 400, 858]
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      MaskHideContents	      off
      System {
	Name			"timer3"
	Location		[58, 190, 1298, 1018]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "start"
	  Position		  [15, 163, 45, 177]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "stop"
	  Position		  [15, 288, 45, 302]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "resume"
	  Position		  [15, 188, 45, 202]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "pause"
	  Position		  [15, 313, 45, 327]
	  Port			  "4"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "mode"
	  Position		  [155, 23, 185, 37]
	  Port			  "5"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "interruptReset"
	  Position		  [680, 178, 710, 192]
	  Port			  "6"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "countTo"
	  Position		  [515, 83, 545, 97]
	  Port			  "7"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "idlefordifs_inp"
	  Position		  [155, 93, 185, 107]
	  Port			  "8"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "AddSub"
	  Ports			  [2, 1]
	  Position		  [665, 234, 710, 281]
	  SourceBlock		  "xbsIndex_r4/AddSub"
	  SourceType		  "Xilinx Adder/Subtractor Block"
	  mode			  "Subtraction"
	  use_carryin		  off
	  use_carryout		  off
	  en			  off
	  latency		  "0"
	  precision		  "User Defined"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  pipelined		  off
	  use_rpm		  on
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "addsub"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,47,2,1,white,blue,0,46b4c804,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 "
"34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 "
"53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58"
" 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
"ort_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}'"
",'texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  Ports			  [0, 1]
	  Position		  [520, 349, 550, 361]
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Unsigned"
	  const			  "0"
	  n_bits		  "32"
	  bin_pt		  "0"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "50,50,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "30,12,1,1,white,blue,0,72d575a1,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 30 30 0 ],[0 0 12 12 ],[0.77 0.82 0.91]);\npatch([12 10 13 10 12 1"
"5 16 17 20 17 14 12 15 12 14 17 20 17 16 15 12 ],[1 3 6 9 11 11 10 11 11 8 11"
" 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]"
");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
"n text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: e"
"nd icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant1"
	  Ports			  [0, 1]
	  Position		  [155, 57, 190, 73]
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Unsigned"
	  const			  "1"
	  n_bits		  "1"
	  bin_pt		  "0"
	  explicit_period	  off
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  off
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "constant"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,16,0,1,white,blue,0,06094819,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMME"
"NT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert1"
	  Ports			  [1, 1]
	  Position		  [290, 55, 325, 75]
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating req"
"uire hardware resources; truncating and wrapping do not."
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  latency		  "0"
	  dbl_ovrd		  off
	  pipeline		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,461,375"
	  block_type		  "convert"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,20,1,1,white,blue,0,74901e60,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2"
"3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20"
" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 "
"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
"OMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Counter"
	  Ports			  [2, 1]
	  Position		  [485, 119, 545, 221]
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are t"
"he least expensive in hardware.  A count limited counter is implemented by co"
"mbining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  load_pin		  off
	  rst			  on
	  en			  on
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  off
	  use_behavioral_HDL	  off
	  use_rpm		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,356,630"
	  block_type		  "counter"
	  block_version		  "8.2"
	  sg_icon_stat		  "60,102,2,1,white,blue,0,46c73e85,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 "
"34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 "
"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nf"
"printf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  Ports			  [1, 1]
	  Position		  [660, 371, 705, 389]
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement)"
" operator."
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,18,1,1,white,blue,0,1ab4a85f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 18 18 ],[0.77 0.82 0.91]);\npatch([18 15 19 15 18 2"
"3 24 25 30 26 22 19 23 19 22 26 30 25 24 23 18 ],[2 5 9 13 16 16 15 16 16 12 "
"16 13 9 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 18 18 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text"
"');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  Ports			  [2, 1]
	  Position		  [360, 174, 405, 216]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,261"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,42,2,1,white,blue,0,087b5522,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode'"
",'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  Ports			  [3, 1]
	  Position		  [430, 127, 465, 163]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "3"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "35,36,3,1,white,blue,0,bd50cad4,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
"'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical2"
	  Ports			  [3, 1]
	  Position		  [187, 245, 223, 280]
	  Orientation		  "up"
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "3"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "8.2"
	  sg_icon_stat		  "36,35,3,1,white,blue,0,bd50cad4,up"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 36 36 0 ],[0 0 35 35 ],[0.77 0.82 0.91]);\npatch([9 3 11 3 9 18 21"
" 24 34 26 19 14 22 14 19 26 34 24 21 18 9 ],[4 10 18 26 32 32 29 32 32 24 31 "
"26 18 10 5 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 36 36 0 0 ],[0 0 35 35 "
"0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin "
"icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on'"
");\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical3"
	  Ports			  [2, 1]
	  Position		  [170, 159, 200, 206]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "OR"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "9.1.01"
	  sg_icon_stat		  "30,47,2,1,white,blue,0,f4a65842,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode',"
"'on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical4"
	  Ports			  [2, 1]
	  Position		  [735, 328, 780, 397]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  on
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,69,2,1,white,blue,0,087b5522,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 69 69 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 "
"25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[17 24 35 46 53 53 50 53 53 43"
" 53 46 35 24 17 27 17 17 20 17 17 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],["
"0 0 69 69 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME"
"NT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','te"
"xmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux"
	  Ports			  [3, 1]
	  Position		  [215, 13, 260, 117]
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  off
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "mux"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,104,3,1,white,blue,3,613f58e1,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3"
" 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70"
" 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 4"
"5 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphi"
"cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
"put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po"
"rt_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfpr"
"intf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational"
	  Ports			  [2, 1]
	  Position		  [585, 126, 625, 184]
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a=b"
	  en			  off
	  latency		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "relational"
	  block_version		  "8.2"
	  sg_icon_stat		  "40,58,2,1,white,blue,0,1b68ef8e,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 "
"50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
"ort_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\newlinez^"
"{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational1"
	  Ports			  [2, 1]
	  Position		  [585, 326, 630, 364]
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a>b"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,38,1,1,white,blue,0,c445790c,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 38 38 ],[0.77 0.82 0.91]);\npatch([12 6 15 6 12 22 "
"25 28 39 31 23 17 26 17 23 31 39 28 25 22 12 ],[4 10 19 28 34 34 31 34 34 26 "
"34 28 19 10 4 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 38 "
"38 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');po"
"rt_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a>b}\\newlinez^{"
"-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R_Latch1"
	  Ports			  [2, 1]
	  Position		  [245, 167, 285, 238]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R_Latch1"
	    Location		    [837, 103, 1234, 376]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      Position		      [95, 58, 125, 72]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      Position		      [95, 88, 125, 102]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [220, 82, 250, 108]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
" text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      Ports		      [3, 1]
	      Position		      [150, 70, 195, 120]
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      "on"
	      en		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "20,20,348,193"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,50,1,1,white,blue,0,923c1847,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      Position		      [285, 63, 315, 77]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		DstBlock		"Inverter"
		DstPort			1
	      }
	      Branch {
		Points			[0, -25]
		DstBlock		"Q"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [10, 0; 0, 55; -130, 0]
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "S-R_Latch2"
	  Ports			  [2, 1]
	  Position		  [745, 140, 785, 200]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "S-R_Latch2"
	    Location		    [521, 318, 918, 591]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "S"
	      Position		      [95, 58, 125, 72]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Inport
	      Name		      "R"
	      Position		      [95, 88, 125, 102]
	      Port		      "2"
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [220, 82, 250, 108]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "30,26,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 30 30 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([8 4 10 4 8 "
"15 17 19 26 20 14 10 16 10 14 20 26 19 17 15 8 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 0 30 30 0 ],[0 26 26 "
"0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: be"
"gin icon text ');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon"
" text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Register"
	      Ports		      [3, 1]
	      Position		      [150, 70, 195, 120]
	      SourceBlock	      "xbsIndex_r4/Register"
	      SourceType	      "Xilinx Register Block"
	      init		      "0"
	      rst		      "on"
	      en		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0,0,0,0,0,0,0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "register"
	      block_version	      "VER_STRING_GOES_HERE"
	      sg_icon_stat	      "45,50,1,1,white,blue,0,923c1847,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s ');\npatch([0 45 45 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 1"
"0 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 4"
"3 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 45 45 0 ],[0"
" 50 50 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMM"
"ENT: begin icon text ');\ncolor('black');port_label('input',1,'d');\ncolor('b"
"lack');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en'"
");\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{"
"-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Q"
	      Position		      [285, 63, 315, 77]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "R"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "S"
	      SrcPort		      1
	      DstBlock		      "Register"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [10, 0; 0, 55; -130, 0]
	      DstBlock		      "Register"
	      DstPort		      3
	    }
	    Line {
	      SrcBlock		      "Register"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		Points			[0, -25]
		DstBlock		"Q"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Inverter"
		DstPort			1
	      }
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "posedge"
	  Ports			  [1, 1]
	  Position		  [75, 163, 105, 177]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "posedge"
	    Location		    [459, 339, 854, 490]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "In"
	      Position		      [20, 33, 50, 47]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      Ports		      [1, 1]
	      Position		      [80, 67, 140, 123]
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain"
", each link of which is an SRL16 followed by a flip-flop. If register retimin"
"g is enabled, the delay line is a chain of flip-flops."
	      en		      "off"
	      latency		      "1"
	      dbl_ovrd		      "off"
	      reg_retiming	      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "60,56,1,1,white,blue,0,fc531c0e,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
"'','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [170, 66, 225, 124]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,58,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
"con text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      Ports		      [2, 1]
	      Position		      [260, 25, 315, 85]
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      "off"
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,60,1,1,white,blue,0,087b5522,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
"ode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Out"
	      Position		      [340, 48, 370, 62]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Out"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "In"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		Points			[0, 55]
		DstBlock		"Delay"
		DstPort			1
	      }
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [5, 0; 0, -25]
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  SubSystem
	  Name			  "posedge1"
	  Ports			  [1, 1]
	  Position		  [75, 188, 105, 202]
	  MinAlgLoopOccurrences	  off
	  RTWSystemCode		  "Auto"
	  FunctionWithSeparateData off
	  MaskHideContents	  off
	  System {
	    Name		    "posedge1"
	    Location		    [459, 339, 854, 490]
	    Open		    off
	    ModelBrowserVisibility  off
	    ModelBrowserWidth	    200
	    ScreenColor		    "white"
	    PaperOrientation	    "landscape"
	    PaperPositionMode	    "auto"
	    PaperType		    "usletter"
	    PaperUnits		    "inches"
	    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
	    TiledPageScale	    1
	    ShowPageBoundaries	    off
	    ZoomFactor		    "100"
	    Block {
	      BlockType		      Inport
	      Name		      "In"
	      Position		      [20, 33, 50, 47]
	      IconDisplay	      "Port number"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Delay"
	      Ports		      [1, 1]
	      Position		      [80, 67, 140, 123]
	      SourceBlock	      "xbsIndex_r4/Delay"
	      SourceType	      "Xilinx Delay Block"
	      infoedit		      "Hardware notes: A delay line is a chain"
", each link of which is an SRL16 followed by a flip-flop. If register retimin"
"g is enabled, the delay line is a chain of flip-flops."
	      en		      "off"
	      latency		      "1"
	      dbl_ovrd		      "off"
	      reg_retiming	      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 1 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "delay"
	      block_version	      "8.2"
	      sg_icon_stat	      "60,56,1,1,white,blue,0,fc531c0e,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15"
" 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50"
" 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 "
"56 56 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf("
"'','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Inverter"
	      Ports		      [1, 1]
	      Position		      [170, 66, 225, 124]
	      SourceBlock	      "xbsIndex_r4/Inverter"
	      SourceType	      "Xilinx Inverter Block"
	      infoedit		      "Bitwise logical negation (one's complem"
"ent) operator."
	      en		      "off"
	      latency		      "0"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[0 0 0 0 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "inv"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,58,1,1,white,blue,0,1ab4a85f,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51"
" 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"58 58 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i"
"con text');\n"
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Logical"
	      Ports		      [2, 1]
	      Position		      [260, 25, 315, 85]
	      SourceBlock	      "xbsIndex_r4/Logical"
	      SourceType	      "Xilinx Logical Block Block"
	      logical_function	      "AND"
	      inputs		      "2"
	      en		      "off"
	      latency		      "0"
	      precision		      "Full"
	      arith_type	      "Unsigned"
	      n_bits		      "16"
	      bin_pt		      "0"
	      align_bp		      "on"
	      dbl_ovrd		      "off"
	      xl_use_area	      "off"
	      xl_area		      "[1 0 0 1 0 0 0]"
	      has_advanced_control    "0"
	      sggui_pos		      "-1,-1,-1,-1"
	      block_type	      "logical"
	      block_version	      "8.2"
	      sg_icon_stat	      "55,60,1,1,white,blue,0,087b5522,right"
	      sg_mask_display	      "fprintf('','COMMENT: begin icon graphic"
"s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13"
" 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52"
" 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 "
"60 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT"
": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm"
"ode','on');\nfprintf('','COMMENT: end icon text');\n"
	    }
	    Block {
	      BlockType		      Outport
	      Name		      "Out"
	      Position		      [340, 48, 370, 62]
	      IconDisplay	      "Port number"
	      BusOutputAsStruct	      off
	    }
	    Line {
	      SrcBlock		      "Delay"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Inverter"
	      DstPort		      1
	    }
	    Line {
	      SrcBlock		      "Inverter"
	      SrcPort		      1
	      Points		      [5, 0; 0, -25]
	      DstBlock		      "Logical"
	      DstPort		      2
	    }
	    Line {
	      SrcBlock		      "In"
	      SrcPort		      1
	      Points		      [0, 0; 5, 0]
	      Branch {
		DstBlock		"Logical"
		DstPort			1
	      }
	      Branch {
		Points			[0, 55]
		DstBlock		"Delay"
		DstPort			1
	      }
	    }
	    Line {
	      SrcBlock		      "Logical"
	      SrcPort		      1
	      Points		      [0, 0]
	      DstBlock		      "Out"
	      DstPort		      1
	    }
	  }
	}
	Block {
	  BlockType		  Outport
	  Name			  "interrupt"
	  Position		  [810, 163, 840, 177]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "active"
	  Position		  [350, 253, 380, 267]
	  Port			  "2"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "paused"
	  Position		  [820, 358, 850, 372]
	  Port			  "3"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "timeLeft"
	  Position		  [740, 253, 770, 267]
	  Port			  "4"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "Logical4"
	  SrcPort		  1
	  DstBlock		  "paused"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Inverter"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Relational1"
	  SrcPort		  1
	  DstBlock		  "Logical4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant"
	  SrcPort		  1
	  DstBlock		  "Relational1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "pause"
	  SrcPort		  1
	  Points		  [155, 0]
	  DstBlock		  "Logical2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "posedge1"
	  SrcPort		  1
	  DstBlock		  "Logical3"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical3"
	  SrcPort		  1
	  DstBlock		  "S-R_Latch1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "resume"
	  SrcPort		  1
	  DstBlock		  "posedge1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "AddSub"
	  SrcPort		  1
	  DstBlock		  "timeLeft"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "S-R_Latch1"
	  SrcPort		  1
	  Points		  [25, 0]
	  Branch {
	    Points		    [0, 175]
	    DstBlock		    "Inverter"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 55]
	    DstBlock		    "active"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Logical"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "stop"
	  SrcPort		  1
	  Points		  [70, 0]
	  Branch {
	    Points		    [0, -150]
	    DstBlock		    "Logical1"
	    DstPort		    2
	  }
	  Branch {
	    DstBlock		    "Logical2"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "S-R_Latch2"
	  SrcPort		  1
	  DstBlock		  "interrupt"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Logical2"
	  SrcPort		  1
	  Points		  [0, -20]
	  DstBlock		  "S-R_Latch1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "interruptReset"
	  SrcPort		  1
	  DstBlock		  "S-R_Latch2"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Logical1"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Convert1"
	  SrcPort		  1
	  Points		  [15, 0]
	  DstBlock		  "Logical"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "Convert1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "idlefordifs_inp"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Constant1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Counter"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    Points		    [0, 165]
	    DstBlock		    "Relational1"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 100]
	    DstBlock		    "AddSub"
	    DstPort		    2
	  }
	  Branch {
	    Labels		    [1, 0]
	    DstBlock		    "Relational"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Relational"
	  SrcPort		  1
	  Points		  [5, 0]
	  Branch {
	    Points		    [0, 140]
	    DstBlock		    "Logical2"
	    DstPort		    3
	  }
	  Branch {
	    DstBlock		    "S-R_Latch2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -80; -230, 0; 0, 60]
	    DstBlock		    "Logical1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "countTo"
	  SrcPort		  1
	  Points		  [10, 0; 0, 50]
	  Branch {
	    DstBlock		    "Relational"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 105]
	    DstBlock		    "AddSub"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Logical"
	  SrcPort		  1
	  DstBlock		  "Counter"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "mode"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "posedge"
	  SrcPort		  1
	  Points		  [15, 0]
	  Branch {
	    Points		    [0, -15]
	    DstBlock		    "Logical1"
	    DstPort		    3
	  }
	  Branch {
	    DstBlock		    "Logical3"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "start"
	  SrcPort		  1
	  DstBlock		  "posedge"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "timer3_active"
      Ports		      [1, 1]
      Position		      [1000, 143, 1060, 157]
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "gatewayout"
      block_version	      "9.1.01"
      sg_icon_stat	      "60,14,1,1,white,yellow,0,38220381,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 60 60 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([26 24 27 24 26 30 31"
" 32 36 33 30 28 31 28 30 33 36 32 31 30 26 ],[2 4 7 10 12 12 11 12 12 9 12 10"
" 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 14 14 0 ]);"
"\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon "
"text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label"
"('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT"
": end icon text');\n"
    }
    Block {
      BlockType		      SubSystem
      Name		      "timer_control"
      Ports		      [0, 1]
      Position		      [30, 374, 95, 416]
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      MaskHideContents	      off
      MaskIconFrame	      on
      MaskIconOpaque	      on
      MaskIconRotate	      "none"
      MaskIconUnits	      "autoscale"
      System {
	Name			"timer_control"
	Location		[938, 667, 1231, 867]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Reference
	  Name			  "Constant6"
	  Ports			  [0, 1]
	  Position		  [80, 127, 100, 143]
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Boolean"
	  const			  "1"
	  n_bits		  "16"
	  bin_pt		  "14"
	  explicit_period	  "off"
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "20,16,1,1,white,blue,0,06094819,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 20 20 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([6 3 7 3 6 10 11 "
"12 17 13 10 8 12 8 10 13 17 12 11 10 6 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 "
"5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\nf"
"printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon tex"
"t');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: end ic"
"on text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "From Register2"
	  Ports			  [0, 1]
	  Position		  [60, 25, 105, 75]
	  ShowName		  off
	  AttributesFormatString  "From Register\\n<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/From Register"
	  SourceType		  "Xilinx Shared Memory Based From Register Bl"
"ock"
	  infoedit		  "Register block that reads data to a shared "
"memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer_control_w'"
	  init			  "0"
	  period		  "1"
	  ownership		  "Locally owned and initialized"
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "412,24,383,246"
	  block_type		  "fromreg"
	  block_version		  "8.2"
	  sg_icon_stat		  "45,50,0,1,white,blue,0,4b212927,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','"
"COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Terminator
	  Name			  "Terminator"
	  Position		  [250, 115, 270, 135]
	  ShowName		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "To Register5"
	  Ports			  [2, 1]
	  Position		  [165, 98, 210, 147]
	  AttributesFormatString  "<< %<shared_memory_name> >>"
	  SourceBlock		  "xbsIndex_r4/To Register"
	  SourceType		  "Xilinx Shared Memory Based To Register Bloc"
"k"
	  infoedit		  "Register block that writes data to a shared"
" memory register.  Delay of one sample period."
	  shared_memory_name	  "'timer_control_r'"
	  init			  "0"
	  ownership		  "Locally owned and initialized"
	  explicit_data_type	  on
	  arith_type		  "Unsigned"
	  n_bits		  "32"
	  bin_pt		  "0"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,381,266"
	  block_type		  "toreg"
	  block_version		  "10.1.2"
	  sg_icon_stat		  "45,49,2,1,white,blue,0,77cabcdf,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n"
"fprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Outport
	  Name			  "D"
	  Position		  [180, 43, 210, 57]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "From Register2"
	  SrcPort		  1
	  Points		  [10, 0]
	  Branch {
	    Points		    [0, 60]
	    DstBlock		    "To Register5"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "D"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "To Register5"
	  SrcPort		  1
	  DstBlock		  "Terminator"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Constant6"
	  SrcPort		  1
	  DstBlock		  "To Register5"
	  DstPort		  2
	}
      }
    }
    Line {
      SrcBlock		      "timer"
      SrcPort		      4
      DstBlock		      "To Register"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant3"
      SrcPort		      1
      DstBlock		      "To Register2"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Constant4"
      SrcPort		      1
      DstBlock		      "To Register3"
      DstPort		      2
    }
    Line {
      SrcBlock		      "timer_control"
      SrcPort		      1
      Points		      [45, 0]
      Branch {
	Points			[0, -370]
	DstBlock		"Slice"
	DstPort			1
      }
      Branch {
	Points			[0, -345]
	DstBlock		"Slice1"
	DstPort			1
      }
      Branch {
	Points			[0, -320]
	DstBlock		"Slice2"
	DstPort			1
      }
      Branch {
	Points			[0, -155]
	DstBlock		"Slice6"
	DstPort			1
      }
      Branch {
	Points			[0, -105]
	DstBlock		"Slice8"
	DstPort			1
      }
      Branch {
	Points			[0, -130]
	DstBlock		"Slice7"
	DstPort			1
      }
      Branch {
	Points			[0, -80]
	DstBlock		"Slice9"
	DstPort			1
      }
      Branch {
	Points			[0, 60]
	DstBlock		"Slice12"
	DstPort			1
      }
      Branch {
	Points			[0, 85]
	DstBlock		"Slice13"
	DstPort			1
      }
      Branch {
	Points			[0, 135]
	DstBlock		"Slice15"
	DstPort			1
      }
      Branch {
	Points			[0, 110]
	DstBlock		"Slice14"
	DstPort			1
      }
      Branch {
	Points			[0, 160]
	DstBlock		"Slice16"
	DstPort			1
      }
      Branch {
	Points			[0, 185]
	DstBlock		"Slice17"
	DstPort			1
      }
      Branch {
	Points			[0, 275]
	DstBlock		"Slice18"
	DstPort			1
      }
      Branch {
	Points			[0, 300]
	DstBlock		"Slice19"
	DstPort			1
      }
      Branch {
	Points			[0, 325]
	DstBlock		"Slice20"
	DstPort			1
      }
      Branch {
	Points			[0, 350]
	DstBlock		"Slice21"
	DstPort			1
      }
      Branch {
	Points			[0, 375]
	DstBlock		"Slice22"
	DstPort			1
      }
      Branch {
	Points			[0, 400]
	DstBlock		"Slice23"
	DstPort			1
      }
      Branch {
	Points			[0, -55]
	DstBlock		"Slice10"
	DstPort			1
      }
      Branch {
	Points			[0, -30]
	DstBlock		"Slice11"
	DstPort			1
      }
      Branch {
	Points			[0, -295]
	DstBlock		"Slice3"
	DstPort			1
      }
      Branch {
	Points			[0, -270]
	DstBlock		"Slice4"
	DstPort			1
      }
      Branch {
	Points			[0, -245]
	DstBlock		"Slice5"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Slice6"
      SrcPort		      1
      DstBlock		      "timer1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Slice7"
      SrcPort		      1
      DstBlock		      "timer1"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Slice8"
      SrcPort		      1
      DstBlock		      "timer1"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Slice12"
      SrcPort		      1
      DstBlock		      "timer2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant1"
      SrcPort		      1
      DstBlock		      "To Register"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Constant2"
      SrcPort		      1
      DstBlock		      "To Register1"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Constant5"
      SrcPort		      1
      DstBlock		      "To Register4"
      DstPort		      2
    }
    Line {
      SrcBlock		      "From Register1"
      SrcPort		      1
      DstBlock		      "timer"
      DstPort		      7
    }
    Line {
      SrcBlock		      "Slice13"
      SrcPort		      1
      DstBlock		      "timer2"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Slice9"
      SrcPort		      1
      DstBlock		      "timer1"
      DstPort		      4
    }
    Line {
      SrcBlock		      "timer"
      SrcPort		      1
      Points		      [500, 0]
      Branch {
	DstBlock		"Logical"
	DstPort			1
      }
      Branch {
	DstBlock		"Concat1"
	DstPort			3
      }
    }
    Line {
      SrcBlock		      "timer1"
      SrcPort		      1
      Points		      [210, 0; 0, -205; 245, 0]
      Branch {
	Points			[0, 0]
	DstBlock		"Logical"
	DstPort			2
      }
      Branch {
	DstBlock		"Concat2"
	DstPort			3
      }
    }
    Line {
      SrcBlock		      "timer2"
      SrcPort		      1
      Points		      [215, 0; 0, -410; 195, 0]
      Branch {
	DstBlock		"Logical"
	DstPort			3
      }
      Branch {
	DstBlock		"Concat3"
	DstPort			3
      }
    }
    Line {
      SrcBlock		      "timer3"
      SrcPort		      1
      Points		      [220, 0; 0, -615; 145, 0]
      Branch {
	DstBlock		"Logical"
	DstPort			4
      }
      Branch {
	DstBlock		"Concat4"
	DstPort			3
      }
    }
    Line {
      SrcBlock		      "To Register"
      SrcPort		      1
      Points		      [20, 0; 0, 585]
      DstBlock		      "Gateway Out1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "To Register1"
      SrcPort		      1
      Points		      [15, 0; 0, 390]
      DstBlock		      "Gateway Out2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "To Register2"
      SrcPort		      1
      Points		      [10, 0; 0, 195]
      DstBlock		      "Gateway Out3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "To Register3"
      SrcPort		      1
      DstBlock		      "Gateway Out4"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Logical"
      SrcPort		      1
      DstBlock		      "TIMEREXPIRE"
      DstPort		      1
    }
    Line {
      SrcBlock		      "TIMEREXPIRE"
      SrcPort		      1
      Points		      [55, 0; 0, 240]
      DstBlock		      "Scope"
      DstPort		      1
    }
    Line {
      SrcBlock		      "timer"
      SrcPort		      2
      Points		      [495, 0; 0, 0]
      Branch {
	DstBlock		"timer0_active"
	DstPort			1
      }
      Branch {
	DstBlock		"Concat1"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Concat"
      SrcPort		      1
      Points		      [0, 25]
      DstBlock		      "To Register4"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Concat1"
      SrcPort		      1
      DstBlock		      "Convert"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Convert"
      SrcPort		      1
      DstBlock		      "Concat"
      DstPort		      4
    }
    Line {
      Labels		      [1, 0]
      SrcBlock		      "Concat4"
      SrcPort		      1
      DstBlock		      "Convert3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Convert3"
      SrcPort		      1
      DstBlock		      "Concat"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Concat3"
      SrcPort		      1
      DstBlock		      "Convert2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Convert2"
      SrcPort		      1
      DstBlock		      "Concat"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Concat2"
      SrcPort		      1
      DstBlock		      "Convert1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Convert1"
      SrcPort		      1
      DstBlock		      "Concat"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Slice"
      SrcPort		      1
      DstBlock		      "timer"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Slice1"
      SrcPort		      1
      DstBlock		      "timer"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Slice2"
      SrcPort		      1
      DstBlock		      "timer"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Slice3"
      SrcPort		      1
      DstBlock		      "timer"
      DstPort		      4
    }
    Line {
      SrcBlock		      "Slice4"
      SrcPort		      1
      DstBlock		      "timer"
      DstPort		      5
    }
    Line {
      SrcBlock		      "Slice5"
      SrcPort		      1
      DstBlock		      "timer"
      DstPort		      6
    }
    Line {
      SrcBlock		      "From Register3"
      SrcPort		      1
      DstBlock		      "timer1"
      DstPort		      7
    }
    Line {
      SrcBlock		      "From Register4"
      SrcPort		      1
      DstBlock		      "timer2"
      DstPort		      7
    }
    Line {
      SrcBlock		      "Slice10"
      SrcPort		      1
      DstBlock		      "timer1"
      DstPort		      5
    }
    Line {
      SrcBlock		      "Slice11"
      SrcPort		      1
      DstBlock		      "timer1"
      DstPort		      6
    }
    Line {
      SrcBlock		      "Slice14"
      SrcPort		      1
      DstBlock		      "timer2"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Slice15"
      SrcPort		      1
      DstBlock		      "timer2"
      DstPort		      4
    }
    Line {
      SrcBlock		      "Slice16"
      SrcPort		      1
      DstBlock		      "timer2"
      DstPort		      5
    }
    Line {
      SrcBlock		      "Slice17"
      SrcPort		      1
      DstBlock		      "timer2"
      DstPort		      6
    }
    Line {
      SrcBlock		      "Slice18"
      SrcPort		      1
      DstBlock		      "timer3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Slice19"
      SrcPort		      1
      DstBlock		      "timer3"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Slice20"
      SrcPort		      1
      DstBlock		      "timer3"
      DstPort		      3
    }
    Line {
      SrcBlock		      "To Register4"
      SrcPort		      1
      DstBlock		      "Gateway Out"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant"
      SrcPort		      1
      DstBlock		      "IDLEFORDIFS"
      DstPort		      1
    }
    Line {
      SrcBlock		      "IDLEFORDIFS"
      SrcPort		      1
      Points		      [10, 0]
      Branch {
	DstBlock		"timer"
	DstPort			8
      }
      Branch {
	Points			[0, 215]
	DstBlock		"timer1"
	DstPort			8
      }
      Branch {
	Points			[0, 430]
	DstBlock		"timer2"
	DstPort			8
      }
      Branch {
	Points			[0, 645]
	DstBlock		"timer3"
	DstPort			8
      }
    }
    Line {
      SrcBlock		      "Slice21"
      SrcPort		      1
      DstBlock		      "timer3"
      DstPort		      4
    }
    Line {
      SrcBlock		      "Slice22"
      SrcPort		      1
      DstBlock		      "timer3"
      DstPort		      5
    }
    Line {
      SrcBlock		      "timer3"
      SrcPort		      4
      DstBlock		      "To Register3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "timer2"
      SrcPort		      4
      DstBlock		      "To Register2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "timer1"
      SrcPort		      4
      DstBlock		      "To Register1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "timer1"
      SrcPort		      2
      Points		      [240, 0; 0, -195; 210, 0]
      Branch {
	DstBlock		"timer1_active"
	DstPort			1
      }
      Branch {
	DstBlock		"Concat2"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "timer2"
      SrcPort		      2
      Points		      [245, 0; 0, -390; 160, 0]
      Branch {
	DstBlock		"timer2_active"
	DstPort			1
      }
      Branch {
	DstBlock		"Concat3"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "timer3"
      SrcPort		      2
      Points		      [250, 0; 0, -585; 110, 0]
      Branch {
	DstBlock		"timer3_active"
	DstPort			1
      }
      Branch {
	DstBlock		"Concat4"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "From Register5"
      SrcPort		      1
      DstBlock		      "timer3"
      DstPort		      7
    }
    Line {
      SrcBlock		      "Slice23"
      SrcPort		      1
      DstBlock		      "timer3"
      DstPort		      6
    }
    Line {
      SrcBlock		      "timer0_active"
      SrcPort		      1
      Points		      [40, 0; 0, 225]
      DstBlock		      "Scope"
      DstPort		      2
    }
    Line {
      SrcBlock		      "timer1_active"
      SrcPort		      1
      Points		      [30, 0; 0, 225]
      DstBlock		      "Scope"
      DstPort		      3
    }
    Line {
      SrcBlock		      "timer2_active"
      SrcPort		      1
      Points		      [20, 0; 0, 225]
      DstBlock		      "Scope"
      DstPort		      4
    }
    Line {
      SrcBlock		      "timer3_active"
      SrcPort		      1
      Points		      [10, 0; 0, 225]
      DstBlock		      "Scope"
      DstPort		      5
    }
    Line {
      SrcBlock		      "Gateway Out"
      SrcPort		      1
      DstBlock		      "Scope"
      DstPort		      6
    }
    Line {
      SrcBlock		      "Gateway Out1"
      SrcPort		      1
      DstBlock		      "Scope1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Gateway Out2"
      SrcPort		      1
      DstBlock		      "Scope1"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Gateway Out3"
      SrcPort		      1
      DstBlock		      "Scope1"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Gateway Out4"
      SrcPort		      1
      DstBlock		      "Scope1"
      DstPort		      4
    }
    Line {
      SrcBlock		      "timer"
      SrcPort		      3
      Points		      [190, 0; 0, 45; 300, 0]
      DstBlock		      "Concat1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "timer1"
      SrcPort		      3
      Points		      [270, 0; 0, -165; 175, 0]
      DstBlock		      "Concat2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "timer2"
      SrcPort		      3
      Points		      [280, 0; 0, -375; 120, 0]
      DstBlock		      "Concat3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "timer3"
      SrcPort		      3
      Points		      [285, 0; 0, -585; 70, 0]
      DstBlock		      "Concat4"
      DstPort		      1
    }
  }
}
MatData {
  NumRecords		  1
  DataRecord {
    Tag			    DataTag0
    Data		    "  %)30     .    &*H   8    (     @         %    "
"\"     $    !     0         %  0 !@    $    ,    <V%V960 =V]R:P        X   #@"
"5   !@    @    \"          4    (     0    $    !          4 !  ,     0   !@ "
"  !S:&%R960       !C;VUP:6QA=&EO;@ .    \\ 0   8    (     @         %    \"  "
"   $    !     0         %  0 $P    $   \"8    8V]M<&EL871I;VX          &-O;7!"
"I;&%T:6]N7VQU=     !S:6UU;&EN:U]P97)I;V0     :6YC<E]N971L:7-T         '1R:6U?"
"=F)I=',           !D8FQ?;W9R9               9&5P<F5C871E9%]C;VYT<F]L &)L;V-K7"
"VEC;VY?9&ES<&QA>0 .    .     8    (    !          %    \"     $    '     0   "
"      0    !P   '1A<F=E=#, #@   % \"   &    \"     (         !0    @    !    "
" 0    $         !0 $  <    !    #@   &ME>7,   !V86QU97,    .    $ $   8    ( "
"    0         %    \"     $    #     0         .    0     8    (    !        "
"  %    \"     $    +     0         0    \"P   $A$3\"!.971L:7-T       .    2  "
"   8    (    !          %    \"     $    4     0         0    %    %=!4E @3U!"
"\"($5X<&]R=\"!4;V]L      X   !(    !@    @    $          4    (     0   !@   "
" !         !     8    17AP;W)T(&%S(&$@<&-O<F4@=&\\@141+#@   .@    &    \"    "
" $         !0    @    !     P    $         #@   #@    &    \"     0         !"
"0    @    !    !P    $         $     <   !T87)G970Q  X    X    !@    @    $  "
"        4    (     0    <    !         !     '    =&%R9V5T,@ .    .     8    "
"(    !          %    \"     $    '     0         0    !P   '1A<F=E=#, #@   # "
"    &    \"     0         !0    @    !     0    $         $  ! #$    .    ,  "
"   8    (    !          %    \"     $    #     0         0  , ;V9F  X   !(   "
" !@    @    $          4    (     0   !<    !         !     7    179E<GEW:&5R"
"92!I;B!3=6)3>7-T96T #@   $@    &    \"     0         !0    @    !    &     $ "
"        $    !@   !!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,.    ,     8    (    !   "
"       %    \"     $    #     0         0  , ;V9F  X    X    !@    @    $    "
"      4    (     0    <    !         !     '    1&5F875L=  .    D$\\   8    ("
"     @         %    \"     $    !     0         %  0 \"     $    8    =&%R9V5"
"T,0!T87)G970R '1A<F=E=#, #@   *@9   &    \"     (         !0    @    !     0 "
"   $         !0 $ !X    !    _ ,  &EN9F]E9&ET                             'AI"
";&EN>&9A;6EL>0                       '!A<G0                                  "
"'-P965D                                 '!A8VMA9V4                           "
"   '-Y;G1H97-I<U]T;V]L7W-G861V86YC960      '-Y;G1H97-I<U]T;V]L               "
"      &1I<F5C=&]R>0                           '1E<W1B96YC:%]S9V%D=F%N8V5D    "
"         '1E<W1B96YC:                            '-Y<V-L:U]P97)I;V0          "
"            &EN8W)?;F5T;&ES=%]S9V%D=F%N8V5D         '1R:6U?=F)I='-?<V=A9'9A;F"
"-E9            &1B;%]O=G)D7W-G861V86YC960              &-O<F5?9V5N97)A=&EO;E]"
"S9V%D=F%N8V5D     &-O<F5?9V5N97)A=&EO;@                   ')U;E]C;W)E9V5N7W-G"
"861V86YC960          ')U;E]C;W)E9V5N                         &1E<')E8V%T961?8"
"V]N=')O;%]S9V%D=F%N8V5D &5V86Q?9FEE;&0                          &AA<U]A9'9A;F"
"-E9%]C;VYT<F]L             '-G9W5I7W!O<P                           &)L;V-K7W1"
"Y<&4                          &)L;V-K7W9E<G-I;VX                      '-G7VEC"
";VY?<W1A=                        '-G7VUA<VM?9&ES<&QA>0                   '-G7"
"VQI<W1?8V]N=&5N=',                  '-G7V)L;V-K9W5I7WAM;                    &"
"-L;V-K7VQO8P                           '-Y;G1H97-I<U]L86YG=6%G90             "
"  &-E7V-L<@                               '!R97-E<G9E7VAI97)A<F-H>0          "
"     &-L;V-K7W=R87!P97(                      &1C;5]I;G!U=%]C;&]C:U]P97)I;V0  "
"              .    2     8    (    !          %    \"     $    1     0       "
"  0    $0   \"!3>7-T96T@1V5N97)A=&]R          X    X    !@    @    $         "
" 4    (     0    <    !         !     '    =FER=&5X-  .    .     8    (    ! "
"         %    \"     $    (     0         0    \"    'AC-'9S>#,U#@   #     & "
"   \"     0         !0    @    !     P    $         $  # \"TQ,  .    .     8 "
"   (    !          %    \"     $    %     0         0    !0   &9F-C8X    #@  "
" #     &    \"     0         !0    @               $         $          .    "
",     8    (    !          %    \"     $    #     0         0  , 6%-4  X   ! "
"    !@    @    $          4    (     0    D    !         !     )    +B]N971L:"
"7-T          X    P    !@    @    $          4    (               !         !"
"          #@   #     &    \"     0         !0    @    !     P    $         $ "
" # &]F9@ .    ,     8    (    !          %    \"     $    \"     0         0 "
" ( ,3    X    P    !@    @    $          4    (               !         !    "
"      #@   #     &    \"     0         !0    @               $         $     "
"     .    ,     8    (    !          %    \"                0         0      "
"    X    P    !@    @    $          4    (               !         !         "
" #@   $@    &    \"     0         !0    @    !    &     $         $    !@   !"
"!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,.    ,     8    (    !          %    \"     "
"           0         0          X    P    !@    @    $          4    (     0 "
"   ,    !         !   P!O9F8 #@   #     &    \"     0         !0    @        "
"       $         $          .    ,     8    (    !          %    \"     $    "
"!     0         0  $ ,     X    P    !@    @    $          4    (     0    $ "
"   !         !   0 P    #@   $     &    \"     0         !0    @    !    \"P "
"   $         $     L    M,2PM,2PM,2PM,0      #@   #@    &    \"     0        "
" !0    @    !    !@    $         $     8   !S>7-G96X   X    P    !@    @    $"
"          4    (     0    ,    !         !   P X+C( #@   %     &    \"     0 "
"        !0    @    !    '0    $         $    !T    U,2PU,\"PM,2PM,2QR960L8F5I"
"9V4L,\"PP-S<S-     X   #  0  !@    @    $          4    (     0   (X!   !    "
"     !    \". 0  9G!R:6YT9B@G)RPG0T]-345.5#H@8F5G:6X@:6-O;B!G<F%P:&EC<R<I.PIP"
"871C:\"A;,\" U,2 U,2 P(%TL6S @,\" U,\" U,\"!=+%LP+CDS(# N.3(@,\"XX-ETI.PIP871"
"C:\"A;,3(@-\" Q-B T(#$R(#(U(#(Y(#,S(#0W(#,V(#(U(#$W(#(Y(#$W(#(U(#,V(#0W(#,S(#"
"(Y(#(U(#$R(%TL6S4@,3,@,C4@,S<@-#4@-#4@-#$@-#4@-#4@,S0@-#4@,S<@,C4@,3,@-2 Q-B "
"U(#4@.2 U(#4@72Q;,\"XV(# N,B P+C(U72D[\"G!L;W0H6S @,\" U,2 U,2 P(%TL6S @-3 @-"
"3 @,\" P(%TI.PIF<')I;G1F*\"<G+\"=#3TU-14Y4.B!E;F0@:6-O;B!G<F%P:&EC<R<I.PIF<')"
"I;G1F*\"<G+\"=#3TU-14Y4.B!B96=I;B!I8V]N('1E>'0G*3L*9G!R:6YT9B@G)RPG0T]-345.5#"
"H@96YD(&EC;VX@=&5X=\"<I.PH   X    P    !@    @    $          4    (          "
"     !         !          #@   / +   &    \"     0         !0    @    !    NP"
"L   $         $    +L+   \\(2TM(\" J(\"!#;W!Y<FEG:'0@*&,I(#(P,#4L(%AI;&EN>\"P"
"@26YC+B @06QL(%)I9VAT<R!297-E<G9E9\"X@(\" @(\" @(\" @(\" M+3X\\(2TM(\" J(\"!2"
"97!R;V1U8W1I;VX@;W(@<F5U<V4L(&EN(&%N>2!F;W)M+\"!W:71H;W5T('1H92!E>'!L:6-I=\"!"
"W<FET=&5N(\" M+3X\\(2TM(\" J(\"!C;VYS96YT(&]F(%AI;&EN>\"P@26YC+BP@:7,@<W1R:6-"
"T;'D@<')O:&EB:71E9\"X@(\" @(\" @(\" @(\" @(\" @(\" M+3X\\<WES9V5N8FQO8VL@:&%S"
"7W5S97)D871A/2)T<G5E(B!T86<](F=E;E@B(&)L;V-K7W1Y<&4](G-Y<V=E;B(@<VEM=6QI;FMN8"
"6UE/2(@4WES=&5M($=E;F5R871O<B(@/@H@/&EC;VX@=VED=&@](C4Q(B!B9U]C;VQO<CTB8F5I9V"
"4B(&AE:6=H=#TB-3 B(&-A<'1I;VY?9F]R;6%T/2)3>7-T96U<;D=E;F5R871O<B(@=VUA<FM?8V]"
"L;W(](G)E9\"(@+SX*(#QC86QL8F%C:W,@1&5L971E1F-N/2)X;%-Y<V=E;D=522@G9&5L971E)RP"
"@9V-S+\"!G8V)H*3LB($]P96Y&8VX](GAL4WES9V5N1U5)*\"=S=&%R='5P)RQG8W,L9V-B:\"DB("
"$UO9&5L0VQO<V5&8VX](GAL4WES9V5N1U5)*\"=#;&]S92<L9V-S+&=C8F@I(B!0;W-T4V%V949C;"
"CTB>&Q3>7-G96Y'54DH)U-A=F4G*2(@+SX*(#QL:6)R87)I97,^\"B @/&QI8G)A<GD@;F%M93TB>"
"&)S26YD97@B(\"\\^\"B @/&QI8G)A<GD@;F%M93TB>&)S0F%S:6,B(\"\\^\"B @/&QI8G)A<GD@"
";F%M93TB>&)S5&]O;',B(\"\\^\"B \\+VQI8G)A<FEE<SX*(#QS=6)S>7-T96U?;6]D96P@9FEL9"
"3TB<WES=&5M7V=E;F5R871O<E]S=6)S>7-T96TN;61L(B O/@H@/&)L;V-K9W5I(&QA8F5L/2)8:6"
"QI;G@@4WES=&5M($=E;F5R871O<B(@/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;75L=&E"
"?;&EN93TB=')U92(@;F%M93TB:6YF;V5D:70B(')E861?;VYL>3TB=')U92(@9&5F875L=#TB(%-Y"
"<W1E;2!'96YE<F%T;W(B(\"\\^\"B @/&5D:71B;W@@979A;'5A=&4](F9A;'-E(B!N86UE/2)X:6"
"QI;GAF86UI;'DB(&1E9F%U;'0](E9I<G1E>#0B(&QA8F5L/2)8:6QI;G@@9F%M:6QY(B O/@H@(#Q"
"E9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93TB<&%R=\"(@9&5F875L=#TB>&,T=G-X,S4B(&Q"
"A8F5L/2)087)T(B O/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93TB<W!E960B(&1E"
"9F%U;'0](BTQ,\"(@;&%B96P](E-P965D(B O/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@"
";F%M93TB<&%C:V%G92(@9&5F875L=#TB9F8V-C@B(&QA8F5L/2)086-K86=E(B O/@H@(#QL:7-T8"
"F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)S>6YT:&5S:7-?=&]O;\"(@9&5F875L=#TB6%-4(B!L8"
"6)E;#TB4WEN=&AE<VES('1O;VPB(#X*(\" @/&ET96T@=F%L=64](E-P96-T<G5M(B O/@H@(\" "
"\\:71E;2!V86QU93TB4WEN<&QI9GDB(\"\\^\"B @(#QI=&5M('9A;'5E/2)3>6YP;&EF>2!0<F\\"
"B(\"\\^\"B @(#QI=&5M('9A;'5E/2)84U0B(\"\\^\"B @(#QI=&5M('9A;'5E/2)0<F5C:7-I;V"
"XB(\"\\^\"B @/\"]L:7-T8F]X/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93TB9&E"
"R96-T;W)Y(B!D969A=6QT/2(N+VYE=&QI<W0B(&QA8F5L/2)487)G970@9&ER96-T;W)Y(B O/@H@"
"(#QC:&5C:V)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB=&5S=&)E;F-H(B!D969A=6QT/2)O9F8B"
"(&QA8F5L/2)497-T8F5N8V@B(\"\\^\"B @/&5D:71B;W@@979A;'5A=&4](G1R=64B(&YA;64](G"
"-I;75L:6YK7W!E<FEO9\"(@9&5F875L=#TB,2(@;&%B96P](E-I;75L:6YK('!E<FEO9\"(@+SX*("
"\" \\961I=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB<WES8VQK7W!E<FEO9\"(@9&5F875L=#"
"TB,3 B(&QA8F5L/2)3>7-T96T@8VQO8VL@<&5R:6]D(B O/@H@(#QC:&5C:V)O>\"!E=F%L=6%T93"
"TB=')U92(@;F%M93TB:6YC<E]N971L:7-T(B!D969A=6QT/2)O9F8B(&QA8F5L/2));F-R96UE;G1"
"A;\"!N971L:7-T:6YG(B O/@H@(#QL:7-T8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)T<FEM7W9"
"B:71S(B!D969A=6QT/2)%=F5R>7=H97)E(&EN(%-U8E-Y<W1E;2(@;&%B96P](E1R:6T@=F%L:60@"
"8FET<R(@/@H@(\" \\:71E;2!V86QU93TB06-C;W)D:6YG('1O($)L;V-K($UA<VMS(B O/@H@(\""
" \\:71E;2!V86QU93TB179E<GEW:&5R92!I;B!3=6)3>7-T96TB(\"\\^\"B @(#QI=&5M('9A;'5"
"E/2).;R!7:&5R92!I;B!3=6)3>7-T96TB(\"\\^\"B @/\"]L:7-T8F]X/@H@(#QL:7-T8F]X(&5V"
"86QU871E/2)T<G5E(B!N86UE/2)D8FQ?;W9R9\"(@9&5F875L=#TB06-C;W)D:6YG('1O($)L;V-K"
"($UA<VMS(B!L86)E;#TB3W9E<G)I9&4@=VET:\"!D;W5B;&5S(B ^\"B @(#QI=&5M('9A;'5E/2)"
"!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,B(\"\\^\"B @(#QI=&5M('9A;'5E/2)%=F5R>7=H97)E"
"(&EN(%-U8E-Y<W1E;2(@+SX*(\" @/&ET96T@=F%L=64](DYO(%=H97)E(&EN(%-U8E-Y<W1E;2(@"
"+SX*(\" \\+VQI<W1B;W@^\"B @/&QI<W1B;W@@979A;'5A=&4](G1R=64B(&YA;64](F-O<F5?9V"
"5N97)A=&EO;B(@9&5F875L=#TB06-C;W)D:6YG('1O($)L;V-K($UA<VMS(B!L86)E;#TB1V5N97)"
"A=&4@8V]R97,B(#X*(\" @/&ET96T@=F%L=64](D%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<R(@+S"
"X*(\" @/&ET96T@=F%L=64](D5V97)Y=VAE<F4@079A:6QA8FQE(B O/@H@(\" \\:71E;2!V86QU"
"93TB3F]T($YE961E9\" M($%L<F5A9'D@1V5N97)A=&5D(B O/@H@(#PO;&ES=&)O>#X*(\" \\8V"
"AE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;64](G)U;E]C;W)E9V5N(B!D969A=6QT/2)O9F8B(&Q"
"A8F5L/2)2=6X@0V]R94=E;B(@+SX*(\" \\8VAE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;64](F"
"1E<')E8V%T961?8V]N=')O;\"(@9&5F875L=#TB;V9F(B!L86)E;#TB4VAO=R!D97!R96-A=&5D(&"
"-O;G1R;VQS(B O/@H@(#QH:61D96YV87(@979A;'5A=&4](G1R=64B(&YA;64](F5V86Q?9FEE;&0"
"B(&1E9F%U;'0](C B(\"\\^\"B \\+V)L;V-K9W5I/@H\\+W-Y<V=E;F)L;V-K/@H       X    "
"P    !@    @    $          4    (               !         !          #@   #  "
"   &    \"     0         !0    @    !    !     $         $  $ %9(1$P.    .   "
"  8    (    !@         %    \"     $    !     0         )    \"              "
" #@   #@    &    \"     8         !0    @    !     0    $         \"0    @   "
"            X   !     !@    @    $          4    (     0    T    !         ! "
"    -    0VQO8VL@16YA8FQE<P    X    P    !@    @    $          4    (     0  "
"  ,    !         !   P Q,#  #@   +@9   &    \"     (         !0    @    !    "
" 0    $         !0 $ !X    !    _ ,  &EN9F]E9&ET                             "
"'AI;&EN>&9A;6EL>0                       '!A<G0                               "
"   '-P965D                                 '!A8VMA9V4                        "
"      '-Y;G1H97-I<U]T;V]L7W-G861V86YC960      '-Y;G1H97-I<U]T;V]L            "
"         &1I<F5C=&]R>0                           '1E<W1B96YC:%]S9V%D=F%N8V5D "
"            '1E<W1B96YC:                            '-Y<V-L:U]P97)I;V0       "
"               &EN8W)?;F5T;&ES=%]S9V%D=F%N8V5D         '1R:6U?=F)I='-?<V=A9'9"
"A;F-E9            &1B;%]O=G)D7W-G861V86YC960              &-O<F5?9V5N97)A=&EO"
";E]S9V%D=F%N8V5D     &-O<F5?9V5N97)A=&EO;@                   ')U;E]C;W)E9V5N7"
"W-G861V86YC960          ')U;E]C;W)E9V5N                         &1E<')E8V%T96"
"1?8V]N=')O;%]S9V%D=F%N8V5D &5V86Q?9FEE;&0                          &AA<U]A9'9"
"A;F-E9%]C;VYT<F]L             '-G9W5I7W!O<P                           &)L;V-K"
"7W1Y<&4                          &)L;V-K7W9E<G-I;VX                      '-G7"
"VEC;VY?<W1A=                        '-G7VUA<VM?9&ES<&QA>0                   '"
"-G7VQI<W1?8V]N=&5N=',                  '-G7V)L;V-K9W5I7WAM;                  "
"  &-L;V-K7VQO8P                           '-Y;G1H97-I<U]L86YG=6%G90          "
"     &-E7V-L<@                               '!R97-E<G9E7VAI97)A<F-H>0       "
"        '!O<W1G96YE<F%T:6]N7V9C;@               '-E='1I;F=S7V9C;@            "
"                 .    2     8    (    !          %    \"     $    1     0    "
"     0    $0   \"!3>7-T96T@1V5N97)A=&]R          X    X    !@    @    $      "
"    4    (     0    @    !         !     (    =FER=&5X,G .    .     8    (   "
" !          %    \"     $    '     0         0    !P   'AC,G9P-S  #@   #     "
"&    \"     0         !0    @    !     @    $         $  \" \"TV   .    .    "
" 8    (    !          %    \"     $    &     0         0    !@   &9F,34Q-P  #"
"@   #     &    \"     0         !0    @               $         $          . "
"   ,     8    (    !          %    \"     $    #     0         0  , 6%-4  X  "
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"=\"!W<FET=&5N(\" M+3X\\(2TM(\" J(\"!C;VYS96YT(&]F(%AI;&EN>\"P@26YC+BP@:7,@<W1"
"R:6-T;'D@<')O:&EB:71E9\"X@(\" @(\" @(\" @(\" @(\" @(\" M+3X\\<WES9V5N8FQO8VL@"
":&%S7W5S97)D871A/2)T<G5E(B!T86<](F=E;E@B(&)L;V-K7W1Y<&4](G-Y<V=E;B(@<VEM=6QI;"
"FMN86UE/2(@4WES=&5M($=E;F5R871O<B(@/@H@/&EC;VX@=VED=&@](C4Q(B!B9U]C;VQO<CTB8F"
"5I9V4B(&AE:6=H=#TB-3 B(&-A<'1I;VY?9F]R;6%T/2)3>7-T96U<;D=E;F5R871O<B(@=VUA<FM"
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"E)RP@9V-S+\"!G8V)H*3LB($]P96Y&8VX](GAL4WES9V5N1U5)*\"=S=&%R='5P)RQG8W,L9V-B:"
"\"DB($UO9&5L0VQO<V5&8VX](GAL4WES9V5N1U5)*\"=#;&]S92<L9V-S+&=C8F@I(B!0;W-T4V%V"
"949C;CTB>&Q3>7-G96Y'54DH)U-A=F4G*2(@+SX*(#QL:6)R87)I97,^\"B @/&QI8G)A<GD@;F%M"
"93TB>&)S26YD97@B(\"\\^\"B @/&QI8G)A<GD@;F%M93TB>&)S0F%S:6,B(\"\\^\"B @/&QI8G)"
"A<GD@;F%M93TB>&)S5&]O;',B(\"\\^\"B \\+VQI8G)A<FEE<SX*(#QS=6)S>7-T96U?;6]D96P@"
"9FEL93TB<WES=&5M7V=E;F5R871O<E]S=6)S>7-T96TN;61L(B O/@H@/&)L;V-K9W5I(&QA8F5L/"
"2)8:6QI;G@@4WES=&5M($=E;F5R871O<B(@/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;7"
"5L=&E?;&EN93TB=')U92(@;F%M93TB:6YF;V5D:70B(')E861?;VYL>3TB=')U92(@9&5F875L=#T"
"B(%-Y<W1E;2!'96YE<F%T;W(B(\"\\^\"B @/&5D:71B;W@@979A;'5A=&4](F9A;'-E(B!N86UE/"
"2)X:6QI;GAF86UI;'DB(&1E9F%U;'0](E9I<G1E>#0B(&QA8F5L/2)8:6QI;G@@9F%M:6QY(B O/@"
"H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93TB<&%R=\"(@9&5F875L=#TB>&,T=G-X,S"
"4B(&QA8F5L/2)087)T(B O/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93TB<W!E960"
"B(&1E9F%U;'0](BTQ,\"(@;&%B96P](E-P965D(B O/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86Q"
"S92(@;F%M93TB<&%C:V%G92(@9&5F875L=#TB9F8V-C@B(&QA8F5L/2)086-K86=E(B O/@H@(#QL"
":7-T8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)S>6YT:&5S:7-?=&]O;\"(@9&5F875L=#TB6%-4"
"(B!L86)E;#TB4WEN=&AE<VES('1O;VPB(#X*(\" @/&ET96T@=F%L=64](E-P96-T<G5M(B O/@H@"
"(\" \\:71E;2!V86QU93TB4WEN<&QI9GDB(\"\\^\"B @(#QI=&5M('9A;'5E/2)3>6YP;&EF>2!0"
"<F\\B(\"\\^\"B @(#QI=&5M('9A;'5E/2)84U0B(\"\\^\"B @(#QI=&5M('9A;'5E/2)0<F5C:7"
"-I;VXB(\"\\^\"B @/\"]L:7-T8F]X/@H@(#QE9&ET8F]X(&5V86QU871E/2)F86QS92(@;F%M93T"
"B9&ER96-T;W)Y(B!D969A=6QT/2(N+VYE=&QI<W0B(&QA8F5L/2)487)G970@9&ER96-T;W)Y(B O"
"/@H@(#QC:&5C:V)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB=&5S=&)E;F-H(B!D969A=6QT/2)O"
"9F8B(&QA8F5L/2)497-T8F5N8V@B(\"\\^\"B @/&5D:71B;W@@979A;'5A=&4](G1R=64B(&YA;6"
"4](G-I;75L:6YK7W!E<FEO9\"(@9&5F875L=#TB,2(@;&%B96P](E-I;75L:6YK('!E<FEO9\"(@+"
"SX*(\" \\961I=&)O>\"!E=F%L=6%T93TB=')U92(@;F%M93TB<WES8VQK7W!E<FEO9\"(@9&5F87"
"5L=#TB,3 B(&QA8F5L/2)3>7-T96T@8VQO8VL@<&5R:6]D(B O/@H@(#QC:&5C:V)O>\"!E=F%L=6"
"%T93TB=')U92(@;F%M93TB:6YC<E]N971L:7-T(B!D969A=6QT/2)O9F8B(&QA8F5L/2));F-R96U"
"E;G1A;\"!N971L:7-T:6YG(B O/@H@(#QL:7-T8F]X(&5V86QU871E/2)T<G5E(B!N86UE/2)T<FE"
"M7W9B:71S(B!D969A=6QT/2)%=F5R>7=H97)E(&EN(%-U8E-Y<W1E;2(@;&%B96P](E1R:6T@=F%L"
":60@8FET<R(@/@H@(\" \\:71E;2!V86QU93TB06-C;W)D:6YG('1O($)L;V-K($UA<VMS(B O/@H"
"@(\" \\:71E;2!V86QU93TB179E<GEW:&5R92!I;B!3=6)3>7-T96TB(\"\\^\"B @(#QI=&5M('9"
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";V-K($UA<VMS(B!L86)E;#TB3W9E<G)I9&4@=VET:\"!D;W5B;&5S(B ^\"B @(#QI=&5M('9A;'5"
"E/2)!8V-O<F1I;F<@=&\\@0FQO8VL@36%S:W,B(\"\\^\"B @(#QI=&5M('9A;'5E/2)%=F5R>7=H"
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";2(@+SX*(\" \\+VQI<W1B;W@^\"B @/&QI<W1B;W@@979A;'5A=&4](G1R=64B(&YA;64](F-O<F"
"5?9V5N97)A=&EO;B(@9&5F875L=#TB06-C;W)D:6YG('1O($)L;V-K($UA<VMS(B!L86)E;#TB1V5"
"N97)A=&4@8V]R97,B(#X*(\" @/&ET96T@=F%L=64](D%C8V]R9&EN9R!T;R!\";&]C:R!-87-K<R"
"(@+SX*(\" @/&ET96T@=F%L=64](D5V97)Y=VAE<F4@079A:6QA8FQE(B O/@H@(\" \\:71E;2!V"
"86QU93TB3F]T($YE961E9\" M($%L<F5A9'D@1V5N97)A=&5D(B O/@H@(#PO;&ES=&)O>#X*(\" "
"\\8VAE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;64](G)U;E]C;W)E9V5N(B!D969A=6QT/2)O9F8"
"B(&QA8F5L/2)2=6X@0V]R94=E;B(@+SX*(\" \\8VAE8VMB;W@@979A;'5A=&4](G1R=64B(&YA;6"
"4](F1E<')E8V%T961?8V]N=')O;\"(@9&5F875L=#TB;V9F(B!L86)E;#TB4VAO=R!D97!R96-A=&"
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"7-T8F5N8VA?<V=A9'9A;F-E9             !T97-T8F5N8V@                           "
"!S>7-C;&M?<&5R:6]D                      !I;F-R7VYE=&QI<W1?<V=A9'9A;F-E9      "
"   !T<FEM7W9B:71S7W-G861V86YC960           !D8FQ?;W9R9%]S9V%D=F%N8V5D        "
"      !C;W)E7V=E;F5R871I;VY?<V=A9'9A;F-E9     !C;W)E7V=E;F5R871I;VX          "
"         !R=6Y?8V]R96=E;E]S9V%D=F%N8V5D          !R=6Y?8V]R96=E;@            "
"            !D97!R96-A=&5D7V-O;G1R;VQ?<V=A9'9A;F-E9 !E=F%L7V9I96QD           "
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":6-O;B!T97AT)RD[\"F9P<FEN=&8H)R<L)T-/34U%3E0Z(&5N9\"!I8V]N('1E>'0G*3L*   .   "
" ,     8    (    !          %    \"                0         0          X   #"
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"B;&]C:U]T>7!E/2)S>7-G96XB('-I;75L:6YK;F%M93TB(%-Y<W1E;2!'96YE<F%T;W(B(#X*(#QI"
"8V]N('=I9'1H/2(U,2(@8F=?8V]L;W(](F)E:6=E(B!H96EG:'0](C4P(B!C87!T:6]N7V9O<FUA="
"#TB4WES=&5M7&Y'96YE<F%T;W(B('=M87)K7V-O;&]R/2)R960B(\"\\^\"B \\8V%L;&)A8VMS($"
"1E;&5T949C;CTB>&Q3>7-G96Y'54DH)V1E;&5T92<L(&=C<RP@9V-B:\"D[(B!/<&5N1F-N/2)X;%"
"-Y<V=E;D=522@G<W1A<G1U<\"<L9V-S+&=C8F@I(B!-;V1E;$-L;W-E1F-N/2)X;%-Y<V=E;D=522"
"@G0VQO<V4G+&=C<RQG8V)H*2(@4&]S=%-A=F5&8VX](GAL4WES9V5N1U5)*\"=3879E)RDB(\"\\^"
"\"B \\;&EB<F%R:65S/@H@(#QL:6)R87)Y(&YA;64](GAB<TEN9&5X(B O/@H@(#QL:6)R87)Y(&Y"
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"I97,^\"B \\<W5B<WES=&5M7VUO9&5L(&9I;&4](G-Y<W1E;5]G96YE<F%T;W)?<W5B<WES=&5M+F"
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"7-T(B!L86)E;#TB5&%R9V5T(&1I<F5C=&]R>2(@+SX*(\" \\8VAE8VMB;W@@979A;'5A=&4](G1R"
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"6EG:'0](C4P(B!C87!T:6]N7V9O<FUA=#TB4WES=&5M7&Y'96YE<F%T;W(B('=M87)K7V-O;&]R/2"
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  }
}