Changes between Version 16 and Version 17 of 802.11/ResourceUsage


Ignore:
Timestamp:
Oct 24, 2014, 4:23:07 PM (10 years ago)
Author:
murphpo
Comment:

--

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  • 802.11/ResourceUsage

    v16 v17  
    1313
    1414||=  Resource  =||=  Used  =||
    15 || Slice Registers  || 66,535 out of 301,440 (22%) ||
    16 || LUTs  || 61,584 out of 150,720 (40%) ||
    17 || Block RAMs (see note 1)  || 244 of 416 (59%) ||
     15|| Slice Registers  || 66,702 out of 301,440 (22%) ||
     16|| LUTs  || 61,499 out of 150,720 (40%) ||
     17|| Block RAMs (see note 1)  || 228 of 416 (59%) ||
    1818|| DSP48 (multipliers)  || 155 of 768 (20%) ||
    1919|| MMCM_ADV  || 3 of 12 (25%) ||
     
    4646--------------
    4747Number of errors:      0
    48 Number of warnings:  303
     48Number of warnings:  305
    4949Slice Logic Utilization:
    50   Number of Slice Registers:                66,535 out of 301,440   22%
    51     Number used as Flip Flops:              66,378
     50  Number of Slice Registers:                66,702 out of 301,440   22%
     51    Number used as Flip Flops:              66,545
    5252    Number used as Latches:                      4
    5353    Number used as Latch-thrus:                  0
    5454    Number used as AND/OR logics:              153
    55   Number of Slice LUTs:                     61,584 out of 150,720   40%
    56     Number used as logic:                   51,442 out of 150,720   34%
    57       Number using O6 output only:          40,027
    58       Number using O5 output only:           1,242
     55  Number of Slice LUTs:                     61,499 out of 150,720   40%
     56    Number used as logic:                   51,449 out of 150,720   34%
     57      Number using O6 output only:          40,022
     58      Number using O5 output only:           1,254
    5959      Number using O5 and O6:               10,173
    6060      Number used as ROM:                        0
    61     Number used as Memory:                   6,925 out of  58,400   11%
     61    Number used as Memory:                   6,926 out of  58,400   11%
    6262      Number used as Dual Port RAM:          2,376
    6363        Number using O6 output only:         1,576
     
    6868        Number using O5 output only:             0
    6969        Number using O5 and O6:                  4
    70       Number used as Shift Register:         4,542
    71         Number using O6 output only:         4,344
    72         Number using O5 output only:            18
    73         Number using O5 and O6:                180
    74     Number used exclusively as route-thrus:  3,217
    75       Number with same-slice register load:  2,960
    76       Number with same-slice carry load:       239
     70      Number used as Shift Register:         4,543
     71        Number using O6 output only:         4,345
     72        Number using O5 output only:            19
     73        Number using O5 and O6:                179
     74    Number used exclusively as route-thrus:  3,124
     75      Number with same-slice register load:  2,876
     76      Number with same-slice carry load:       230
    7777      Number with other load:                   18
    7878
    7979Slice Logic Distribution:
    80   Number of occupied Slices:                25,370 out of  37,680   67%
    81   Number of LUT Flip Flop pairs used:       79,316
    82     Number with an unused Flip Flop:        20,810 out of  79,316   26%
    83     Number with an unused LUT:              17,732 out of  79,316   22%
    84     Number of fully used LUT-FF pairs:      40,774 out of  79,316   51%
    85     Number of unique control sets:           2,397
     80  Number of occupied Slices:                25,805 out of  37,680   68%
     81  Number of LUT Flip Flop pairs used:       79,887
     82    Number with an unused Flip Flop:        21,011 out of  79,887   26%
     83    Number with an unused LUT:              18,388 out of  79,887   23%
     84    Number of fully used LUT-FF pairs:      40,488 out of  79,887   50%
     85    Number of unique control sets:           2,402
    8686    Number of slice register sites lost
    87       to control set restrictions:           9,072 out of 301,440    3%
     87      to control set restrictions:           9,073 out of 301,440    3%
    8888
    8989  A LUT Flip Flop pair for this architecture represents one LUT paired with
     
    103103
    104104Specific Feature Utilization:
    105   Number of RAMB36E1/FIFO36E1s:                225 out of     416   54%
    106     Number using RAMB36E1 only:                225
     105  Number of RAMB36E1/FIFO36E1s:                209 out of     416   50%
     106    Number using RAMB36E1 only:                209
    107107    Number using FIFO36E1 only:                  0
    108108  Number of RAMB18E1/FIFO18E1s:                 37 out of     832    4%
     
    140140
    141141  Number of RPM macros:           15
    142 Average Fanout of Non-Clock Nets:                3.61
     142Average Fanout of Non-Clock Nets:                3.59
    143143}}}
    144144