Changes between Version 16 and Version 17 of 802.11/ResourceUsage
- Timestamp:
- Oct 24, 2014, 4:23:07 PM (10 years ago)
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802.11/ResourceUsage
v16 v17 13 13 14 14 ||= Resource =||= Used =|| 15 || Slice Registers || 66, 535out of 301,440 (22%) ||16 || LUTs || 61, 584out of 150,720 (40%) ||17 || Block RAMs (see note 1) || 2 44of 416 (59%) ||15 || Slice Registers || 66,702 out of 301,440 (22%) || 16 || LUTs || 61,499 out of 150,720 (40%) || 17 || Block RAMs (see note 1) || 228 of 416 (59%) || 18 18 || DSP48 (multipliers) || 155 of 768 (20%) || 19 19 || MMCM_ADV || 3 of 12 (25%) || … … 46 46 -------------- 47 47 Number of errors: 0 48 Number of warnings: 30 348 Number of warnings: 305 49 49 Slice Logic Utilization: 50 Number of Slice Registers: 66, 535out of 301,440 22%51 Number used as Flip Flops: 66, 37850 Number of Slice Registers: 66,702 out of 301,440 22% 51 Number used as Flip Flops: 66,545 52 52 Number used as Latches: 4 53 53 Number used as Latch-thrus: 0 54 54 Number used as AND/OR logics: 153 55 Number of Slice LUTs: 61, 584out of 150,720 40%56 Number used as logic: 51,44 2out of 150,720 34%57 Number using O6 output only: 40,02 758 Number using O5 output only: 1,2 4255 Number of Slice LUTs: 61,499 out of 150,720 40% 56 Number used as logic: 51,449 out of 150,720 34% 57 Number using O6 output only: 40,022 58 Number using O5 output only: 1,254 59 59 Number using O5 and O6: 10,173 60 60 Number used as ROM: 0 61 Number used as Memory: 6,92 5out of 58,400 11%61 Number used as Memory: 6,926 out of 58,400 11% 62 62 Number used as Dual Port RAM: 2,376 63 63 Number using O6 output only: 1,576 … … 68 68 Number using O5 output only: 0 69 69 Number using O5 and O6: 4 70 Number used as Shift Register: 4,54 271 Number using O6 output only: 4,34 472 Number using O5 output only: 1 873 Number using O5 and O6: 1 8074 Number used exclusively as route-thrus: 3, 21775 Number with same-slice register load: 2, 96076 Number with same-slice carry load: 23 970 Number used as Shift Register: 4,543 71 Number using O6 output only: 4,345 72 Number using O5 output only: 19 73 Number using O5 and O6: 179 74 Number used exclusively as route-thrus: 3,124 75 Number with same-slice register load: 2,876 76 Number with same-slice carry load: 230 77 77 Number with other load: 18 78 78 79 79 Slice Logic Distribution: 80 Number of occupied Slices: 25, 370 out of 37,680 67%81 Number of LUT Flip Flop pairs used: 79, 31682 Number with an unused Flip Flop: 2 0,810 out of 79,31626%83 Number with an unused LUT: 1 7,732 out of 79,316 22%84 Number of fully used LUT-FF pairs: 40, 774 out of 79,316 51%85 Number of unique control sets: 2, 39780 Number of occupied Slices: 25,805 out of 37,680 68% 81 Number of LUT Flip Flop pairs used: 79,887 82 Number with an unused Flip Flop: 21,011 out of 79,887 26% 83 Number with an unused LUT: 18,388 out of 79,887 23% 84 Number of fully used LUT-FF pairs: 40,488 out of 79,887 50% 85 Number of unique control sets: 2,402 86 86 Number of slice register sites lost 87 to control set restrictions: 9,07 2out of 301,440 3%87 to control set restrictions: 9,073 out of 301,440 3% 88 88 89 89 A LUT Flip Flop pair for this architecture represents one LUT paired with … … 103 103 104 104 Specific Feature Utilization: 105 Number of RAMB36E1/FIFO36E1s: 2 25 out of 416 54%106 Number using RAMB36E1 only: 2 25105 Number of RAMB36E1/FIFO36E1s: 209 out of 416 50% 106 Number using RAMB36E1 only: 209 107 107 Number using FIFO36E1 only: 0 108 108 Number of RAMB18E1/FIFO18E1s: 37 out of 832 4% … … 140 140 141 141 Number of RPM macros: 15 142 Average Fanout of Non-Clock Nets: 3. 61142 Average Fanout of Non-Clock Nets: 3.59 143 143 }}} 144 144