Changes between Version 28 and Version 29 of 802.11/ResourceUsage
- Timestamp:
- Aug 18, 2016, 2:32:51 PM (8 years ago)
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802.11/ResourceUsage
v28 v29 5 5 [[TracNav(802.11/TOC)]] 6 6 7 = 802.11 Reference Design v1.5. 2: Resource Usage =7 = 802.11 Reference Design v1.5.3: Resource Usage = 8 8 9 9 The 802.11 Reference Design targets the Virtex-6 LX240T FPGA on WARP v3 hardware. The FPGA resources used by the design change with each revision. The resource usage for the current release is listed below. … … 13 13 14 14 ||= Resource =||= Used =|| 15 || Slice Registers || 79, 221out of 301,440 (26%) ||16 || LUTs || 71,1 93out of 150,720 (47%) ||15 || Slice Registers || 79,340 out of 301,440 (26%) || 16 || LUTs || 71,142 out of 150,720 (47%) || 17 17 || Block RAMs (see note 1) || 261 of 416 (63%) || 18 18 || DSP48 (multipliers) || 182 of 768 (23%) || … … 48 48 Number of warnings: 352 49 49 Slice Logic Utilization: 50 Number of Slice Registers: 79, 221out of 301,440 26%51 Number used as Flip Flops: 79, 05950 Number of Slice Registers: 79,340 out of 301,440 26% 51 Number used as Flip Flops: 79,178 52 52 Number used as Latches: 4 53 53 Number used as Latch-thrus: 0 54 54 Number used as AND/OR logics: 158 55 Number of Slice LUTs: 71,1 93out of 150,720 47%56 Number used as logic: 58, 524 out of 150,720 38%57 Number using O6 output only: 44, 68558 Number using O5 output only: 1,48 659 Number using O5 and O6: 12, 35355 Number of Slice LUTs: 71,142 out of 150,720 47% 56 Number used as logic: 58,464 out of 150,720 38% 57 Number using O6 output only: 44,533 58 Number using O5 output only: 1,482 59 Number using O5 and O6: 12,449 60 60 Number used as ROM: 0 61 Number used as Memory: 7, 870out of 58,400 13%61 Number used as Memory: 7,913 out of 58,400 13% 62 62 Number used as Dual Port RAM: 2,522 63 63 Number using O6 output only: 1,546 … … 68 68 Number using O5 output only: 0 69 69 Number using O5 and O6: 12 70 Number used as Shift Register: 5,3 1771 Number using O6 output only: 4, 87772 Number using O5 output only: 1 873 Number using O5 and O6: 42 274 Number used exclusively as route-thrus: 4,7 9975 Number with same-slice register load: 3, 83276 Number with same-slice carry load: 49777 Number with other load: 4 7070 Number used as Shift Register: 5,360 71 Number using O6 output only: 4,920 72 Number using O5 output only: 17 73 Number using O5 and O6: 423 74 Number used exclusively as route-thrus: 4,765 75 Number with same-slice register load: 3,792 76 Number with same-slice carry load: 507 77 Number with other load: 466 78 78 79 79 Slice Logic Distribution: 80 Number of occupied Slices: 28, 957out of 37,680 76%81 Number of LUT Flip Flop pairs used: 91, 64082 Number with an unused Flip Flop: 22, 592 out of 91,64024%83 Number with an unused LUT: 20, 447 out of 91,64022%84 Number of fully used LUT-FF pairs: 48, 601 out of 91,64053%85 Number of unique control sets: 2,8 4980 Number of occupied Slices: 28,829 out of 37,680 76% 81 Number of LUT Flip Flop pairs used: 91,276 82 Number with an unused Flip Flop: 22,148 out of 91,276 24% 83 Number with an unused LUT: 20,134 out of 91,276 22% 84 Number of fully used LUT-FF pairs: 48,994 out of 91,276 53% 85 Number of unique control sets: 2,851 86 86 Number of slice register sites lost 87 to control set restrictions: 10,6 76out of 301,440 3%87 to control set restrictions: 10,681 out of 301,440 3% 88 88 89 89 A LUT Flip Flop pair for this architecture represents one LUT paired with … … 98 98 Number of bonded IOBs: 354 out of 600 59% 99 99 Number of LOCed IOBs: 354 out of 354 100% 100 IOB Flip Flops: 1 16100 IOB Flip Flops: 105 101 101 IOB Master Pads: 10 102 102 IOB Slave Pads: 10 … … 115 115 Number used as ILOGICE1s: 43 116 116 Number used as ISERDESE1s: 65 117 Number of OLOGICE1/OSERDESE1s: 200 out of 720 27%118 Number used as OLOGICE1s: 75117 Number of OLOGICE1/OSERDESE1s: 189 out of 720 26% 118 Number used as OLOGICE1s: 64 119 119 Number used as OSERDESE1s: 125 120 120 Number of BSCANs: 2 out of 4 50%
