| 44 | === 2. MAC Low Framework Changes === |
| 45 | The lower MAC framework manages control of the MAC and PHY cores and the circuits in the RF interfaces. In the reference code the framework enables protection signals between the Tx PHY, Rx PHY and MAC cores that automatically reset the Rx PHY whenever the Tx PHY is active. These signals guarantee the node never receives its own transmissions, either through leakage from the Tx to Rx analog circuits on one interface or between RF interfaces when both are enabled. The lower framework also tunes both RF interfaces to the same center frequency whenever the MAC application requests a different channel. |
| 46 | |
| 47 | ''' Tx/Rx Interlock ''': the PHY-level mutual-exclusion between Tx and Rx is enabled in two configuration registers, one in the Rx PHY, the other in the MAC core. To disable the interlock: |
| 48 | |
| 49 | In {{{wlan_phy_util.c}}} modify the {{{wlan_phy_init()}}} function: |
| 50 | {{{#!c |
| 51 | // Config bit WLAN_RX_REG_CFG_USE_TX_SIG_BLOCK holds Rx PHY inputs at 0 when Tx PHY is active |
| 52 | // Reference code sets this bit - must be disabled for FDD |
| 53 | // REG_SET_BITS(WLAN_RX_REG_CFG, WLAN_RX_REG_CFG_USE_TX_SIG_BLOCK); // ref code |
| 54 | REG_CLEAR_BITS(WLAN_RX_REG_CFG, WLAN_RX_REG_CFG_USE_TX_SIG_BLOCK); |
| 55 | }}} |
| 56 | |
| 57 | In {{{wlan_mac_low.c}}} modify the {{{wlan_mac_hw_init()}}} function: |
| 58 | {{{#!c |
| 59 | // Config bit WLAN_MAC_CTRL_MASK_BLOCK_RX_ON_TX blocks Rx pkt detection events when MAC core |
| 60 | // TX_PHY_ACTIVE latch is active - must be disabled for FDD |
| 61 | // REG_SET_BITS(WLAN_MAC_REG_CONTROL, WLAN_MAC_CTRL_MASK_BLOCK_RX_ON_TX); //ref code |
| 62 | REG_CLEAR_BITS(WLAN_MAC_REG_CONTROL, WLAN_MAC_CTRL_MASK_BLOCK_RX_ON_TX); |
| 63 | }}} |