Changes between Version 8 and Version 9 of 802.11/wlan_exp/Extending


Ignore:
Timestamp:
Dec 14, 2015, 9:55:26 PM (8 years ago)
Author:
murphpo
Comment:

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  • 802.11/wlan_exp/Extending

    v8 v9  
    6262The {{{process_user_cmd()}}} and {{{wlan_exp_process_user_cmd()}}} functions executed outside the context of an interrupt service routine. As a result these functions may be interrupted at any time. Almost all processing in CPU High occurs in ISR contexts, including all processing of wireless and Ethernet Tx/Rx. If your command handler accesses or modifies data structures that might be modified in one of the upper-level MAC's interrupt service routines, you must take precautions to avoid bad states.
    6363
    64 The easiest way to protect a command handler from bad states due to unexpected interrupts is to disable interrupts during execution of the handler.
     64The easiest way to protect a command handler from bad states due to unexpected interrupts is to disable interrupts during execution of the handler. However disabling interrupts will have performance implications. When interrupts are disabled all packet processing is disabled in CPU High. This means no new Ethernet receptions can be processed, no new MPDUs can be submitted to CPU Low for transmission, and no wireless receptions will be processed. It also means all scheduled events will be postponed, including all LTG callbacks and beacon transmissions. You should always minimize the length of time interrupts are disabled.
     65
     66The MAC High Framework provides helper functions for disabling and restoring the interrupt controller state:
    6567
    6668{{{#!c
     
    8082
    8183
     84
    8285'''TODO:'''
    8386 * Endianness
    84  * Interrupt safety
    8587
    8688=== Example Command: Reading Tx Queue Status ===
     
    126128In this example the custom command will query the lengths of Tx queues.
    127129Modify the {{{wlan_exp_user_ap_process_cmd()}}} function in {{{wlan_mac_ap.c}}}.
    128 {{{#!C
    129     #define USER_CMDID_TX_QUEUE_STATUS 100
    130     int i;
    131     u32 req_queue_id;
    132     u32 q_id, q_occ;
    133         dl_entry* curr_station_info_entry;
    134         station_info* curr_station_info;
     130{{{#!c
     131
     132#define USER_CMDID_TX_QUEUE_STATUS 100
     133int i;
     134u32 req_queue_id;
     135u32 q_id, q_occ;
     136dl_entry* curr_station_info_entry;
     137station_info* curr_station_info;
    135138}}}
    136139