wiki:Exercises/14_3/IntroToXPS

Introduction to the Xilinx Platform Studio (XPS)

(compatible with WARP v2 and WARP v3)

In this exercise, users will be introduced to a tool that is used heavily in WARP development: the Xilinx Platform Studio (XPS). Users will embed a provided custom FPGA design into the existing WARP template project. This "peripheral core" (pcore) is provided in this exercise. To learn how this pcore is created, see the exercise Exercises/13_4/SysgenPcoreExport?.

Prerequisites

  • You have a WARP v2 or WARP v3 board
  • ESD protection for the WARP board (wrist strap, etc)
  • WARP v2: USB cable for programming and USB cable for UART
  • WARP v3: External USB JTAG cable and a micro USB cable for UART
  • Complete installation of ISE System Edition 13.4
  • Set up a terminal on your computer using PuTTY or an alternative. Instructions to do this are available instructions here?.
  • Comfort with the Xilinx SDK by completing the Introduction to SDK Exercise?.

Instructions

  1. Download either the WARP v3 Template Project or the WARP v2 Template Project? according to the which hardware you are using. Note: any template for your version of the hardware will work fine for this exercise as only the SDK is necessary. In general, when FPGA hardware designs must be generated, the "lite" template will build the quickest, but it lacks peripherals like Ethernet that may be necessary for the design.
  2. Extract the archive into a folder on your hard drive. Note: this folder must not contain any spaces in the path (this includes the the Windows desktop, as that lives in a folder known as "Documents and Settings").
  3. Download the

Last modified 12 years ago Last modified on Aug 16, 2012, 11:31:00 AM

Attachments (1)

Download all attachments as: .zip