= MAC Layer Development on WARP = Within the Xilinx Virtex-II Pro lies two PowerPC 405 processors. Currently, we use only one of these cores. The PPC has two primary functions in our system: Peripheral control and MAC-level processing. === Peripheral Control === The commercial and custom peripherals that make up the designs need C-code drivers to wrap around register reads and writes. For our systems, these tasks are divided between the peripheral drivers and an additional layer of abstraction called [wiki:WARPPHY WARPPHY]. === MAC-level Processing === Above the control sublayer is the processing necessary to give the system MAC-level behavior like exponential backoffs and carrier-sensing. These tasks are divided between the user-level MAC code (such as [wiki:CSMAMAC CSMA MAC]) and a MAC framework called [wiki:WARPMAC WARPMAC]. == What we provide == * [wiki:"WARP FPGA Board XBD"] - WARP FPGA Board description file for Xilinx Platform Studio * [wiki:sysgen2opb sysgen2opb] - Matlab script to convert System Generator hardware co-simulation models into OPB peripherals * Custom Peripherals * [wiki:RadioController Radio Controller] - core and driver for controlling the WARP radio board * [wiki:RadioBridge Radio Bridge] - core used to interface the radio controller to the underlying hardware * [wiki:EEPROM] - core used to access the EEPROM devices located on the WARP FPGA and WARP radio boards. * [wiki:"SISO Automatic Gain Control" AGC] - Automatic Gain Control * [source:/PlatformSupport/CustomPeripherals/pcores Browse All Peripherals in the WARP Repository] == Requirements for MAC == In general, it is impossible to specify in full generality the information that must be shared between any possible MAC layer with any possible PHY. For example, novel cross-layer designs will require much more sharing of state information than present in the [wiki:OFDMReferenceDesign reference design]. However, a large class of PHY-MAC interfaces will share certain behaviors like triggers to begin transmission and header copy commands. With that in mind, we have created [wiki:WARPPHY WARPPHY] as an additional layer of abstraction to the drivers of our custom peripherals. New PHYs need to recreate this to provide a common interface to existing MAC layers. == Exercises == * [attachment:wiki:Workshops/Rice_2007March/Files:WARP_WorkshopExercise_2_sysgen2opbIntro.pdf?format=raw Introduction to sysgen2opb] (0.1MB PDF) [attachment:wiki:Workshops/Rice_2007March/Files:Lab2.zip?format=raw Lab Files] (4.5MB ZIP) * [attachment:wiki:Workshops/Rice_2007March/Files:WARP_WorkshopExercise_3_SweepingTx.pdf?format=raw Building a Simple Transmitter] (0.1MB PDF) [attachment:wiki:Workshops/Rice_2007March/Files:Lab3.zip?format=raw Lab Files] (7.6MB ZIP) == Reference Design == The primary [wiki:OFDMReferenceDesign reference design] uses an [wiki:OFDM OFDM PHY] and [wiki:CSMAMAC CSMA MAC].