Changes between Version 5 and Version 6 of GettingStarted/WARPv3/Hardware
- Timestamp:
- Aug 13, 2012, 12:29:47 PM (12 years ago)
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GettingStarted/WARPv3/Hardware
v5 v6 12 12 [[Image(wiki:GettingStarted/WARPv3/files:warpv3_labelled.jpg,nolink,valign=middle)]] 13 13 14 * '''User I/O:''' This collection of push buttons, LEDs, hexadecimal displays, dip switches, and debug header pins is used for interacting with the board. Designs can read value d from the switches and push buttons and can alsowrite values to the displays and LEDs. The debug header can be used for any number of purposes, such as providing a convenient way for one WARP board to trigger the action of another board over a wire.15 * '''Radio Interface A/B:''' We will sometimes refer to these interfaces as RFA and RFB, respectively. There interfaces provide the radios that allow designs to communicate at the 2.4GHz and 5GHz bands. For each radio interface, digital I and Q values from the FPGA are taken through digital-to-analog converters and are delivered to the transceiver for upconversion (i.e. wireless transmission). Wireless reception follows the reciprocal process where I and Q analog streams are taken from the transceiver through analog-to-digital conversion and are then delivered to the FPGA.16 * '''SDRAM:''' This SO-DIMM provides extra memory beyond the block RAM inside the FPGA.17 * '''Device label:''' This label contains the device name for the FPGA that is under the fan. This device is used in a number of places during the development process (such as exporting a peripheral core from Xilinx System Generator), so this label is present for convenient lookup.18 * ''' FPGA:''' Under the fan, the FPGA serves as the central processing system for the WARP board.14 * '''User I/O:''' This collection of push buttons, LEDs, hexadecimal displays, dip switches, and debug header pins is used for interacting with the board. Designs can read values from the switches and push buttons and can write values to the displays and LEDs. The debug header can be used for any number of purposes, such as providing a convenient way for one WARP board to trigger the action of another board over a wire. 15 * '''Radio Interfaces A & B:''' There interfaces provide the radios that allow designs to communicate at the 2.4GHz and 5GHz bands. For each radio interface, digital I and Q values from the FPGA are taken through digital-to-analog converters and are delivered to the transceiver for upconversion (i.e. wireless transmission). Wireless reception follows the reciprocal process where I and Q analog streams are taken from the transceiver through analog-to-digital conversion and are then delivered to the FPGA. The interfaces are labeled "RF A" and "RF B" on the board and in our reference designs. 16 * '''SDRAM:''' This DDR3 SO-DIMM provides extra memory beyond the block RAM inside the FPGA. The WARP v3 kit ships with a pre-tested 2GB SO-DIMM. 17 * '''Device label:''' This label shows the FPGA device on the WARP v3 board. This device is used in a number of places during the development process (such as exporting a peripheral core from Xilinx System Generator), so this label is present for convenient lookup. 18 * '''Virtex-6 FPGA:''' Under the fan, the FPGA serves as the central processing system for the WARP board. 19 19 * '''FMC HPC Slot:''' The FPGA Mezzanine Card High Pin Count slot provides connectivity to [http://www.vita.com/fmc.html an existing ecosystem of hardware] as well as future WARP-specific modules. 20 20 * '''Serial #:''' This is the unique serial number for the WARP board. This number is also programmed into an EEPROM on the board prior to shipping, allowing software running on the hardware to read this information. 21 * '''Ethernet A/B:''' The two 10/100/1000 Ethernet ports provide high-speed connectivity between the board and a wired network. 22 * '''JTAG:''' The JTAG connector allows direct programming of the board with the Xilinx tools.21 * '''Ethernet A/B:''' The two 10/100/1000 Ethernet ports provide high-speed connectivity between the board and a wired network. The ports are labeled "ETH A" and "ETH B" on the WARP v3 board and in our reference designs. 22 * '''JTAG:''' The JTAG connector allows direct programming of the Virtex-6 FPGA using a Digilent or Xilinx JTAG cable. 23 23 * '''SD Card:''' An alternative to programming the board over JTAG is to use the SD card. This allows non-volatile storage of programs that will automatically download and execute upon insertion of the SD card. 24 * '''UART:''' The Micro-USB connector on the board allows programs on the board to print messages to a terminal running on a computer.24 * '''UART:''' The micro-USB connector on the board allows programs on the board to print messages to a terminal running on a computer. 25 25 * '''Power Switch:''' The power switch controls power to the board. The "off" position is where the switch is furthest away from the power jack. The "on" position is where the switch is closest to the power jack. 26 26 * '''Power Jack:''' The power jack is where the 12V power supply that comes with the WARP hardware should be plugged in. '''Note: the power switch should be in the "off" position whenever the power plug is inserted or removed.''' This allows the circuitry controlled by the switch to properly sequence the power regulators on the board. … … 29 29 == Protecting your Hardware == 30 30 31 The WARP hardware is sensitive and can be damaged if steps are not taken to protect your hardware. In general, WARP should not be treated like a commercial device such as phone or tablet that has been built to withstand a degree of physical abuse-- WARP should be handled carefully. Furthermore, a number of specific steps should be taken.31 WARP v3 is designed as a prototyping platform. As such, the hardware is shipped as an exposed board, with the various connectors and interfaces ready for access by user designs. This also means that sensitive circuits on the hardware are exposed and can be damaged by misuse. You must take care when handling the WARP v3 board. 32 32 33 33 === Electrostatic Discharge Protection === … … 37 37 || [[Image(wiki:GettingStarted/files:important.png,nolink,valign=middle)]] || The WARP v3 board is sensitive to electrostatic discharge (ESD). You must take ESD precautions when handling the hardware. Always ensure you are grounded before touching the board. Damage due to ESD is not covered by warranty. || 38 38 39 Always make sure you are grounded before handling hardware. 39 Always make sure you are grounded before handling hardware. We recommend storing unused kits in the original anti-static packaging. When using the hardware, we recommend using proper ESD protection devices (grounded wrist straps, etc.). 40 40 41 41 === Overheating Protection === … … 49 49 === Radio Protection === 50 50 51 Whenever the radios are not in use, they should be terminated with the included 50ΩSMA terminators.51 Always ensure the SMA connector is terminated into a 50 ohm load before powering on the board. Whenever the radios are not in use, they should be terminated with the included 50 ohm SMA terminators. 52 52 53 53 [[Image(wiki:GettingStarted/WARPv3/files:warpv3_sma.jpg,nolink,valign=middle)]] … … 58 58 59 59 WARP v3 includes a FMC HPC slot for connectivity to other hardware. This connector is mechanically very solid, and care must be taken to brace the WARP board when connecting an FMC module. 60 61 The video below shows the proper technique for connecting an FMC module. '''Do not''' simply press the FMC module down. Always prevent flexing the WARP board by pinching the FMC module and the WARP board together. 62 60 63 {{{ 61 64 #!html 62 65 <iframe width="1024" height="576" src="http://www.youtube.com/embed/kMah3ED2qpI?rel=0" frameborder="0" allowfullscreen></iframe> 63 66 }}} 64 The above video shows the proper technique for connecting an FMC module. '''Do not''' simply press the FMC module down. Keep the WARP board from bending by pinching the FMC module and the WARP board together.65 67 66 68 === Removing an FMC Module === 67 69 68 Similarly, removing an FMC module requires bracing the WARP board from any flexing. 70 Similarly, removing an FMC module requires bracing the WARP board to prevent flexing. 71 72 The video below shows the proper technique for removing an FMC module. 69 73 70 74 {{{ … … 73 77 }}} 74 78 75 The above video shows the proper technique for removing FMC modules.
