Changes between Version 1 and Version 2 of HardwareUsersGuides/CM-MMCX/Config


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Timestamp:
Jan 16, 2013, 4:51:09 AM (9 years ago)
Author:
murphpo
Comment:

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  • HardwareUsersGuides/CM-MMCX/Config

    v1 v2  
    33
    44The CM-MMCX module includes a 2-position SIP switch connected to FPGA I/O. This switch can be used to configure per-node clocking in user applications at run time. The function of each switch is undefined by default. User applications must access the corresponding FPGA I/O and update clock configurations as needed.
     5
     6== w3_clock_controller Core ==
     7
     8The [wiki:cores/w3_clock_controller w3_clock_controller core] includes logic to read the CM-MMCX switch positions and set the RF and sampling clock sources automatically.
     9
     10For the sampling clock source the core reads the switch immediately after FPGA configuration and writes only the clock source register in the sampling clock buffer.
     11
     12For the RF reference clock source, the core provides register access to the switch settings, allowing user code to select the RF reference clock source.
    513
    614== FPGA Contraints ==