| Version 1 (modified by murphpo, 17 years ago) (diff) |
|---|
WARP FPGA Board Multi-Gigabit Transceivers
VTRX Configuration
Short bottom pins for 2.5v (required for WARP board-to-board links), top pins for 1.8v (for connections to AC-coupled transmitters).
Clocking
Left-oscillator connects to BREFCLK, right-oscillator connects to BREFCLK2, mount shunts to disable oscillators
