Changes between Version 19 and Version 20 of HardwareUsersGuides/FPGABoard_v2.2/MGTs
- Timestamp:
- Sep 22, 2009, 10:19:37 PM (15 years ago)
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HardwareUsersGuides/FPGABoard_v2.2/MGTs
v19 v20 33 33 === MGT Clocking === 34 34 35 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:MGT_Clk_Blkdgm.jpg, 500px)]]35 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:MGT_Clk_Blkdgm.jpg, 700px)]] 36 36 37 37 As mentioned, each MGT column has two input clocks that are shared. Any of the MGT tiles in that column share the clocks. In column 0 the clock inputs are located at tile 102 and tile 105. In column 1, the inputs are tile 10 and tile 13. There is an elaborate clock multiplexer scheme on the board that lets the user choose three of the four clock inputs.
