Changes between Version 27 and Version 28 of HardwareUsersGuides/FPGABoard_v2.2/MGTs

Timestamp:

Oct 8, 2009, 5:11:45 PM (15 years ago)

Author:

murphpo

Comment:

--

HardwareUsersGuides/FPGABoard_v2.2/MGTs

@@ -68 +68 @@
 ||'''Mux4'''||[[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_00.jpg)]]||[[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_01.jpg)]]||[[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_10.jpg)]]||[[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_11.jpg)]]||SW11, Bits 0 and 1||
 
+|| [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:muxSwitches_topRight.jpg)]] ||  [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:muxSwitches_botRight.jpg)]] ||  [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:muxSwitches_topLeft.jpg)]] ||  [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:muxSwitches_botLeft.jpg)]] || 
+||'''Mux 1'''||'''Mux 2'''||'''Mux 3'''||'''Mux 4'''||
+
 === Off-Board MGT Clock Connections ===
 The FPGA Board provides input and output interfaces for inter-board MGT clock connections. Each interface is composed of three connectors- 2 MMCX jacks, (for dual-coax cables) and a 4-pin 0.1" male header (for twisted pair cables). Only one cable type (either dual-coax or twisted pair) should be used per interface. The image below shows the interfaces on the FPGA Board.