Changes between Version 3 and Version 4 of HardwareUsersGuides/FPGABoard_v2.2/MGTs
- Timestamp:
- Sep 10, 2009, 10:55:41 AM (15 years ago)
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HardwareUsersGuides/FPGABoard_v2.2/MGTs
v3 v4 5 5 The Virtex-4 FPGA is equipped with 10 pairs of differential multi-gigabit transceivers. The MGTs can support data rates of up to 6.5 Gbps including standards such as SATA, gigabit Ethernet and Infiniband. Each of these requires a different clock speed for best performance. On the FPGA Board three different connectors have been provided: SATA host and target, HSSDC2 jacks and SFP modules. 6 6 7 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGA_Board_SATA.jpg)]] 8 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGA_Board_HSSDC2.jpg)]] 9 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGA_Board_SFP.jpg)]] 10 11 The MGTs on the FPGA are organized in two columns. Each MGT in a column can share clock sources.