Changes between Version 2 and Version 3 of HardwareUsersGuides/FPGABoard_v2.2/Memory


Ignore:
Timestamp:
Oct 17, 2009, 10:44:12 PM (15 years ago)
Author:
murphpo
Comment:

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  • HardwareUsersGuides/FPGABoard_v2.2/Memory

    v2 v3  
    99The WARP FPGA Board v2.2 includes a DDR2 SO-DIMM slot. This connector is routed to dedicated FPGA I/O and clocking resources and supports up to 2GB modules.
    1010
    11 '''FPGA Board SO-DIMM slot''' (shown with 2GB SO-DIMM installed)
    12 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGABoard_Memory.jpg, align=right)]]
     11'''FPGA Board SO-DIMM slot''' (shown with 2GB SO-DIMM installed)[[BR]]
     12[[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGABoard_Memory.jpg, width=300)]]
    1313
    1414In order to use the SO-DIMM, the user FPGA design must include a DDR2 memory controller. Thankfully, Xilinx provides (and maintains) a high performance controller as part of their Multi-Port Memory Controller (MPMC).