Changes between Version 4 and Version 5 of HardwareUsersGuides/FPGABoard_v2.2/OtherIO


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Timestamp:
Sep 8, 2009, 2:08:49 PM (15 years ago)
Author:
murphpo
Comment:

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  • HardwareUsersGuides/FPGABoard_v2.2/OtherIO

    v4 v5  
    1414
    1515=== Digital I/O ===
    16 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Images:FPGA_Board_DebugIO.jpg)]]
     16[[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGA_Board_DebugIO.jpg)]]
    1717
    1818There are 16-bits of unbuffered 3.3v I/O connected directly to FPGA I/O pins, routed to standard male 100mil header. The header has four ground pins in the corner positions. The 16 I/O signals are labeled at the header. Bits 0-7 are in the top row, bits 8-15 in the bottom, both arranged right-to-left.