Changes between Version 6 and Version 7 of HardwareUsersGuides/FPGABoard_v2.2/OtherIO


Ignore:
Timestamp:
Sep 18, 2009, 11:35:22 AM (15 years ago)
Author:
sgupta
Comment:

--

Legend:

Unmodified
Added
Removed
Modified

  • HardwareUsersGuides/FPGABoard_v2.2/OtherIO

    v6 v7  
    1414
    1515=== Digital I/O ===
    16 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGA_Board_DebugIO.jpg)]]
     16[[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGABoard_DebugIO.jpg)]]
    1717
    1818There are 16-bits of unbuffered 3.3v I/O connected directly to FPGA I/O pins, routed to standard male 100mil header. The header has four ground pins in the corner positions. The 16 I/O signals are labeled at the header. Bits 0-7 are in the top row, bits 8-15 in the bottom, both arranged right-to-left.