Changes between Version 20 and Version 21 of HardwareUsersGuides/RadioBoard_v1.4/Usage/TxDCOffset
- Timestamp:
- Apr 24, 2012, 9:36:54 PM (13 years ago)
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HardwareUsersGuides/RadioBoard_v1.4/Usage/TxDCOffset
v20 v21 17 17 The Tx DCO calibration algorithm is not publically available. However, we do distribute an FPGA configuration file which executes the calibration process automatically. This is the same program we use internally to calibrate new radio boards. 18 18 19 1. This program requires a serial terminal connected to your FPGA board. Configure the termianl for 9600bps .19 1. This program requires a serial terminal connected to your FPGA board. Configure the termianl for 9600bps (FPGA v1) or 57600bps (FPGA v2). 20 20 2. Download a copy of this configuraiton file:[[BR]] 21 21 WARP v1 (XC2VP70 FPGA): [attachment:wiki:HardwareUsersGuides/RadioBoard_v1.4/Usage/TxDCOffset/Files:WARP_Radio_TxDCO_Calibrate_FPGAv1.bit?format=raw WARP_Radio_TxDCO_Calibrate_FPGAv1.bit][[BR]]