Changes between Version 2 and Version 3 of HardwareUsersGuides/UserIOBoard_v1.0/Outputs
- Timestamp:
- Aug 5, 2008, 10:37:14 PM (16 years ago)
Legend:
- Unmodified
- Added
- Removed
- Modified
-
HardwareUsersGuides/UserIOBoard_v1.0/Outputs
v2 v3 25 25 == Buzzer == 26 26 27 The buzzer is a Soberton GT-0930RP2 ([http://www.soberton.com/NewFiles/Product%20PDFs/GT-0930RP2.pdf datasheet]). The buzzer has one control pin, tied to an FPGA output through a simple transistor circuit. The buzzer will only operate when the FPGA drives a logic 1 and a shunt is mounted on J4 (see image below). The pitch and volume can be controlled by modulating the frequency and duty cycle of the FPGAoutput driving the buzzer.27 The buzzer is a Soberton GT-0930RP2 ([http://www.soberton.com/NewFiles/Product%20PDFs/GT-0930RP2.pdf datasheet]). The buzzer has one control pin, tied to an FPGA output through a simple transistor circuit. The buzzer will only operate when the FPGA drives a logic 1 and a shunt is mounted on J4 (see image below). The pitch and volume can be controlled by modulating the frequency and duty cycle of the digital output driving the buzzer. 28 28 29 29