Changes between Version 4 and Version 5 of HardwareUsersGuides/WARPv3/Ethernet

Timestamp:

Nov 15, 2012, 10:35:23 AM (11 years ago)

Author:

murphpo

Comment:

--

HardwareUsersGuides/WARPv3/Ethernet

@@ -14 +14 @@
 
 '''Errata note:''' the ETH A MDIO and MDC signal labels are swapped in the WARP v3 rev 1.1 schematics. The constraints below reflect the correct connections and have been verified in hardware.
+
+== MAC Addresses ==
+The MAC address for each Ethernet interface is defined in user code at run-time. The API for setting the MAC address depends on your software design. If you're interacting with the Ethernet MAC directly (as in the OFDM ref design), you need to populate the source MAC address in your transmitted packets. If you're using a higher-layer API (like Xilnet in WARPLab) the MAC address is defined via a dedicated function.
+
+Mango has a block of MAC addresses assigned by the IEEE: {{{40-D8-55-04-20-00}}} to {{{40-D8-55-04-2F-FF}}}. We allocate two addresses from this range for each WARP v3 board. You can find your node's reserved addresses on a label on the back of the board. These addresses are also recorded in the board's EEPROM during manufacturing (see the [wiki:../EEPROM EEPROM page] for details).
+
+'''Note''': early WARP v3 kits did not include this label, nor do early kits have MAC addresses in the EEPROM. '''For boards with serial numbers lower than W3-a-00110''', you can calculate your board's addresses with:
+{{{
+ETH A address: 40-D8-55-04-20-00 + (serial number)*2
+ETH B address: 40-D8-55-04-20-00 + (serial number)*2 + 1
+}}}
+For example, for serial number W3-a-00050 the allocated addresses are {{{40-D8-55-04-20-64}}} and {{{40-D8-55-04-20-65}}}.
+
+For boards with serial numbers higher than W3-a-00110 this mapping does not apply. The assigned addresses will have no relation to the board serial number.
+
+== Hardware Constraints ==
 
 The FPGA pin constraints for the Ethernet interfaces are listed below.