Changes between Version 13 and Version 14 of OFDM/MIMO/Docs/ModelPorts
- Timestamp:
- Aug 29, 2009, 9:50:11 PM (15 years ago)
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OFDM/MIMO/Docs/ModelPorts
v13 v14 34 34 ||tx_antb_dac_i||||Output||16||I channel DAC output for antenna B|| 35 35 ||tx_antb_dac_q||||Output||16||Q channel DAC output for antenna B|| 36 36 ||rssi_clk_out||||Output||1||Clock for the RSSI ADC on every radio board; should be connected to corresponding port on each radio bridge|| 37 ||rssi_anta||||Input||10||RSSI ADC value; should be connected to corresponding radio bridge output port|| 38 ||rssi_antb||||Input||10||RSSI ADC value; should be connected to corresponding radio bridge output port|| 37 39 ||rx_int_badheader||||Output||1||Interrupt output signaling a received packet header failed CRC|| 38 40 ||rx_int_badpkt||||Output||1||Interrupt output signaling a received packet failed CRC|| 39 41 ||rx_int_goodpkt||||Output||1||Interrupt output signaling a received packet passed CRC and is ready for higher-layer processing|| 40 42 ||rx_int_goodheader||||Output||1||Interrupt output signaling a received packet's header was error-free; only asserts for packets with a payload beyond the header|| 41 42 43 ||rx_pktdetreset ||||Output||1||Active-high output indicating that packet detection events should be ignored while the PHY is busy|| 43 44 44 ||rx_reset ||||Input||1||Active-high global reset input; clears all internal state in the receiver model; does not clear register values|| 45 45 ||rx_anta_agc_done||||Input||1||Status signal from AGC core for antenna A; asserts high when AGC has settled|| 46 46 ||rx_anta_gainbb||||Input||5||Baseband gain value in [0...63] chosen by AGC on antenna A. Only valid after rx_antb_agc_done asserts|| 47 ||rx_anta_gainrf||||Input||2||RF gain value in ![1,2,3] chosen by AGC on antenna A. Only valid after rx_antb_agc_done asserts||47 ||rx_anta_gainrf||||Input||2||RF gain value in [1,2,3] chosen by AGC on antenna A. Only valid after rx_antb_agc_done asserts|| 48 48 ||rx_antb_agc_done||||Input||1||Status signal from AGC core for antenna A; asserts high when AGC has settled|| 49 49 ||rx_antb_gainbb||||Input||5||Baseband gain value in [0...63] chosen by AGC on antenna B. Only valid after rx_antb_agc_done asserts|| 50 ||rx_antb_gainrf||||Input||2||RF gain value in ![1,2,3] chosen by AGC on antenna B. Only valid after rx_antb_agc_done asserts|| 51 50 ||rx_antb_gainrf||||Input||2||RF gain value in [1,2,3] chosen by AGC on antenna B. Only valid after rx_antb_agc_done asserts|| 52 51 ||tx_reset||||Input||1||Active-high global reset input; clears all internal state in the transmitter model; does not clear register values|| 53 52 ||tx_starttransmit ||||Input||1||Active-high trigger to begin transmission of a packet; usually tied to one of the radio controller's TxStart outputs||
