MIMO OFDM? | Documentation? | Shared Memory Spaces

sysgen2opb

Programmable Modulation Schemes

The WARP MIMO OFDM core implements a flexible modulation scheme. The core allows any combination of modulation schemes across subcarriers and antennas to be used in a given packet. The schemes are programmed by writing a modulation selection for each subcarrier to a shared memory block in the core. Unique schemes can be programmed for the full-rate symbols at antennas A and B and for the base-rate symbols; see OFDM Frame Format for more details about base- and full-rate symbols.

The transmitter and receiver sections of the core have separate modulation selection memory blocks. The organization of these two memory blocks are identical. The C-code below illustrates the memory organization and how user-code can write to these memory blocks. The macros ofdm_TxRx_mimo_SMWO_TxModulation_OFFSET and ofdm_TxRx_mimo_SMWO_TxModulation_OFFSET represent the address offsets (relative to the OFDM core's base address) for the two memory blocks. These macros are defined in the OFDM core's driver (ofdm_TxRx_mimo.h).

void setModuation()
{
    //The following modulation schemes match the 802.11a/g standard
    // Each places data on 48 subcarriers
    // Zeros are inserted at the remaining 16 subcarriers:
    //   Subcarrier 0 (DC) must always be zero
    //   Subcarriers 7, 21, -7, -21 are used for pilot tones (i.e. zero data)
    //   Subcarriers [27:31] and [-32:-27] are zero to meet spectral mask requirements

    //The modulation is specified as a vector with 192 4-bit elements
    //The indicies below represent the subcarrier index:
    // x[0:63] specify the full-rate modulation for antenna A
    // x[64:127] specify the full-rate modulation for antenna B
    // x[128:191] specify the base-rate modulation

    //When re-cast as a vector of unsigned ints, the subcarrier indicies are mapped like:
    // [ [7 6 5 4 3 2 1 0] [15 14 13 12 11 10 9 8] [23 22 21 20 19 18 17 16] ...]
    //Thus, 
    //  unsigned int modMasks_qpsk[24] = {0x02222220, 0x22222222, 0x22022222 ...
    //results in zeros at subcarriers 0, 7 and 21...

    //QPSK modulation on 48 subcarriers
    unsigned int modMasks_qpsk[24] = {0x02222220, 0x22222222, 0x22022222, 0x00000222, 0x22000000, 0x22220222, 0x22222222, 0x22222202, 0x02222220, 0x22222222, 0x22022222, 0x00000222, 0x22000000, 0x22220222, 0x22222222, 0x22222202, 0x02222220, 0x22222222, 0x22022222, 0x00000222, 0x22000000, 0x22220222, 0x22222222, 0x22222202};

    //16-QAM on 48 subcarriers
    unsigned int modMasks_16qam[24] = {0x04444440, 0x44444444, 0x44044444, 0x00000444, 0x44000000, 0x44440444, 0x44444444, 0x44444404, 0x04444440, 0x44444444, 0x44044444, 0x00000444, 0x44000000, 0x44440444, 0x44444444, 0x44444404, 0x04444440, 0x44444444, 0x44044444, 0x00000444, 0x44000000, 0x44440444, 0x44444444, 0x44444404};

    //64-QAM on 48 subcarriers
    unsigned int modMasks_64qam[24] = {0x06666660, 0x66666666, 0x66066666, 0x00000666, 0x66000000, 0x66660666, 0x66666666, 0x66666606, 0x06666660, 0x66666666, 0x66066666, 0x00000666, 0x66000000, 0x66660666, 0x66666666, 0x66666606, 0x06666660, 0x66666666, 0x66066666, 0x00000666, 0x66000000, 0x66660666, 0x66666666, 0x66666606};

    unsigned char i;

    for(i=0; i<24; i++)
    {
        //Uncomment one of the following lines to select the modulation scheme at the Transmitter
        *((volatile unsigned int*)(XPAR_OFDM_TXRX_MIMO_OPBW_0_BASEADDR+ofdm_TxRx_mimo_SMWO_TxModulation_OFFSET+i*sizeof(int))) = modMasks_qpsk[i];
        //*((volatile unsigned int*)(XPAR_OFDM_TXRX_MIMO_OPBW_0_BASEADDR+ofdm_TxRx_mimo_SMWO_TxModulation_OFFSET+i*sizeof(int))) = modMasks_16qam[i];
        //*((volatile unsigned int*)(XPAR_OFDM_TXRX_MIMO_OPBW_0_BASEADDR+ofdm_TxRx_mimo_SMWO_TxModulation_OFFSET+i*sizeof(int))) = modMasks_64qam[i];
    }

    for(i=0; i<24; i++)
    {
        //Uncomment one of the following lines to select the modulation scheme at the Receiver
        *((volatile unsigned int*)(XPAR_OFDM_TXRX_MIMO_OPBW_0_BASEADDR+ofdm_TxRx_mimo_SMWO_RxModulation_OFFSET+i*sizeof(int))) = modMasks_qpsk[i];
        //*((volatile unsigned int*)(XPAR_OFDM_TXRX_MIMO_OPBW_0_BASEADDR+ofdm_TxRx_mimo_SMWO_RxModulation_OFFSET+i*sizeof(int))) = modMasks_16qam[i];
        //*((volatile unsigned int*)(XPAR_OFDM_TXRX_MIMO_OPBW_0_BASEADDR+ofdm_TxRx_mimo_SMWO_RxModulation_OFFSET+i*sizeof(int))) = modMasks_64qam[i];
    }
}

Receive Packet Buffer

Address: 0x10000

Transmit Packet Buffer

Address: 0x30000