Changes between Version 4 and Version 5 of OFDM/MIMO/Docs/Overview


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Timestamp:
Aug 29, 2009, 8:28:50 PM (15 years ago)
Author:
murphpo
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  • OFDM/MIMO/Docs/Overview

    v4 v5  
    55
    66=== Tools and Hardware Requirements === #Tools
    7 The MIMO OFDM core is designed using [http://www.xilinx.com/ise/optional_prod/system_generator.htm Xilinx's System Generator]. The current version of the core is compatible with System Generator 8.2.02 and 9.1.01. See [wiki:FAQ/General#WhatsoftwaretoolsarerequiredtouseWARP our FAQ] for more information on which Xilinx tools are required to use WARP.
     7The MIMO OFDM core is designed using [http://www.xilinx.com/ise/optional_prod/system_generator.htm Xilinx's System Generator]. The current version of the core is compatible with System Generator 10.1.03.
    88
    99==== Simulation ====
    10 The OFDM model can be used in the MATLAB/Simulink simulation environment using just System Generator.
     10The OFDM model can be used in the MATLAB/Simulink simulation environment using just System Generator. In simulation, the OFDM model runs a simple BER test, using the transmit subsystem to generate a waveform and the receive subsystem to process it. Please note that while the simulation is "full-duplex" (transmitting and receiving simultaneously), the core does not support full-duplex operating in hardware.
    1111
    1212==== Hardware ====
    13 In order to use the OFDM core in hardware, the model must be converted to an OPB-compliant peripheral. We use the WARP [wiki:sysgen2opb sysgen2opb] peripheral generation flow to convert the OFDM model into an OPB pcore. In order to use the OPB-version of the core, you will also need the [http://www.xilinx.com/ise/embedded_design_prod/platform_studio.htm Xilinx Embedded Devleopment Kit].
     13In order to use the OFDM core in hardware, the model must be converted to an PLB46-compliant peripheral. We use the EDK Export flow from System Generator to create the PLB-compatible memory interface, then integrate the OFDM core into a larger hardware/software project using the [http://www.xilinx.com/ise/embedded_design_prod/platform_studio.htm Xilinx Embedded Devleopment Kit].
    1414
    1515=== Files ===
    … …  
    1717
    1818[source:/ResearchApps/PHY/MIMO_OFDM/ofdm_txrx_mimo.mdl ofdm_txrx_mimo.mdl]
    19   Simulink/System Generator model for the full MIMO OFDM transceiver. This model is ready to simulate both the full transmit and receive chains. The scripts below are required to use this model. The OPB-compliant peripheral core is generated from this model using [wiki:sysgen2opb sysgen2opb].
     19  Simulink/System Generator model for the full MIMO OFDM transceiver.
    2020
    2121[source:/ResearchApps/PHY/MIMO_OFDM/ofdm_rx_mimo_init.m ofdm_rx_mimo_init.m]
    22   This script sets a number of initial values and parameters in the receiver model. It also requires [source:/ResearchApps/PHY/SISO_OFDM/ofdm_tx_init.m ofdm_tx_init.m],  [source:/ResearchApps/PHY/SISO_OFDM/ofdm_rx_init_packetTimingControl.m ofdm_rx_init_packetTimingControl.m] and [source:/ResearchApps/PHY/SISO_OFDM/CRC_table_gen.m CRC_table_gen.m].
     22  This script sets a number of initial values and parameters in the receiver subsystem.
    2323
    2424[source:/ResearchApps/PHY/MIMO_OFDM/ofdm_tx_mimo_init.m ofdm_tx_mimo_init.m]
    25   This script sets a number of initial values and parameters for the transmitter model. Some of these parameters are shared by both the transmitter and receiver models, so this script is also called by the receiver model's initilization script.
     25  This script sets a number of initial values and parameters for the transmitter subsystem. Some of these parameters are shared by both the transmitter and receiver models, so this script is also called by the receiver model's initilization script.
    2626
    2727[source:/ResearchApps/PHY/MIMO_OFDM/ofdm_rx_init_packetTimingControl.m ofdm_rx_init_packetTimingControl.m]
    … …  
    3333[source:/ResearchApps/PHY/MIMO_OFDM/calcTxCRC.m calcTxCRC.m]
    3434  MATLAB function which calculates the 32-bit CRC of a packet. This is used for simulation purposes only; the model implements both Tx and Rx CRC calculation in hardware.
    35