| | 1 | = [wiki:OFDM MIMO OFDM] | [wiki:OFDM/MIMO#Documentation Documentation] | Packet Buffer = |
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| | 3 | The OFDM core does not contain a packet buffer. Instead, it requires an external 64KB dual-port BRAM be instantiated alongside the core in the overall FPGA hardware design. The OFDM core includes top-level ports which must be tied directly to one port of this BRAM. |
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| | 5 | == Sub-Buffers == |
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| | 7 | The OFDM core divides the 64KB RAM into 32 2KB buffers. User code must specify which of these "sub-buffers" is used for transmitting and receiving packets. The Tx and Rx buffer indicies can be updated at anytime. This approach enables applications like queuing, back-to-back transmissions/receptions and dedicating buffers to particular packets which will be utilized many times. For example, an ACK packet can be generated at boot and loaded into one of the sub-buffers. Data packets would be loaded into a different buffer. Then, whenever the MAC protocol needs to send an ACK, it need only update the addresses of the prepared ACK, then trigger transmission from the dedicated ACK buffer. |
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| | 9 | User code must avoid changing the selected Tx/Rx buffers during a packet transmission or reception. |
