Basic FPGA Board
WARP Hardware
- WARP FPGA Board v1.2
- WARP Clock Board v1.1
Hardware Design
- PowerPC processor clocked at 160MHz
- On-chip memory: 32KB for data (DOCM), 64KB for instruction (IOCM)
- PLBv46 clocked at 40MHz, with peripherals:
- rs232 (instance of xps_uartlite) for UART with baudrate of 57600bps
- USER_IO (instance of xps_gpio) for user I/O (LEDs, switches & buttons)
Software Design
- User IO Demo
Last modified 13 years ago
Last modified on Mar 24, 2010, 9:43:35 AM