| | 4 | |
| | 5 | == SDK Hints == |
| | 6 | Some helpful things we've figured out: |
| | 7 | |
| | 8 | * Do not power cycle the FPGA Board or disconnect the JTAG/USB cable while SDK is running. Always quit SDK first. |
| | 9 | * If an active SDK session loses the JTAG connection, the JTAG cable will get locked and will fail to function for the current or future SDK sessions. The SDK may freeze in this state. Use Task Manager to kill eclipse.exe and xmd.exe. Then run iMPACT (Programs->Xilinx Design Suite 13.4->ISE Design Tools->32/64-bit Tools->iMPACT), double-click Boundary Scan, choose Output->Cable Reset. Then re-launch SDK to reestablish the JTAG connection. |
| | 10 | |
| | 11 | * The XMD console view in SDK is useful for debugging issues when communicating via JTAG. Open Xilnx Tools->XMD Console. In the new XMD Console tab, type {{{verbose}}} in the command box (bottom of the tab). |
| | 12 | |
| | 13 | * Force SDK to prompt for a workspace on every launch (Window->Preferences->General->Startup and Shutdown->Workspaces; check "Prompt for workspace on startup"). We found this is the best way to avoid confusion about what workspace is active. |
| | 14 | |
| | 15 | * Remarkably, ChipScope Analyzer and the SDK debugger can access the same JTAG cable simultaneously. This can be very useful (i.e. capture PHY state signals via ChipScope to verify what software sees via register reads). |
| | 16 | |
| | 17 | * Console tabs: |
| | 18 | * You can choose what log is shown in console tabs (little drop down arrow in Display Selected Console button\). |
| | 19 | * You can "pin" a console (Pin Console button), which prevents anything from switching the log source. |
| | 20 | * You can add a console tab, to view multiple logs simultaneously, each pinned to a different source. Having one tab pinned to SDK Log and one to C-Build is useful. |
| | 21 | |
| | 22 | * Changing the SDK log level to Trace is helpful for debugging odd SDK behavior (Window->Preferences->Xilinx SDK->Log Information Level) |
| | 23 | |
| | 24 | |
