Changes between Version 30 and Version 31 of WARPLab6/Releases


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Timestamp:
Jul 19, 2012, 11:23:38 AM (12 years ago)
Author:
chunter
Comment:

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  • WARPLab6/Releases

    v30 v31  
    55== Latest WARPLab Release ==
    66
    7 WARPLab '''Version 6.0''' is the latest WARPLab release.
     7WARPLab '''Version 6.1''' is the latest WARPLab release.
     8 * '''Notes for v6.1'''
     9  * Small, but important, bug fix. MAC addresses for each node were not updated based on dip switch value. This made any setup larger than 1 node fail due to arp table collisions. This has been resolved. v6.0 is deprecated and should not be used
    810 * '''Notes for v6.0'''
    911  * Posted July 2012
    … …  
    3335
    3436 * M-code:
    35   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_0/M_Code_Reference Reference M-Code Version 6.0]
    36   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_0/M_Code_Examples M-Code examples] that work with version 6.0 of the Reference M-code
     37  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_1/M_Code_Reference Reference M-Code Version 6.1]
     38  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_1/M_Code_Examples M-Code examples] that work with version 6.1 of the Reference M-code
    3739  * [http://warp.rice.edu/bigFiles/tcp_udp_ip_2.0.6b.zip New TCP/IP Toolbox for Matlab] that is responsible for a ~10x speedup in WARPLab. It is highly recommended to switch to this version of pnet.
    3840 * Bitstreams:
    39   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_0/Bitstreams/WARPLab_2x2_v06_00_FPGAv1.bit 2x2 MIMO bitstream for FPGA Version 1] (Virtex-II Pro)
    40   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_0/Bitstreams/WARPLab_4x4_v06_00_FPGAv1.bit 4x4 MIMO bitstream for FPGA Version 1] (Virtex-II Pro)
    41   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_0/Bitstreams/WARPLab_2x2_v06_00_FPGAv2.bit 2x2 MIMO bitstream for FPGA Version 2] (Virtex-4)
    42   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_0/Bitstreams/WARPLab_4x4_v06_00_FPGAv2.bit 4x4 MIMO bitstream for FPGA Version 2] (Virtex-4)
    43   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_0/ACE_Files/ ACE Files] -- [wiki:SystemACE Working with ACE files] ({{{_FPGAv1}}} is for Virtex-II Pro and {{{_FPGAv2}}} is for Virtex-4)
     41  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_1/Bitstreams/WARPLab_2x2_v06_01_FPGAv1.bit 2x2 MIMO bitstream for FPGA Version 1] (Virtex-II Pro)
     42  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_1/Bitstreams/WARPLab_4x4_v06_01_FPGAv1.bit 4x4 MIMO bitstream for FPGA Version 1] (Virtex-II Pro)
     43  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_1/Bitstreams/WARPLab_2x2_v06_01_FPGAv2.bit 2x2 MIMO bitstream for FPGA Version 2] (Virtex-4)
     44  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_1/Bitstreams/WARPLab_4x4_v06_01_FPGAv2.bit 4x4 MIMO bitstream for FPGA Version 2] (Virtex-4)
     45  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v06_1/ACE_Files/ ACE Files] -- [wiki:SystemACE Working with ACE files] ({{{_FPGAv1}}} is for Virtex-II Pro and {{{_FPGAv2}}} is for Virtex-4)
    4446 * Reference Design:
    45   * The XPS Reference Designs used to generate the 2x2 and 4x4 MIMO bitstreams that work with Version 6.0 of the Reference M-Code are available [wiki:WARPLab/RefDesign here]
     47  * The XPS Reference Designs used to generate the 2x2 and 4x4 MIMO bitstreams that work with Version 6.1 of the Reference M-Code are available [wiki:WARPLab/RefDesign here]
    4648 
    4749