48 | | 1. |
| 48 | |
| 49 | 1. The three WARP nodes should each have two two radio boards on slots 2 and 3. |
| 50 | |
| 51 | |
| 52 | 2. The WARP nodes should be given 0, 1 and 2 IDs. These IDs is controlled through the dip switches on the main board right below the FPGA. |
| 53 | |
| 54 | - Node with ID '0' should be connected to B2 and B3 ports on the channel emulator. This node will act as the source in the first time slot and the destination in the second time slot, |
| 55 | |
| 56 | - Node with ID '1' should be connected to A2 and A3 ports on the channel emulator. This node will act as the destination in the first time slot and the relay in the second time slot, |
| 57 | |
| 58 | - Node with ID '2' should be connected to A1 and A4 ports on the channel emulator. This node will act as the relay in the first time slot and is not used in the second time slot. |
| 59 | |
| 60 | |