Version 1 (modified by jdavis, 16 years ago) (diff) |
---|
WARP Workshop at Rice University - July 14-15, 2008
The materials from the workshop are all available below. The lab exercises require version 9.1 of the Xilinx tools (ISE, EDK and Sysgen).
Slides
- WARP Hardware & Design Flows by Charles Camp & Siddharth Gupta (3.0MB PDF)
- WARP PHY Design Flow by Patrick Murphy (4.1MB PDF)
- WARP MAC Design Flow by Chris Hunter (4.6MB PDF)
Lab Exercises
- Lab 1: Introduction to WARP Design Flows (0.1MB PDF) Adder Model Adder Pcore
- Lab 2: Introduction to WARPLab (0.1MB PDF) WARPLab source files
- Lab 3: Building a Simple Transmitter (0.1MB PDF) Lab 3 Files (13.2MB ZIP)
- Lab 4: Building a Simple "MAC" (0.1MB PDF) Lab 4 files
- Lab 5: Building a Unidirectional MAC (1.4MB PDF) Lab 5 files
- Lab 6: Building a Channel-Hopping MAC (1.3MB PDF) Lab 6 files