WARP v3 Radio Controller (radio_controller)

This core implements control interfaces for up to four MAX2829 transceivers, including both the digital control lines (TXEN, RXEN, etc.) and the MAX2829 SPI interface. The radio_controller driver provides user-callable functions to set the state and configure every parameter of the MAX2829.

The radio_controller core is packaged as a pcore which can instantiated in an XPS project. The design has been tested in hardware using Xilinx ISE 13.4.

Version note: This core was written from scratch for WARP v3 hardware. We are planning to port it back to WARP v1 and v2 hardware in the near future. Until then the previous version of the radio_controller (1.30.a) should be used with WARP v1 and v2 kits.

Hardware

The radio_controller hardware manages both the digital control lines and the SPI interface of the MAX2829.

Digital Control

The MAX2829 has four digital inputs which control the transceiver state: TXEN, RXEN, SHDN and RXHP. Refer to the

Driver

The radio_controller pcore includes a C driver to facilitate control of the MAX2829 from user code. Refer to the radio_controller driver documentation for more details.

All driver functions require the base memory address of the radio_controller pcore. This address is set in your XPS project. The EDK tools copy this address into a macro in the xparameters.h file when you generate a BSP. The auto-generated macro should be named XPAR_RADIO_CONTROLLER_0_BASEADDR (assuming your pcore instance is named radio_controller_0).

//Define our own macro, in case EDK changes its naming scheme in the future
// Assumes pcore instance is named w3_ad_controller_0; confirm in xparameters.h
#define RC_BASEADDR XPAR_RADIO_CONTROLLER_0_BASEADDR

Source

The full hardware and software source code is available in the repository: PlatformSupport/CustomPeripherals/pcores/radio_controller_v3_00_b. The VHDL, Verilog and C source code are made available under the WARP license.