sysgen2opb | General Design Flow

This section briefly describes the design flow for producing an OPB-compliant core from a Sysgen model. It is assumed herein that the reader is familiar with Matlab, Simulink, System Generator, and Xilinx Platform Studio.

  1. Select a directory in which your system generator model will reside. The complete path name of this working directory must not contain any spaces.
  2. Build a System Generator model of the peripheral core which will later be converted into your OPB-compliant peripheral.
  3. Copy the Matlab script file sysgen2opb.m and the peripheral model file skeleton periph model.mdl to the same directory as the model being converted.
  4. Execute sysgen2opb.m to convert the model.
  5. Use Sysgen to generate your peripheral core from the converted model. If you already have an existing XPS project in which the peripheral core will be used, System Generator may be configured to copy the generated core into the project’s local user repository. Otherwise, the generated core may be placed in any other user-specified directory.
  6. If you do not have an existing XPS project, create one.
  7. If necessary, copy the newly generated peripheral core into your XPS project’s local user repository.
  8. Add the peripheral core to your XPS project and verify/update the system address map. In XPS, the address range spanned by the peripheral (from base address to high address) MUST match the address range defined at the time of conversion! If it is necessary to remap the core to a different address range, the core must be regenerated from the original unconverted model.
  9. Write any user software required to interact with the peripheral core.
  10. Compile the complete system.
  11. Download and test the system.
Last modified 15 years ago Last modified on Oct 5, 2007, 2:08:21 PM