Changes between Version 35 and Version 36 of sysgen2opb

Timestamp:

Jun 16, 2006, 4:46:21 PM (18 years ago)

Author:

elliotng

Comment:

--

sysgen2opb

@@ -23 +23 @@
    1. Replace `newPrefix` with a string which will replace the `"no_reg"` prefix attached to unconverted gateways. Use a blank string (`''`) to simply strip the `"no_reg_"` prefix.
 
+== sysgenGWSM2opb Dual Port Requirements == 
+<B><U>DPRAM (Read only)</B></U>
+
+DPRAM Name Prefix: SMRO_
+
+<U>DPRAM Inport addrb Source Block</U>
+Name Prefix: SMROAddr_
+Block Type: Gateway In
+Output Type: UFix14_0
+
+<U>DPRAM Inport dinb Source Block</U>
+Name Prefix: SMROWE_
+Block Type: Xilinx Constant
+Constant Value: 0
+Number of bits: 32
+
+<U>DPRAM Inport web Source Block</U>
+Name Prefix: SMRODataI_
+Block Type: Xilinx Constant
+Output Type: Boolean
+Constant Value: 0
+
+<U>DPRAM Outport B Destination Block</U>
+Name Prefix: SMRODataO_
+Block Type: Gateway Out
+
+<B><U>DPRAM (Write only)</B></U>
+
+DPRAM Name Prefix: SMWO_
+
+<U>DPRAM Inport addrb Source Block</U>
+Name Prefix: SMWOAddr_
+Block Type: Gateway In
+Output Type: UFix14_0
+
+<U>DPRAM Inport dinb Source Block</U>
+Name Prefix: SMWOWE_
+Block Type: any Xilinx blocks that can set the output number of bits to 32
+Number of bits: 32
+
+<U>DPRAM Inport web Source Block</U>
+Name Prefix: SMWODataI_
+Block Type: Gateway In
+Output Type: Boolean
+
+<U>DPRAM Outport B Destination Block</U>
+Name Prefix: SMWODataO_
+Block Type: Gateway Out
+
+
 == Current Limitations ==
  * The script (''sysgen2opb.m'') and skeleton peripheral model (''skeleton_periph_model7.mdl'' and/or ''skeleton_periph_model8.mdl'') must in the same directory as the model you wish to convert.