Changes between Version 13 and Version 14 of HardwareUsersGuides/FPGABoard_v2.2/MGTs


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Timestamp:
Sep 18, 2009, 11:28:16 PM (15 years ago)
Author:
sgupta
Comment:

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  • HardwareUsersGuides/FPGABoard_v2.2/MGTs

    v13 v14  
    5050'''Multiplexer output select switches (bottom of the FPGA Board)'''
    5151
     52The following table details the value required for each bit of SW10 and SW11 to obtain the desired output.
    5253
    5354|| || '''MGT Clk A''' || '''MGT Clk B''' || '''MGT Clk C''' || '''MGT Clk D''' || '''SW/Bit''' ||
    54 || '''Mux1''' || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_00.jpg)]] || || || || SW11, Bits 0 and 1 ||
    55 || '''Mux2''' || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_00.jpg)]] || || || || SW11, Bits 0 and 1 ||
    56 || '''Mux3''' || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_00.jpg)]] || || || || SW11, Bits 0 and 1 ||
    57 || '''Mux4''' || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_00.jpg)]] || || || || SW11, Bits 0 and 1 ||
     55|| '''Mux1''' || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_00.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_01.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_10.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_11.jpg)]] || SW11, Bits 0 and 1 ||
     56|| '''Mux2''' || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_00.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_01.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_10.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_11.jpg)]] || SW11, Bits 0 and 1 ||
     57|| '''Mux3''' || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_00.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_01.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_10.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_11.jpg)]] || SW11, Bits 0 and 1 ||
     58|| '''Mux4''' || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_00.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_01.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_10.jpg)]] || [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:Dip_11.jpg)]] || SW11, Bits 0 and 1 ||
    5859
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