Changes between Version 7 and Version 8 of HardwareUsersGuides/FPGABoard_v2.2/MGTs
- Timestamp:
- Sep 18, 2009, 2:03:51 PM (15 years ago)
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HardwareUsersGuides/FPGABoard_v2.2/MGTs
v7 v8 6 6 7 7 The MGTs on the FPGA are organized in two columns. Each column has two clock inputs and all the MGTs in the column can use either of those clocks. Our design maximizes the functionality by allowing the user to select the clock frequency that is input to the columns. 8 9 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:MGT_Loc_Front.jpg)]] 10 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:MGT_Loc_Back.jpg)]] 11 12 All the MGT connectors are located on the north side of the FPGA Board; both on the top and bottom. 13 14 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGABoard_SATA.jpg)]] 15 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGABoard_HSSDC2.jpg)]] 16 [[Image(HardwareUsersGuides/FPGABoard_v2.2/Files:FPGABoard_SFP.jpg)]] 8 17 9 18 === MGT Connectors ===