Changes between Version 27 and Version 28 of WARPLab6/RefDesign


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Timestamp:
Aug 30, 2012, 8:37:45 AM (12 years ago)
Author:
chunter
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  • WARPLab6/RefDesign

    v27 v28  
    1212== Latest WARPLab Reference Design ==
    1313
    14  * '''WARPLab Version 6.1''' is the latest WARPLab Release, for new users we recommend using this version. It includes support for FPGA Version 2.
    15  * The following are the WARPLab XPS Reference Designs used to generate the bitstreams that work with version 6.1 of the WARPLab Reference M code. The xps projects for the v1 hardware (Virtex-II Pro) were generated with version 10.1.03 of the Xilinx tools. The xps projects for the v2 hardware (Virtex-4) were generated with the version 13.4 of the Xilinx tools. Note: This version of the Xilinx tool requires the SDK to make software changes. We have instructions for making software changes [wiki:XilinxSDK here].
     14 * '''WARPLab Version 6.2''' is the latest WARPLab Release and is recommended for new users. It adds support to the new WARP v3 hardware generation.
     15 * The following are the WARPLab EDK Reference Designs used to generate the bitstreams that work with version 6.2 of the WARPLab Reference M code. The EDK projects for the v3 hardware (Virtex-6) were generated with the version 13.4 of the Xilinx tools. Note: This version of the Xilinx tool requires the SDK to make software changes. We have instructions for making software changes [wiki:XilinxSDK here].
     16    * [http://warp.rice.edu/dl/refdes/warplab/v6.2/edk/w3_WARPLab_ReferenceDesign_v6p2_2rf.zip w3_WARPLab_ReferenceDesign_v6p2_2rf.zip (WARP v3, 2 Radio)]
     17 * For access to version 6.2 of the WARPLab Reference M Code and Getting Started on WARPLab please click [wiki:WARPLab here].
     18
     19
     20== Previous Releases ==
     21
     22 * '''WARPLab Version 6.1''' is the previous WARPLab Release
     23 * The following are the WARPLab XPS Reference Designs used to generate the bitstreams that work with version 6.1 of the WARPLab Reference M code. The XPS projects for the v1 hardware (Virtex-II Pro) were generated with version 10.1.03 of the Xilinx tools. The XPS projects for the v2 hardware (Virtex-4) were generated with the version 13.4 of the Xilinx tools. Note: This version of the Xilinx tool requires the SDK to make software changes. We have instructions for making software changes [wiki:XilinxSDK here].
    1624    * [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v06_01_FPGAv1.zip WARPLab_ReferenceDesign_2x2_v06_01_FPGAv1.zip]
    1725    * [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v06_01_FPGAv1.zip WARPLab_ReferenceDesign_4x4_v06_01_FPGAv1.zip]
    1826    * [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v06_01_FPGAv2.zip WARPLab_ReferenceDesign_2x2_v06_01_FPGAv2.zip]
    1927    * [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v06_01_FPGAv2.zip WARPLab_ReferenceDesign_4x4_v06_01_FPGAv2.zip]
    20  * For access to version 6.1 of the WARPLab Reference M Code and Getting Started on WARPLab please click [wiki:WARPLab here].
    21 
    22 
    23 == Previous Releases ==
    24 
    25 
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