Changes between Version 1 and Version 2 of cores/radio_controller

Timestamp:

Aug 12, 2012, 8:15:13 PM (12 years ago)

Author:

murphpo

Comment:

--

cores/radio_controller

@@ -9 +9 @@
 == Hardware ==
 
-The radio_controller hardware manages both the digital control lines and the SPI interface of the MAX2829.
+The radio_controller hardware manages both the digital control lines and the SPI interface of the MAX2829, as well as the power amplifier and RF switch. The sections below describe the functionality of the radio_controller hardware in detail.
 
-=== Digital Control ===
-The MAX2829 has four digital inputs which control the transceiver state: TXEN, RXEN, SHDN and RXHP. Refer to the
+=== Radio States ===
+The MAX2829 is always in one of five states: Transmit, Receive, Standby, Shutdown and Reset. The active state is set by the TXEN, RXEN and SHDN inputs. TXEN and RXEN are active high; SHDN is active low.
 
+||= State =||= SHDN =||= TXEN =||= RXEN =||= Description =||
+|| Shutdown || 0 || 0 || 0 || All blocks except SPI interface are shutdown ||
+|| Reset || 0 || 1 || 1 || All SPI registers returned to default values ||
+|| Standby || 1 || 0 || 0 || Tx and Rx paths shutdown; PLL active if MIMO mode enabled ||
+|| Transmit || 1 || 1 || 0 || 2.4 or 5GHz Tx path active, depending on selected center frequency ||
+|| Receive || 1 || 0 || 1 || 2.4 or 5GHz Rx path active, depending on selected center frequency ||
+
+The MAX2829 implements a "MIMO mode", which keeps the PLL running in the Standby state. By keeping the PLL active the phase offset between multiple MAX2829s sharing a reference clock is held constant across Tx->Rx and Rx->Tx state transitions. The radio_controller driver enables MIMO mode my default.
+
+=== MAX2829 Registers ===
+The MAX2829 has an SPI interface for writing internal registers. Unfortunately this SPI interface is write-only. As a result the current state of the registers cannot be explicitly read and must be inferred by the controller based on all previous register writes since the last reset.
+
+The radio_controller implements "mirror registers" which track the current state of the MAX2829 register bank. Whenever user code initiates an SPI write, the radio_controller HDL automatically updates the corresponding mirror register in the FPGA. This allows user code to read the current value of a MAX2829 register without having to explicitly track every register state in code.
+
+The MAX2829 internal registers are reset to their default states only in the Reset state. The radio_controller HDL monitors the TXEN, RXEN and SHDN lines for a reset condition and reset the mirror registers whenever the corresponding MAX2829 is reset.
+
+Refer to the driver documentation below for the functions which read and write the SPI and mirror registers.
+
+=== RF Front End ===
+The radio_controller logic also controls the state of the power amplifier and RF switch. The state of the PA and switch are automatically set by the radio_controller when the MAX2829 state changes. When the MAX2829 mode is Transmit, the radio_controller enables the correct PA (2.4 or 5GHz, depending on the programmed center frequency) and sets the RF switch to connect the PA output to the SMA jack. When the MAX2829 mode is Receive the radio_controller disables both PAs and connects the SMA jack to the MAX2829 Rx inputs.
+
+=== Transmit Sequencing ===
+
+----
 
 == Driver ==