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vb_decoder_rest.v

Last change on this file was 6299, checked in by murphpo, 6 years ago
Added pipeline reg in decoder Removed ILA in Rx PHY (easy to replace - needed ILA elsewhere)
File size: 84.3 KB

Line
1	// This file is copyright 2013 by Rice University and was ported from the
2	// original WARP OFDM Reference Design. It is distributed under the WARP license:
3	// http://warpproject.org/license
4
5
6	//**************************************************************
7	// File: unpack_m2n.v
8	// Author: Yang Sun (ysun@rice.edu)
9	// Birth: $ 1/15/07
10	// Des: unpack from M bit to N bit, M > N
11	// History: $ 1/15/07, Init coding
12	// $ 1/21/07, K = 7
13	// $ 3/23, Fixed a naming problem for sysgen
14	// Can not use VHDL reserved key world
15	// $ 12/1/07: Updated
16	//**************************************************************
17
18	module unpack_m2n (
19	clk , // I, clock
20	nrst , // I, n reset
21	start , // I, start pulse
22	din , // I, data input
23	vin , // I, valid input
24	dout , // O, data output
25	vout , // O, valid output
26	remain , // I, remain
27	last , // I, last data
28	done , // O, done
29	early_trace
30	) ;
31
32	parameter BITM = 48 ;
33	parameter BITM_EARLY = 24 ;
34	parameter BITN = 8 ;
35	parameter LW = 7 ;
36
37	input clk ;
38	input nrst ;
39	input start ;
40	input [BITM-1 :0] din ;
41	input vin ;
42	input [LW -1:0] remain ;
43	input last ;
44	input early_trace;
45
46	output [BITN-1 :0] dout ;
47	output vout ;
48	output done ;
49
50	//================================================
51	//Internal signal
52	//================================================
53	reg [BITM + BITN -1 :0] sreg ;
54	wire [BITM + BITN -1 :0] sreg_next ;
55	reg [LW -1 : 0] cnt = 0;
56	wire rd ;
57	wire [BITN-1 :0] data ;
58	wire [BITM + BITN -1 :0] tmp ;
59	wire [BITM + BITN -1 :0] tmp2 ;
60	wire [LW -1 : 0] shift ;
61	reg last_i ;
62	reg last_byte_s0 ;
63	wire last_byte ;
64
65	//================================================
66	// Main RTL code
67	//================================================
68	assign dout = data ;
69	assign vout = rd ;
70
71	always @ (posedge clk)
72	if (~nrst)
73	cnt <= 0 ;
74	else if (start)
75	cnt <= 0 ;
76	else if (vin & early_trace)
77	begin
78	cnt <= cnt + BITM_EARLY ;
79	end
80	else if (vin)// & ~early_trace)
81	begin
82	if (~last)
83	cnt <= cnt + BITM ;
84	else
85	cnt <= cnt + remain ;
86	end
87	else if (rd)
88	cnt <= cnt - BITN ;
89
90	assign rd = cnt >= BITN ;
91	assign data = sreg [BITM + BITN -1 : BITM] ;
92	assign tmp = {{BITM{1'b0}}, din} ;
93	assign shift = BITN - cnt ;
94	assign tmp2 = (tmp << shift) \| sreg ;
95	assign sreg_next = vin ? tmp2 : rd ? {sreg[BITM -1 : 0], {BITN{1'b0}}} : sreg ;
96
97	always @ (posedge clk)
98	if (~nrst)
99	sreg <= 0 ;
100	else if (start)
101	sreg <= 0 ;
102	else
103	sreg <= sreg_next ;
104
105	always @ (posedge clk)
106	if (~nrst)
107	last_i <= 1'b0 ;
108	else if (start)
109	last_i <= 1'b0 ;
110	else if (vin & last)
111	last_i <= 1'b1 ;
112
113	assign last_byte = last_i && cnt < BITN ;
114	always @ (posedge clk)
115	last_byte_s0 <= last_byte ;
116
117	assign done = ~last_byte_s0 & last_byte ;
118
119	endmodule
120
121
122	//**************************************************************
123	// File: viterbi_core
124	// Author: Yang Sun (ysun@rice.edu)
125	// Birth: $ 1/14/07
126	// Des: The top level of viterbi decoder
127	// Take 4 bit soft value is [-8 : +7]
128	// K = 3. g0 = 7, g1 = 5
129	// K = 5, g0 (A) = 1 + x + x^2 + x^4, g1 (B) = 1 + x^3 + x^4
130	// K = 7, g0 (A) = 1 + x^2 + x^3 + x^4 + x^5
131	// g1 (B) = 1 + x + x^2 + x^3 + x^6
132	// History: $ 1/14/07, Init coding, K = 3
133	// $ 1/22/07, K = 5
134	// $ 1/26/07, Updated
135	// $ 1/27/07, Change to LLR domain
136	// $ 2/18/07, Supported K = 7
137	// $ 2/23/07, Added pipeline to max_metric
138	// $ 12/1/07, Updated
139	//**************************************************************
140	//`define ZERO_TERM
141
142	module viterbi_core (
143	clk , // I, clock
144	nrst , // I, n reset
145	packet_start, // I, packet start pulse
146	zero_tail , // I, the code is zero terminated
147	dv_in , // I, data valid input
148	llr0 , // I, LLR 2nd
149	llr1 , // I, LLR 1st
150	packet_end , // I, packet end pulse
151	dv_out , // O, data valid out
152	dout , // O, data out
153	done , // O, done pulse
154	remain, // O, remain data cnt
155	early_trace1,
156	early_trace2
157	) ;
158
159	input early_trace1;
160	input early_trace2;
161
162	parameter SW = 4 ; // soft input precision
163	parameter M = 7 ; // metric width
164
165	parameter R = 48 ; // reliable trace
166	parameter C = 40 ; // unreliable trace
167	parameter L = 88 ; // total trace depth
168	parameter LW = 7 ; // L width
169
170	parameter R_EARLY1 = 24; //Early total trace depth
171	parameter C_EARLY1 = 0; //Early unreliable trace
172	parameter L_EARLY1 = 24; //Early reliable trace trace
173
174	parameter R_EARLY2 = 48; //Early total trace depth
175	parameter C_EARLY2 = 0; //Early unreliable trace
176	parameter L_EARLY2 = 48; //Early reliable trace trace
177
178	parameter K = 7 ; // constraint length
179	parameter N = 64 ; // number of states = 2^(K-1)
180	parameter TR = 128 ; // trace buffer
181	parameter TRW = 7 ; // trace
182
183	input clk ; // system clock
184	input nrst ; // active low reset
185	input packet_start ; // start of packet pulse
186	input zero_tail ; // 1 = the code is terminated with 0, 0 = no termination
187	input packet_end ; // end of packet pulse
188	input dv_in ; // data valid input
189	input [SW -1:0] llr1 ; // LLR soft value for bit1, LLR = log(Pr(ci=0/ri)/Pr(ci=1/ri))
190	input [SW -1:0] llr0 ; // LLR soft value for bit0, LLR = log(Pr(ci=0/ri)/Pr(ci=1/ri))
191
192	output done ;
193	output [LW -1:0] remain ;
194	output dv_out ;
195	output [R-1:0] dout ;
196
197	//======================================
198	//Internal signal
199	//======================================
200	wire [SW:0] branch_00 ;
201	wire [SW:0] branch_01 ;
202	wire [SW:0] branch_10 ;
203	wire [SW:0] branch_11 ;
204
205	wire [SW:0] branch_A_0 ;
206	wire [SW:0] branch_B_0 ;
207	wire [SW:0] branch_A_1 ;
208	wire [SW:0] branch_B_1 ;
209	wire [SW:0] branch_A_2 ;
210	wire [SW:0] branch_B_2 ;
211	wire [SW:0] branch_A_3 ;
212	wire [SW:0] branch_B_3 ;
213	wire [SW:0] branch_A_4 ;
214	wire [SW:0] branch_B_4 ;
215	wire [SW:0] branch_A_5 ;
216	wire [SW:0] branch_B_5 ;
217	wire [SW:0] branch_A_6 ;
218	wire [SW:0] branch_B_6 ;
219	wire [SW:0] branch_A_7 ;
220	wire [SW:0] branch_B_7 ;
221	wire [SW:0] branch_A_8 ;
222	wire [SW:0] branch_B_8 ;
223	wire [SW:0] branch_A_9 ;
224	wire [SW:0] branch_B_9 ;
225	wire [SW:0] branch_A_10 ;
226	wire [SW:0] branch_B_10 ;
227	wire [SW:0] branch_A_11 ;
228	wire [SW:0] branch_B_11 ;
229	wire [SW:0] branch_A_12 ;
230	wire [SW:0] branch_B_12 ;
231	wire [SW:0] branch_A_13 ;
232	wire [SW:0] branch_B_13 ;
233	wire [SW:0] branch_A_14 ;
234	wire [SW:0] branch_B_14 ;
235	wire [SW:0] branch_A_15 ;
236	wire [SW:0] branch_B_15 ;
237	wire [SW:0] branch_A_16 ;
238	wire [SW:0] branch_B_16 ;
239	wire [SW:0] branch_A_17;
240	wire [SW:0] branch_B_17;
241	wire [SW:0] branch_A_18;
242	wire [SW:0] branch_B_18;
243	wire [SW:0] branch_A_19;
244	wire [SW:0] branch_B_19;
245	wire [SW:0] branch_A_20;
246	wire [SW:0] branch_B_20;
247	wire [SW:0] branch_A_21;
248	wire [SW:0] branch_B_21;
249	wire [SW:0] branch_A_22;
250	wire [SW:0] branch_B_22;
251	wire [SW:0] branch_A_23;
252	wire [SW:0] branch_B_23;
253	wire [SW:0] branch_A_24;
254	wire [SW:0] branch_B_24;
255	wire [SW:0] branch_A_25;
256	wire [SW:0] branch_B_25;
257	wire [SW:0] branch_A_26 ;
258	wire [SW:0] branch_B_26 ;
259	wire [SW:0] branch_A_27 ;
260	wire [SW:0] branch_B_27 ;
261	wire [SW:0] branch_A_28 ;
262	wire [SW:0] branch_B_28 ;
263	wire [SW:0] branch_A_29 ;
264	wire [SW:0] branch_B_29 ;
265	wire [SW:0] branch_A_30 ;
266	wire [SW:0] branch_B_30 ;
267	wire [SW:0] branch_A_31 ;
268	wire [SW:0] branch_B_31 ;
269	wire [SW:0] branch_A_32;
270	wire [SW:0] branch_B_32;
271	wire [SW:0] branch_A_33;
272	wire [SW:0] branch_B_33;
273	wire [SW:0] branch_A_34;
274	wire [SW:0] branch_B_34;
275	wire [SW:0] branch_A_35;
276	wire [SW:0] branch_B_35;
277	wire [SW:0] branch_A_36;
278	wire [SW:0] branch_B_36;
279	wire [SW:0] branch_A_37;
280	wire [SW:0] branch_B_37;
281	wire [SW:0] branch_A_38;
282	wire [SW:0] branch_B_38;
283	wire [SW:0] branch_A_39;
284	wire [SW:0] branch_B_39;
285	wire [SW:0] branch_A_40;
286	wire [SW:0] branch_B_40;
287	wire [SW:0] branch_A_41;
288	wire [SW:0] branch_B_41;
289	wire [SW:0] branch_A_42 ;
290	wire [SW:0] branch_B_42 ;
291	wire [SW:0] branch_A_43 ;
292	wire [SW:0] branch_B_43 ;
293	wire [SW:0] branch_A_44 ;
294	wire [SW:0] branch_B_44 ;
295	wire [SW:0] branch_A_45 ;
296	wire [SW:0] branch_B_45 ;
297	wire [SW:0] branch_A_46 ;
298	wire [SW:0] branch_B_46 ;
299	wire [SW:0] branch_A_47 ;
300	wire [SW:0] branch_B_47 ;
301	wire [SW:0] branch_A_48;
302	wire [SW:0] branch_B_48;
303	wire [SW:0] branch_A_49;
304	wire [SW:0] branch_B_49;
305	wire [SW:0] branch_A_50;
306	wire [SW:0] branch_B_50;
307	wire [SW:0] branch_A_51;
308	wire [SW:0] branch_B_51;
309	wire [SW:0] branch_A_52;
310	wire [SW:0] branch_B_52;
311	wire [SW:0] branch_A_53;
312	wire [SW:0] branch_B_53;
313	wire [SW:0] branch_A_54;
314	wire [SW:0] branch_B_54;
315	wire [SW:0] branch_A_55;
316	wire [SW:0] branch_B_55;
317	wire [SW:0] branch_A_56;
318	wire [SW:0] branch_B_56;
319	wire [SW:0] branch_A_57;
320	wire [SW:0] branch_B_57;
321	wire [SW:0] branch_A_58 ;
322	wire [SW:0] branch_B_58 ;
323	wire [SW:0] branch_A_59 ;
324	wire [SW:0] branch_B_59 ;
325	wire [SW:0] branch_A_60 ;
326	wire [SW:0] branch_B_60 ;
327	wire [SW:0] branch_A_61 ;
328	wire [SW:0] branch_B_61 ;
329	wire [SW:0] branch_A_62 ;
330	wire [SW:0] branch_B_62 ;
331	wire [SW:0] branch_A_63 ;
332	wire [SW:0] branch_B_63 ;
333
334	reg [M -1:0] metric_0 ;
335	reg [M -1:0] metric_1 ;
336	reg [M -1:0] metric_2 ;
337	reg [M -1:0] metric_3 ;
338	reg [M -1:0] metric_4 ;
339	reg [M -1:0] metric_5 ;
340	reg [M -1:0] metric_6 ;
341	reg [M -1:0] metric_7 ;
342	reg [M -1:0] metric_8 ;
343	reg [M -1:0] metric_9 ;
344	reg [M -1:0] metric_10 ;
345	reg [M -1:0] metric_11 ;
346	reg [M -1:0] metric_12 ;
347	reg [M -1:0] metric_13 ;
348	reg [M -1:0] metric_14 ;
349	reg [M -1:0] metric_15 ;
350	reg [M -1:0] metric_16;
351	reg [M -1:0] metric_17;
352	reg [M -1:0] metric_18;
353	reg [M -1:0] metric_19;
354	reg [M -1:0] metric_20;
355	reg [M -1:0] metric_21;
356	reg [M -1:0] metric_22;
357	reg [M -1:0] metric_23;
358	reg [M -1:0] metric_24;
359	reg [M -1:0] metric_25;
360	reg [M -1:0] metric_26 ;
361	reg [M -1:0] metric_27 ;
362	reg [M -1:0] metric_28 ;
363	reg [M -1:0] metric_29 ;
364	reg [M -1:0] metric_30 ;
365	reg [M -1:0] metric_31 ;
366	reg [M -1:0] metric_32;
367	reg [M -1:0] metric_33;
368	reg [M -1:0] metric_34;
369	reg [M -1:0] metric_35;
370	reg [M -1:0] metric_36;
371	reg [M -1:0] metric_37;
372	reg [M -1:0] metric_38;
373	reg [M -1:0] metric_39;
374	reg [M -1:0] metric_40;
375	reg [M -1:0] metric_41;
376	reg [M -1:0] metric_42 ;
377	reg [M -1:0] metric_43 ;
378	reg [M -1:0] metric_44 ;
379	reg [M -1:0] metric_45 ;
380	reg [M -1:0] metric_46 ;
381	reg [M -1:0] metric_47 ;
382	reg [M -1:0] metric_48;
383	reg [M -1:0] metric_49;
384	reg [M -1:0] metric_50;
385	reg [M -1:0] metric_51;
386	reg [M -1:0] metric_52;
387	reg [M -1:0] metric_53;
388	reg [M -1:0] metric_54;
389	reg [M -1:0] metric_55;
390	reg [M -1:0] metric_56;
391	reg [M -1:0] metric_57;
392	reg [M -1:0] metric_58 ;
393	reg [M -1:0] metric_59 ;
394	reg [M -1:0] metric_60 ;
395	reg [M -1:0] metric_61 ;
396	reg [M -1:0] metric_62 ;
397	reg [M -1:0] metric_63 ;
398
399	wire [M -1:0] metric_next_0 ;
400	wire [M -1:0] metric_next_1 ;
401	wire [M -1:0] metric_next_2 ;
402	wire [M -1:0] metric_next_3 ;
403	wire [M -1:0] metric_next_4 ;
404	wire [M -1:0] metric_next_5 ;
405	wire [M -1:0] metric_next_6 ;
406	wire [M -1:0] metric_next_7 ;
407	wire [M -1:0] metric_next_8 ;
408	wire [M -1:0] metric_next_9 ;
409	wire [M -1:0] metric_next_10 ;
410	wire [M -1:0] metric_next_11 ;
411	wire [M -1:0] metric_next_12 ;
412	wire [M -1:0] metric_next_13 ;
413	wire [M -1:0] metric_next_14 ;
414	wire [M -1:0] metric_next_15 ;
415	wire [M -1:0] metric_next_16;
416	wire [M -1:0] metric_next_17;
417	wire [M -1:0] metric_next_18;
418	wire [M -1:0] metric_next_19;
419	wire [M -1:0] metric_next_20;
420	wire [M -1:0] metric_next_21;
421	wire [M -1:0] metric_next_22;
422	wire [M -1:0] metric_next_23;
423	wire [M -1:0] metric_next_24;
424	wire [M -1:0] metric_next_25;
425	wire [M -1:0] metric_next_26 ;
426	wire [M -1:0] metric_next_27 ;
427	wire [M -1:0] metric_next_28 ;
428	wire [M -1:0] metric_next_29 ;
429	wire [M -1:0] metric_next_30 ;
430	wire [M -1:0] metric_next_31 ;
431	wire [M -1:0] metric_next_32;
432	wire [M -1:0] metric_next_33;
433	wire [M -1:0] metric_next_34;
434	wire [M -1:0] metric_next_35;
435	wire [M -1:0] metric_next_36;
436	wire [M -1:0] metric_next_37;
437	wire [M -1:0] metric_next_38;
438	wire [M -1:0] metric_next_39;
439	wire [M -1:0] metric_next_40;
440	wire [M -1:0] metric_next_41;
441	wire [M -1:0] metric_next_42 ;
442	wire [M -1:0] metric_next_43 ;
443	wire [M -1:0] metric_next_44 ;
444	wire [M -1:0] metric_next_45 ;
445	wire [M -1:0] metric_next_46 ;
446	wire [M -1:0] metric_next_47 ;
447	wire [M -1:0] metric_next_48;
448	wire [M -1:0] metric_next_49;
449	wire [M -1:0] metric_next_50;
450	wire [M -1:0] metric_next_51;
451	wire [M -1:0] metric_next_52;
452	wire [M -1:0] metric_next_53;
453	wire [M -1:0] metric_next_54;
454	wire [M -1:0] metric_next_55;
455	wire [M -1:0] metric_next_56;
456	wire [M -1:0] metric_next_57;
457	wire [M -1:0] metric_next_58 ;
458	wire [M -1:0] metric_next_59 ;
459	wire [M -1:0] metric_next_60 ;
460	wire [M -1:0] metric_next_61 ;
461	wire [M -1:0] metric_next_62 ;
462	wire [M -1:0] metric_next_63 ;
463
464	wire [M -1:0] metric_A_0 ;
465	wire [M -1:0] metric_B_0 ;
466	wire [M -1:0] metric_A_1 ;
467	wire [M -1:0] metric_B_1 ;
468	wire [M -1:0] metric_A_2 ;
469	wire [M -1:0] metric_B_2 ;
470	wire [M -1:0] metric_A_3 ;
471	wire [M -1:0] metric_B_3 ;
472	wire [M -1:0] metric_A_4 ;
473	wire [M -1:0] metric_B_4 ;
474	wire [M -1:0] metric_A_5 ;
475	wire [M -1:0] metric_B_5 ;
476	wire [M -1:0] metric_A_6 ;
477	wire [M -1:0] metric_B_6 ;
478	wire [M -1:0] metric_A_7 ;
479	wire [M -1:0] metric_B_7 ;
480	wire [M -1:0] metric_A_8 ;
481	wire [M -1:0] metric_B_8 ;
482	wire [M -1:0] metric_A_9 ;
483	wire [M -1:0] metric_B_9 ;
484	wire [M -1:0] metric_A_10 ;
485	wire [M -1:0] metric_B_10 ;
486	wire [M -1:0] metric_A_11 ;
487	wire [M -1:0] metric_B_11 ;
488	wire [M -1:0] metric_A_12 ;
489	wire [M -1:0] metric_B_12 ;
490	wire [M -1:0] metric_A_13 ;
491	wire [M -1:0] metric_B_13 ;
492	wire [M -1:0] metric_A_14 ;
493	wire [M -1:0] metric_B_14 ;
494	wire [M -1:0] metric_A_15 ;
495	wire [M -1:0] metric_B_15 ;
496	wire [M -1:0] metric_A_16;
497	wire [M -1:0] metric_B_16;
498	wire [M -1:0] metric_A_17;
499	wire [M -1:0] metric_B_17;
500	wire [M -1:0] metric_A_18;
501	wire [M -1:0] metric_B_18;
502	wire [M -1:0] metric_A_19;
503	wire [M -1:0] metric_B_19;
504	wire [M -1:0] metric_A_20;
505	wire [M -1:0] metric_B_20;
506	wire [M -1:0] metric_A_21;
507	wire [M -1:0] metric_B_21;
508	wire [M -1:0] metric_A_22;
509	wire [M -1:0] metric_B_22;
510	wire [M -1:0] metric_A_23;
511	wire [M -1:0] metric_B_23;
512	wire [M -1:0] metric_A_24;
513	wire [M -1:0] metric_B_24;
514	wire [M -1:0] metric_A_25;
515	wire [M -1:0] metric_B_25;
516	wire [M -1:0] metric_A_26 ;
517	wire [M -1:0] metric_B_26 ;
518	wire [M -1:0] metric_A_27 ;
519	wire [M -1:0] metric_B_27 ;
520	wire [M -1:0] metric_A_28 ;
521	wire [M -1:0] metric_B_28 ;
522	wire [M -1:0] metric_A_29 ;
523	wire [M -1:0] metric_B_29 ;
524	wire [M -1:0] metric_A_30 ;
525	wire [M -1:0] metric_B_30 ;
526	wire [M -1:0] metric_A_31 ;
527	wire [M -1:0] metric_B_31 ;
528	wire [M -1:0] metric_A_32;
529	wire [M -1:0] metric_B_32;
530	wire [M -1:0] metric_A_33;
531	wire [M -1:0] metric_B_33;
532	wire [M -1:0] metric_A_34;
533	wire [M -1:0] metric_B_34;
534	wire [M -1:0] metric_A_35;
535	wire [M -1:0] metric_B_35;
536	wire [M -1:0] metric_A_36;
537	wire [M -1:0] metric_B_36;
538	wire [M -1:0] metric_A_37;
539	wire [M -1:0] metric_B_37;
540	wire [M -1:0] metric_A_38;
541	wire [M -1:0] metric_B_38;
542	wire [M -1:0] metric_A_39;
543	wire [M -1:0] metric_B_39;
544	wire [M -1:0] metric_A_40;
545	wire [M -1:0] metric_B_40;
546	wire [M -1:0] metric_A_41;
547	wire [M -1:0] metric_B_41;
548	wire [M -1:0] metric_A_42 ;
549	wire [M -1:0] metric_B_42 ;
550	wire [M -1:0] metric_A_43 ;
551	wire [M -1:0] metric_B_43 ;
552	wire [M -1:0] metric_A_44 ;
553	wire [M -1:0] metric_B_44 ;
554	wire [M -1:0] metric_A_45 ;
555	wire [M -1:0] metric_B_45 ;
556	wire [M -1:0] metric_A_46 ;
557	wire [M -1:0] metric_B_46 ;
558	wire [M -1:0] metric_A_47 ;
559	wire [M -1:0] metric_B_47 ;
560	wire [M -1:0] metric_A_48;
561	wire [M -1:0] metric_B_48;
562	wire [M -1:0] metric_A_49;
563	wire [M -1:0] metric_B_49;
564	wire [M -1:0] metric_A_50;
565	wire [M -1:0] metric_B_50;
566	wire [M -1:0] metric_A_51;
567	wire [M -1:0] metric_B_51;
568	wire [M -1:0] metric_A_52;
569	wire [M -1:0] metric_B_52;
570	wire [M -1:0] metric_A_53;
571	wire [M -1:0] metric_B_53;
572	wire [M -1:0] metric_A_54;
573	wire [M -1:0] metric_B_54;
574	wire [M -1:0] metric_A_55;
575	wire [M -1:0] metric_B_55;
576	wire [M -1:0] metric_A_56;
577	wire [M -1:0] metric_B_56;
578	wire [M -1:0] metric_A_57;
579	wire [M -1:0] metric_B_57;
580	wire [M -1:0] metric_A_58 ;
581	wire [M -1:0] metric_B_58 ;
582	wire [M -1:0] metric_A_59 ;
583	wire [M -1:0] metric_B_59 ;
584	wire [M -1:0] metric_A_60 ;
585	wire [M -1:0] metric_B_60 ;
586	wire [M -1:0] metric_A_61 ;
587	wire [M -1:0] metric_B_61 ;
588	wire [M -1:0] metric_A_62 ;
589	wire [M -1:0] metric_B_62 ;
590	wire [M -1:0] metric_A_63 ;
591	wire [M -1:0] metric_B_63 ;
592
593	// 64 state tran
594	reg [0:0] tran_state_0 [TR -1:0] ;
595	reg [0:0] tran_state_1 [TR -1:0] ;
596	reg [0:0] tran_state_2 [TR -1:0] ;
597	reg [0:0] tran_state_3 [TR -1:0] ;
598	reg [0:0] tran_state_4 [TR -1:0] ;
599	reg [0:0] tran_state_5 [TR -1:0] ;
600	reg [0:0] tran_state_6 [TR -1:0] ;
601	reg [0:0] tran_state_7 [TR -1:0] ;
602	reg [0:0] tran_state_8 [TR -1:0] ;
603	reg [0:0] tran_state_9 [TR -1:0] ;
604	reg [0:0] tran_state_10 [TR -1:0] ;
605	reg [0:0] tran_state_11 [TR -1:0] ;
606	reg [0:0] tran_state_12 [TR -1:0] ;
607	reg [0:0] tran_state_13 [TR -1:0] ;
608	reg [0:0] tran_state_14 [TR -1:0] ;
609	reg [0:0] tran_state_15 [TR -1:0] ;
610	reg [0:0] tran_state_16 [TR -1:0] ;
611	reg [0:0] tran_state_17 [TR -1:0] ;
612	reg [0:0] tran_state_18 [TR -1:0] ;
613	reg [0:0] tran_state_19 [TR -1:0] ;
614	reg [0:0] tran_state_20 [TR -1:0] ;
615	reg [0:0] tran_state_21 [TR -1:0] ;
616	reg [0:0] tran_state_22 [TR -1:0] ;
617	reg [0:0] tran_state_23 [TR -1:0] ;
618	reg [0:0] tran_state_24 [TR -1:0] ;
619	reg [0:0] tran_state_25 [TR -1:0] ;
620	reg [0:0] tran_state_26 [TR -1:0] ;
621	reg [0:0] tran_state_27 [TR -1:0] ;
622	reg [0:0] tran_state_28 [TR -1:0] ;
623	reg [0:0] tran_state_29 [TR -1:0] ;
624	reg [0:0] tran_state_30 [TR -1:0] ;
625	reg [0:0] tran_state_31 [TR -1:0] ;
626	reg [0:0] tran_state_32 [TR -1:0] ;
627	reg [0:0] tran_state_33 [TR -1:0] ;
628	reg [0:0] tran_state_34 [TR -1:0] ;
629	reg [0:0] tran_state_35 [TR -1:0] ;
630	reg [0:0] tran_state_36 [TR -1:0] ;
631	reg [0:0] tran_state_37 [TR -1:0] ;
632	reg [0:0] tran_state_38 [TR -1:0] ;
633	reg [0:0] tran_state_39 [TR -1:0] ;
634	reg [0:0] tran_state_40 [TR -1:0] ;
635	reg [0:0] tran_state_41 [TR -1:0] ;
636	reg [0:0] tran_state_42 [TR -1:0] ;
637	reg [0:0] tran_state_43 [TR -1:0] ;
638	reg [0:0] tran_state_44 [TR -1:0] ;
639	reg [0:0] tran_state_45 [TR -1:0] ;
640	reg [0:0] tran_state_46 [TR -1:0] ;
641	reg [0:0] tran_state_47 [TR -1:0] ;
642	reg [0:0] tran_state_48 [TR -1:0] ;
643	reg [0:0] tran_state_49 [TR -1:0] ;
644	reg [0:0] tran_state_50 [TR -1:0] ;
645	reg [0:0] tran_state_51 [TR -1:0] ;
646	reg [0:0] tran_state_52 [TR -1:0] ;
647	reg [0:0] tran_state_53 [TR -1:0] ;
648	reg [0:0] tran_state_54 [TR -1:0] ;
649	reg [0:0] tran_state_55 [TR -1:0] ;
650	reg [0:0] tran_state_56 [TR -1:0] ;
651	reg [0:0] tran_state_57 [TR -1:0] ;
652	reg [0:0] tran_state_58 [TR -1:0] ;
653	reg [0:0] tran_state_59 [TR -1:0] ;
654	reg [0:0] tran_state_60 [TR -1:0] ;
655	reg [0:0] tran_state_61 [TR -1:0] ;
656	reg [0:0] tran_state_62 [TR -1:0] ;
657	reg [0:0] tran_state_63 [TR -1:0] ;
658
659	reg [TRW -1:0] wptr ;
660	reg [TRW -1:0] last_wptr ;
661
662	wire [M -1:0] diff_0 ;
663	wire [M -1:0] diff_1 ;
664	wire [M -1:0] diff_2 ;
665	wire [M -1:0] diff_3 ;
666	wire [M -1:0] diff_4 ;
667	wire [M -1:0] diff_5 ;
668	wire [M -1:0] diff_6 ;
669	wire [M -1:0] diff_7 ;
670	wire [M -1:0] diff_8 ;
671	wire [M -1:0] diff_9 ;
672	wire [M -1:0] diff_10;
673	wire [M -1:0] diff_11;
674	wire [M -1:0] diff_12;
675	wire [M -1:0] diff_13;
676	wire [M -1:0] diff_14;
677	wire [M -1:0] diff_15;
678	wire [M -1:0] diff_16;
679	wire [M -1:0] diff_17;
680	wire [M -1:0] diff_18;
681	wire [M -1:0] diff_19;
682	wire [M -1:0] diff_20;
683	wire [M -1:0] diff_21;
684	wire [M -1:0] diff_22;
685	wire [M -1:0] diff_23;
686	wire [M -1:0] diff_24;
687	wire [M -1:0] diff_25;
688	wire [M -1:0] diff_26;
689	wire [M -1:0] diff_27;
690	wire [M -1:0] diff_28;
691	wire [M -1:0] diff_29;
692	wire [M -1:0] diff_30;
693	wire [M -1:0] diff_31;
694	wire [M -1:0] diff_32;
695	wire [M -1:0] diff_33;
696	wire [M -1:0] diff_34;
697	wire [M -1:0] diff_35;
698	wire [M -1:0] diff_36;
699	wire [M -1:0] diff_37;
700	wire [M -1:0] diff_38;
701	wire [M -1:0] diff_39;
702	wire [M -1:0] diff_40;
703	wire [M -1:0] diff_41;
704	wire [M -1:0] diff_42;
705	wire [M -1:0] diff_43;
706	wire [M -1:0] diff_44;
707	wire [M -1:0] diff_45;
708	wire [M -1:0] diff_46;
709	wire [M -1:0] diff_47;
710	wire [M -1:0] diff_48;
711	wire [M -1:0] diff_49;
712	wire [M -1:0] diff_50;
713	wire [M -1:0] diff_51;
714	wire [M -1:0] diff_52;
715	wire [M -1:0] diff_53;
716	wire [M -1:0] diff_54;
717	wire [M -1:0] diff_55;
718	wire [M -1:0] diff_56;
719	wire [M -1:0] diff_57;
720	wire [M -1:0] diff_58;
721	wire [M -1:0] diff_59;
722	wire [M -1:0] diff_60;
723	wire [M -1:0] diff_61;
724	wire [M -1:0] diff_62;
725	wire [M -1:0] diff_63;
726
727	reg nd ;
728	reg [LW -1:0] cnt ;
729	reg trace ;
730	reg trace_en ;
731
732	reg early_trace1_en;
733	reg early_trace2_en;
734
735	wire trace_done ;
736	reg trace_done_s0 ;
737	wire trace_done_pos ;
738	reg [TRW -1:0] trace_cnt ;
739	reg [L-1:0] res ;
740	wire [L-1:0] res_shift ;
741	wire [K-2: 0] init_state_i ;
742	reg [K-2: 0] trace_state ;
743
744	wire [K-2: 0] cur_state0 ;
745	wire [K-2: 0] cur_state1 ;
746	wire [K-2: 0] next_state ;
747	reg [TRW -1:0] trace_start_wptr ;
748	wire [TRW -1:0] trace_start_pos ;
749	wire [TRW -1:0] trace_start_pos0 ;
750	wire [TRW -1:0] trace_start_pos1 ;
751	reg last_trace ;
752	reg last_trace_s0 ;
753	wire trace2 ;
754	reg trace2_s1 ;
755	reg trace2_s2 ;
756	reg trace_pos ;
757	wire trace_pos_i ;
758	reg [LW -1:0] last_trace_num ;
759	reg flush_en ;
760	wire flush ;
761	reg done_i ;
762
763	wire [K-2: 0] state_0 ;
764	wire [K-2: 0] state_1 ;
765	wire [K-2: 0] state_2 ;
766	wire [K-2: 0] state_3 ;
767	wire [K-2: 0] state_4 ;
768	wire [K-2: 0] state_5 ;
769	wire [K-2: 0] state_6 ;
770	wire [K-2: 0] state_7 ;
771	wire [K-2: 0] state_8 ;
772	wire [K-2: 0] state_9 ;
773	wire [K-2: 0] state_10 ;
774	wire [K-2: 0] state_11 ;
775	wire [K-2: 0] state_12 ;
776	wire [K-2: 0] state_13 ;
777	wire [K-2: 0] state_14 ;
778	wire [K-2: 0] state_15 ;
779
780	wire [K-2: 0] state_s1_0 ;
781	wire [K-2: 0] state_s1_1 ;
782	wire [K-2: 0] state_s1_2 ;
783	wire [K-2: 0] state_s1_3 ;
784
785	wire [K-2: 0] state_s2_0 ;
786
787	wire [M-1: 0] max_0 ;
788	wire [M-1: 0] max_1 ;
789	wire [M-1: 0] max_2 ;
790	wire [M-1: 0] max_3 ;
791	wire [M-1: 0] max_4 ;
792	wire [M-1: 0] max_5 ;
793	wire [M-1: 0] max_6 ;
794	wire [M-1: 0] max_7 ;
795	wire [M-1: 0] max_8 ;
796	wire [M-1: 0] max_9 ;
797	wire [M-1: 0] max_10 ;
798	wire [M-1: 0] max_11 ;
799	wire [M-1: 0] max_12 ;
800	wire [M-1: 0] max_13 ;
801	wire [M-1: 0] max_14 ;
802	wire [M-1: 0] max_15 ;
803
804	wire [M-1: 0] max_s1_0 ;
805	wire [M-1: 0] max_s1_1 ;
806	wire [M-1: 0] max_s1_2 ;
807	wire [M-1: 0] max_s1_3 ;
808
809	//reg [M-1: 0] max_s1_0_s0 ;
810	//reg [M-1: 0] max_s1_1_s0 ;
811	//reg [M-1: 0] max_s1_2_s0 ;
812	//reg [M-1: 0] max_s1_3_s0 ;
813
814	//wire [M-1: 0] max_s2_0 ;
815
816	wire [N -1:0] tran_all_0 ;
817	wire [N -1:0] tran_all_1 ;
818
819	reg [6:0] flush_cnt ;
820	wire [LW -1:0] rem_i ;
821	reg [LW -1:0] last_cnt ;
822	wire [LW -1:0] last_cnt_next ;
823	reg last_trace_d0 ;
824	reg last_trace_d1 ;
825	reg last_trace_d2 ;
826	reg last_trace_d3 ;
827	reg last_trace_d4 ;
828	reg last_trace_d5 ;
829	reg one_more_out ;
830	reg in_dec ;
831	wire dv_in_gate ;
832	reg trace_pos_s0 ;
833
834	//======================================
835	// Main body of code
836	//======================================
837	assign dv_out = trace_done_pos \| one_more_out ;
838	assign res_shift = res << last_trace_num ;
839	assign dout = res_shift [L -1:C] ;
840	assign remain = last_trace ? rem_i : 0 ;
841	assign done = dv_out & done_i ;
842	assign rem_i = ~last_cnt_next[LW-1] ? 0 : last_cnt ;
843
844	//assign dv_in_gate = dv_in & in_dec ;
845	assign dv_in_gate = dv_in & in_dec & (~packet_end) ;
846
847	always @ (posedge clk)
848	if (~nrst)
849	in_dec <= 1'b0 ;
850	else if (packet_start)
851	in_dec <= 1'b1 ;
852	else if (packet_end)
853	in_dec <= 1'b0 ;
854
855
856	//{coe_0 coe_1}, generated from C model gen_table
857	//0 0;
858	//0 1;
859	//1 0;
860	//1 1;
861	//1 0;
862	//1 1;
863	//0 0;
864	//0 1;
865
866	assign branch_00 = {llr1[SW -1], llr1} + {llr0[SW -1], llr0} ; //LLR(bit1) + LLR(bit0)
867	assign branch_01 = {llr1[SW -1], llr1} ; //LLR(bit1)
868	assign branch_10 = {llr0[SW -1], llr0} ; //LLR(bit0)
869	assign branch_11 = 0 ; //0
870
871	assign branch_A_0 = branch_00 ;
872	assign branch_B_0 = branch_11 ;
873	assign branch_A_1 = branch_10 ;
874	assign branch_B_1 = branch_01 ;
875	assign branch_A_2 = branch_00 ;
876	assign branch_B_2 = branch_11 ;
877	assign branch_A_3 = branch_10 ;
878	assign branch_B_3 = branch_01 ;
879	assign branch_A_4 = branch_11 ;
880	assign branch_B_4 = branch_00 ;
881	assign branch_A_5 = branch_01 ;
882	assign branch_B_5 = branch_10 ;
883	assign branch_A_6 = branch_11 ;
884	assign branch_B_6 = branch_00 ;
885	assign branch_A_7 = branch_01 ;
886	assign branch_B_7 = branch_10 ;
887	assign branch_A_8 = branch_11 ;
888	assign branch_B_8 = branch_00 ;
889	assign branch_A_9 = branch_01 ;
890	assign branch_B_9 = branch_10 ;
891	assign branch_A_10 = branch_11 ;
892	assign branch_B_10 = branch_00 ;
893	assign branch_A_11 = branch_01 ;
894	assign branch_B_11 = branch_10 ;
895	assign branch_A_12 = branch_00 ;
896	assign branch_B_12 = branch_11 ;
897	assign branch_A_13 = branch_10 ;
898	assign branch_B_13 = branch_01 ;
899	assign branch_A_14 = branch_00 ;
900	assign branch_B_14 = branch_11 ;
901	assign branch_A_15 = branch_10 ;
902	assign branch_B_15 = branch_01 ;
903	assign branch_A_16 = branch_01 ;
904	assign branch_B_16 = branch_10 ;
905	assign branch_A_17 = branch_11 ;
906	assign branch_B_17 = branch_00 ;
907	assign branch_A_18 = branch_01 ;
908	assign branch_B_18 = branch_10 ;
909	assign branch_A_19 = branch_11 ;
910	assign branch_B_19 = branch_00 ;
911	assign branch_A_20 = branch_10 ;
912	assign branch_B_20 = branch_01 ;
913	assign branch_A_21 = branch_00 ;
914	assign branch_B_21 = branch_11 ;
915	assign branch_A_22 = branch_10 ;
916	assign branch_B_22 = branch_01 ;
917	assign branch_A_23 = branch_00 ;
918	assign branch_B_23 = branch_11 ;
919	assign branch_A_24 = branch_10 ;
920	assign branch_B_24 = branch_01 ;
921	assign branch_A_25 = branch_00 ;
922	assign branch_B_25 = branch_11 ;
923	assign branch_A_26 = branch_10 ;
924	assign branch_B_26 = branch_01 ;
925	assign branch_A_27 = branch_00 ;
926	assign branch_B_27 = branch_11 ;
927	assign branch_A_28 = branch_01 ;
928	assign branch_B_28 = branch_10 ;
929	assign branch_A_29 = branch_11 ;
930	assign branch_B_29 = branch_00 ;
931	assign branch_A_30 = branch_01 ;
932	assign branch_B_30 = branch_10 ;
933	assign branch_A_31 = branch_11 ;
934	assign branch_B_31 = branch_00 ;
935
936	assign branch_A_32 = branch_B_0 ;
937	assign branch_B_32 = branch_A_0 ;
938	assign branch_A_33 = branch_B_1 ;
939	assign branch_B_33 = branch_A_1 ;
940	assign branch_A_34 = branch_B_2 ;
941	assign branch_B_34 = branch_A_2 ;
942	assign branch_A_35 = branch_B_3 ;
943	assign branch_B_35 = branch_A_3 ;
944	assign branch_A_36 = branch_B_4 ;
945	assign branch_B_36 = branch_A_4 ;
946	assign branch_A_37 = branch_B_5 ;
947	assign branch_B_37 = branch_A_5 ;
948	assign branch_A_38 = branch_B_6 ;
949	assign branch_B_38 = branch_A_6 ;
950	assign branch_A_39 = branch_B_7 ;
951	assign branch_B_39 = branch_A_7 ;
952	assign branch_A_40 = branch_B_8 ;
953	assign branch_B_40 = branch_A_8 ;
954	assign branch_A_41 = branch_B_9 ;
955	assign branch_B_41 = branch_A_9 ;
956	assign branch_A_42 = branch_B_10 ;
957	assign branch_B_42 = branch_A_10 ;
958	assign branch_A_43 = branch_B_11 ;
959	assign branch_B_43 = branch_A_11 ;
960	assign branch_A_44 = branch_B_12 ;
961	assign branch_B_44 = branch_A_12 ;
962	assign branch_A_45 = branch_B_13 ;
963	assign branch_B_45 = branch_A_13 ;
964	assign branch_A_46 = branch_B_14 ;
965	assign branch_B_46 = branch_A_14 ;
966	assign branch_A_47 = branch_B_15 ;
967	assign branch_B_47 = branch_A_15 ;
968	assign branch_A_48 = branch_B_16 ;
969	assign branch_B_48 = branch_A_16 ;
970	assign branch_A_49 = branch_B_17 ;
971	assign branch_B_49 = branch_A_17 ;
972	assign branch_A_50 = branch_B_18 ;
973	assign branch_B_50 = branch_A_18 ;
974	assign branch_A_51 = branch_B_19 ;
975	assign branch_B_51 = branch_A_19 ;
976	assign branch_A_52 = branch_B_20 ;
977	assign branch_B_52 = branch_A_20 ;
978	assign branch_A_53 = branch_B_21 ;
979	assign branch_B_53 = branch_A_21 ;
980	assign branch_A_54 = branch_B_22 ;
981	assign branch_B_54 = branch_A_22 ;
982	assign branch_A_55 = branch_B_23 ;
983	assign branch_B_55 = branch_A_23 ;
984	assign branch_A_56 = branch_B_24 ;
985	assign branch_B_56 = branch_A_24 ;
986	assign branch_A_57 = branch_B_25 ;
987	assign branch_B_57 = branch_A_25 ;
988	assign branch_A_58 = branch_B_26 ;
989	assign branch_B_58 = branch_A_26 ;
990	assign branch_A_59 = branch_B_27 ;
991	assign branch_B_59 = branch_A_27 ;
992	assign branch_A_60 = branch_B_28 ;
993	assign branch_B_60 = branch_A_28 ;
994	assign branch_A_61 = branch_B_29 ;
995	assign branch_B_61 = branch_A_29 ;
996	assign branch_A_62 = branch_B_30 ;
997	assign branch_B_62 = branch_A_30 ;
998	assign branch_A_63 = branch_B_31 ;
999	assign branch_B_63 = branch_A_31 ;
1000
1001	assign metric_A_0 = metric_0 + {{(M -SW -1){branch_A_0[SW]}}, branch_A_0} ;
1002	assign metric_B_0 = metric_1 + {{(M -SW -1){branch_B_0[SW]}}, branch_B_0} ;
1003	assign metric_A_1 = metric_2 + {{(M -SW -1){branch_A_1[SW]}}, branch_A_1} ;
1004	assign metric_B_1 = metric_3 + {{(M -SW -1){branch_B_1[SW]}}, branch_B_1} ;
1005	assign metric_A_2 = metric_4 + {{(M -SW -1){branch_A_2[SW]}}, branch_A_2} ;
1006	assign metric_B_2 = metric_5 + {{(M -SW -1){branch_B_2[SW]}}, branch_B_2} ;
1007	assign metric_A_3 = metric_6 + {{(M -SW -1){branch_A_3[SW]}}, branch_A_3} ;
1008	assign metric_B_3 = metric_7 + {{(M -SW -1){branch_B_3[SW]}}, branch_B_3} ;
1009	assign metric_A_4 = metric_8 + {{(M -SW -1){branch_A_4[SW]}}, branch_A_4} ;
1010	assign metric_B_4 = metric_9 + {{(M -SW -1){branch_B_4[SW]}}, branch_B_4} ;
1011	assign metric_A_5 = metric_10 + {{(M -SW -1){branch_A_5[SW]}}, branch_A_5} ;
1012	assign metric_B_5 = metric_11 + {{(M -SW -1){branch_B_5[SW]}}, branch_B_5} ;
1013	assign metric_A_6 = metric_12 + {{(M -SW -1){branch_A_6[SW]}}, branch_A_6} ;
1014	assign metric_B_6 = metric_13 + {{(M -SW -1){branch_B_6[SW]}}, branch_B_6} ;
1015	assign metric_A_7 = metric_14 + {{(M -SW -1){branch_A_7[SW]}}, branch_A_7} ;
1016	assign metric_B_7 = metric_15 + {{(M -SW -1){branch_B_7[SW]}}, branch_B_7} ;
1017	assign metric_A_8 = metric_16 + {{(M -SW -1){branch_A_8[SW]}}, branch_A_8} ;
1018	assign metric_B_8 = metric_17 + {{(M -SW -1){branch_B_8[SW]}}, branch_B_8} ;
1019	assign metric_A_9 = metric_18 + {{(M -SW -1){branch_A_9[SW]}}, branch_A_9} ;
1020	assign metric_B_9 = metric_19 + {{(M -SW -1){branch_B_9[SW]}}, branch_B_9} ;
1021	assign metric_A_10 = metric_20 + {{(M -SW -1){branch_A_10[SW]}}, branch_A_10} ;
1022	assign metric_B_10 = metric_21 + {{(M -SW -1){branch_B_10[SW]}}, branch_B_10} ;
1023	assign metric_A_11 = metric_22 + {{(M -SW -1){branch_A_11[SW]}}, branch_A_11} ;
1024	assign metric_B_11 = metric_23 + {{(M -SW -1){branch_B_11[SW]}}, branch_B_11} ;
1025	assign metric_A_12 = metric_24 + {{(M -SW -1){branch_A_12[SW]}}, branch_A_12} ;
1026	assign metric_B_12 = metric_25 + {{(M -SW -1){branch_B_12[SW]}}, branch_B_12} ;
1027	assign metric_A_13 = metric_26 + {{(M -SW -1){branch_A_13[SW]}}, branch_A_13} ;
1028	assign metric_B_13 = metric_27 + {{(M -SW -1){branch_B_13[SW]}}, branch_B_13} ;
1029	assign metric_A_14 = metric_28 + {{(M -SW -1){branch_A_14[SW]}}, branch_A_14} ;
1030	assign metric_B_14 = metric_29 + {{(M -SW -1){branch_B_14[SW]}}, branch_B_14} ;
1031	assign metric_A_15 = metric_30 + {{(M -SW -1){branch_A_15[SW]}}, branch_A_15} ;
1032	assign metric_B_15 = metric_31 + {{(M -SW -1){branch_B_15[SW]}}, branch_B_15} ;
1033	assign metric_A_16 = metric_32 + {{(M -SW -1){branch_A_16[SW]}}, branch_A_16} ;
1034	assign metric_B_16 = metric_33 + {{(M -SW -1){branch_B_16[SW]}}, branch_B_16} ;
1035	assign metric_A_17 = metric_34 + {{(M -SW -1){branch_A_17[SW]}}, branch_A_17} ;
1036	assign metric_B_17 = metric_35 + {{(M -SW -1){branch_B_17[SW]}}, branch_B_17} ;
1037	assign metric_A_18 = metric_36 + {{(M -SW -1){branch_A_18[SW]}}, branch_A_18} ;
1038	assign metric_B_18 = metric_37 + {{(M -SW -1){branch_B_18[SW]}}, branch_B_18} ;
1039	assign metric_A_19 = metric_38 + {{(M -SW -1){branch_A_19[SW]}}, branch_A_19} ;
1040	assign metric_B_19 = metric_39 + {{(M -SW -1){branch_B_19[SW]}}, branch_B_19} ;
1041	assign metric_A_20 = metric_40 + {{(M -SW -1){branch_A_20[SW]}}, branch_A_20} ;
1042	assign metric_B_20 = metric_41 + {{(M -SW -1){branch_B_20[SW]}}, branch_B_20} ;
1043	assign metric_A_21 = metric_42 + {{(M -SW -1){branch_A_21[SW]}}, branch_A_21} ;
1044	assign metric_B_21 = metric_43 + {{(M -SW -1){branch_B_21[SW]}}, branch_B_21} ;
1045	assign metric_A_22 = metric_44 + {{(M -SW -1){branch_A_22[SW]}}, branch_A_22} ;
1046	assign metric_B_22 = metric_45 + {{(M -SW -1){branch_B_22[SW]}}, branch_B_22} ;
1047	assign metric_A_23 = metric_46 + {{(M -SW -1){branch_A_23[SW]}}, branch_A_23} ;
1048	assign metric_B_23 = metric_47 + {{(M -SW -1){branch_B_23[SW]}}, branch_B_23} ;
1049	assign metric_A_24 = metric_48 + {{(M -SW -1){branch_A_24[SW]}}, branch_A_24} ;
1050	assign metric_B_24 = metric_49 + {{(M -SW -1){branch_B_24[SW]}}, branch_B_24} ;
1051	assign metric_A_25 = metric_50 + {{(M -SW -1){branch_A_25[SW]}}, branch_A_25} ;
1052	assign metric_B_25 = metric_51 + {{(M -SW -1){branch_B_25[SW]}}, branch_B_25} ;
1053	assign metric_A_26 = metric_52 + {{(M -SW -1){branch_A_26[SW]}}, branch_A_26} ;
1054	assign metric_B_26 = metric_53 + {{(M -SW -1){branch_B_26[SW]}}, branch_B_26} ;
1055	assign metric_A_27 = metric_54 + {{(M -SW -1){branch_A_27[SW]}}, branch_A_27} ;
1056	assign metric_B_27 = metric_55 + {{(M -SW -1){branch_B_27[SW]}}, branch_B_27} ;
1057	assign metric_A_28 = metric_56 + {{(M -SW -1){branch_A_28[SW]}}, branch_A_28} ;
1058	assign metric_B_28 = metric_57 + {{(M -SW -1){branch_B_28[SW]}}, branch_B_28} ;
1059	assign metric_A_29 = metric_58 + {{(M -SW -1){branch_A_29[SW]}}, branch_A_29} ;
1060	assign metric_B_29 = metric_59 + {{(M -SW -1){branch_B_29[SW]}}, branch_B_29} ;
1061	assign metric_A_30 = metric_60 + {{(M -SW -1){branch_A_30[SW]}}, branch_A_30} ;
1062	assign metric_B_30 = metric_61 + {{(M -SW -1){branch_B_30[SW]}}, branch_B_30} ;
1063	assign metric_A_31 = metric_62 + {{(M -SW -1){branch_A_31[SW]}}, branch_A_31} ;
1064	assign metric_B_31 = metric_63 + {{(M -SW -1){branch_B_31[SW]}}, branch_B_31} ;
1065	assign metric_A_32 = metric_0 + {{(M -SW -1){branch_A_32[SW]}}, branch_A_32} ;
1066	assign metric_B_32 = metric_1 + {{(M -SW -1){branch_B_32[SW]}}, branch_B_32} ;
1067	assign metric_A_33 = metric_2 + {{(M -SW -1){branch_A_33[SW]}}, branch_A_33} ;
1068	assign metric_B_33 = metric_3 + {{(M -SW -1){branch_B_33[SW]}}, branch_B_33} ;
1069	assign metric_A_34 = metric_4 + {{(M -SW -1){branch_A_34[SW]}}, branch_A_34} ;
1070	assign metric_B_34 = metric_5 + {{(M -SW -1){branch_B_34[SW]}}, branch_B_34} ;
1071	assign metric_A_35 = metric_6 + {{(M -SW -1){branch_A_35[SW]}}, branch_A_35} ;
1072	assign metric_B_35 = metric_7 + {{(M -SW -1){branch_B_35[SW]}}, branch_B_35} ;
1073	assign metric_A_36 = metric_8 + {{(M -SW -1){branch_A_36[SW]}}, branch_A_36} ;
1074	assign metric_B_36 = metric_9 + {{(M -SW -1){branch_B_36[SW]}}, branch_B_36} ;
1075	assign metric_A_37 = metric_10 + {{(M -SW -1){branch_A_37[SW]}}, branch_A_37} ;
1076	assign metric_B_37 = metric_11 + {{(M -SW -1){branch_B_37[SW]}}, branch_B_37} ;
1077	assign metric_A_38 = metric_12 + {{(M -SW -1){branch_A_38[SW]}}, branch_A_38} ;
1078	assign metric_B_38 = metric_13 + {{(M -SW -1){branch_B_38[SW]}}, branch_B_38} ;
1079	assign metric_A_39 = metric_14 + {{(M -SW -1){branch_A_39[SW]}}, branch_A_39} ;
1080	assign metric_B_39 = metric_15 + {{(M -SW -1){branch_B_39[SW]}}, branch_B_39} ;
1081	assign metric_A_40 = metric_16 + {{(M -SW -1){branch_A_40[SW]}}, branch_A_40} ;
1082	assign metric_B_40 = metric_17 + {{(M -SW -1){branch_B_40[SW]}}, branch_B_40} ;
1083	assign metric_A_41 = metric_18 + {{(M -SW -1){branch_A_41[SW]}}, branch_A_41} ;
1084	assign metric_B_41 = metric_19 + {{(M -SW -1){branch_B_41[SW]}}, branch_B_41} ;
1085	assign metric_A_42 = metric_20 + {{(M -SW -1){branch_A_42[SW]}}, branch_A_42} ;
1086	assign metric_B_42 = metric_21 + {{(M -SW -1){branch_B_42[SW]}}, branch_B_42} ;
1087	assign metric_A_43 = metric_22 + {{(M -SW -1){branch_A_43[SW]}}, branch_A_43} ;
1088	assign metric_B_43 = metric_23 + {{(M -SW -1){branch_B_43[SW]}}, branch_B_43} ;
1089	assign metric_A_44 = metric_24 + {{(M -SW -1){branch_A_44[SW]}}, branch_A_44} ;
1090	assign metric_B_44 = metric_25 + {{(M -SW -1){branch_B_44[SW]}}, branch_B_44} ;
1091	assign metric_A_45 = metric_26 + {{(M -SW -1){branch_A_45[SW]}}, branch_A_45} ;
1092	assign metric_B_45 = metric_27 + {{(M -SW -1){branch_B_45[SW]}}, branch_B_45} ;
1093	assign metric_A_46 = metric_28 + {{(M -SW -1){branch_A_46[SW]}}, branch_A_46} ;
1094	assign metric_B_46 = metric_29 + {{(M -SW -1){branch_B_46[SW]}}, branch_B_46} ;
1095	assign metric_A_47 = metric_30 + {{(M -SW -1){branch_A_47[SW]}}, branch_A_47} ;
1096	assign metric_B_47 = metric_31 + {{(M -SW -1){branch_B_47[SW]}}, branch_B_47} ;
1097	assign metric_A_48 = metric_32 + {{(M -SW -1){branch_A_48[SW]}}, branch_A_48} ;
1098	assign metric_B_48 = metric_33 + {{(M -SW -1){branch_B_48[SW]}}, branch_B_48} ;
1099	assign metric_A_49 = metric_34 + {{(M -SW -1){branch_A_49[SW]}}, branch_A_49} ;
1100	assign metric_B_49 = metric_35 + {{(M -SW -1){branch_B_49[SW]}}, branch_B_49} ;
1101	assign metric_A_50 = metric_36 + {{(M -SW -1){branch_A_50[SW]}}, branch_A_50} ;
1102	assign metric_B_50 = metric_37 + {{(M -SW -1){branch_B_50[SW]}}, branch_B_50} ;
1103	assign metric_A_51 = metric_38 + {{(M -SW -1){branch_A_51[SW]}}, branch_A_51} ;
1104	assign metric_B_51 = metric_39 + {{(M -SW -1){branch_B_51[SW]}}, branch_B_51} ;
1105	assign metric_A_52 = metric_40 + {{(M -SW -1){branch_A_52[SW]}}, branch_A_52} ;
1106	assign metric_B_52 = metric_41 + {{(M -SW -1){branch_B_52[SW]}}, branch_B_52} ;
1107	assign metric_A_53 = metric_42 + {{(M -SW -1){branch_A_53[SW]}}, branch_A_53} ;
1108	assign metric_B_53 = metric_43 + {{(M -SW -1){branch_B_53[SW]}}, branch_B_53} ;
1109	assign metric_A_54 = metric_44 + {{(M -SW -1){branch_A_54[SW]}}, branch_A_54} ;
1110	assign metric_B_54 = metric_45 + {{(M -SW -1){branch_B_54[SW]}}, branch_B_54} ;
1111	assign metric_A_55 = metric_46 + {{(M -SW -1){branch_A_55[SW]}}, branch_A_55} ;
1112	assign metric_B_55 = metric_47 + {{(M -SW -1){branch_B_55[SW]}}, branch_B_55} ;
1113	assign metric_A_56 = metric_48 + {{(M -SW -1){branch_A_56[SW]}}, branch_A_56} ;
1114	assign metric_B_56 = metric_49 + {{(M -SW -1){branch_B_56[SW]}}, branch_B_56} ;
1115	assign metric_A_57 = metric_50 + {{(M -SW -1){branch_A_57[SW]}}, branch_A_57} ;
1116	assign metric_B_57 = metric_51 + {{(M -SW -1){branch_B_57[SW]}}, branch_B_57} ;
1117	assign metric_A_58 = metric_52 + {{(M -SW -1){branch_A_58[SW]}}, branch_A_58} ;
1118	assign metric_B_58 = metric_53 + {{(M -SW -1){branch_B_58[SW]}}, branch_B_58} ;
1119	assign metric_A_59 = metric_54 + {{(M -SW -1){branch_A_59[SW]}}, branch_A_59} ;
1120	assign metric_B_59 = metric_55 + {{(M -SW -1){branch_B_59[SW]}}, branch_B_59} ;
1121	assign metric_A_60 = metric_56 + {{(M -SW -1){branch_A_60[SW]}}, branch_A_60} ;
1122	assign metric_B_60 = metric_57 + {{(M -SW -1){branch_B_60[SW]}}, branch_B_60} ;
1123	assign metric_A_61 = metric_58 + {{(M -SW -1){branch_A_61[SW]}}, branch_A_61} ;
1124	assign metric_B_61 = metric_59 + {{(M -SW -1){branch_B_61[SW]}}, branch_B_61} ;
1125	assign metric_A_62 = metric_60 + {{(M -SW -1){branch_A_62[SW]}}, branch_A_62} ;
1126	assign metric_B_62 = metric_61 + {{(M -SW -1){branch_B_62[SW]}}, branch_B_62} ;
1127	assign metric_A_63 = metric_62 + {{(M -SW -1){branch_A_63[SW]}}, branch_A_63} ;
1128	assign metric_B_63 = metric_63 + {{(M -SW -1){branch_B_63[SW]}}, branch_B_63} ;
1129
1130	assign diff_0 = metric_A_0 - metric_B_0 ;
1131	assign diff_1 = metric_A_1 - metric_B_1 ;
1132	assign diff_2 = metric_A_2 - metric_B_2 ;
1133	assign diff_3 = metric_A_3 - metric_B_3 ;
1134	assign diff_4 = metric_A_4 - metric_B_4 ;
1135	assign diff_5 = metric_A_5 - metric_B_5 ;
1136	assign diff_6 = metric_A_6 - metric_B_6 ;
1137	assign diff_7 = metric_A_7 - metric_B_7 ;
1138	assign diff_8 = metric_A_8 - metric_B_8 ;
1139	assign diff_9 = metric_A_9 - metric_B_9 ;
1140	assign diff_10 = metric_A_10 - metric_B_10 ;
1141	assign diff_11 = metric_A_11 - metric_B_11 ;
1142	assign diff_12 = metric_A_12 - metric_B_12 ;
1143	assign diff_13 = metric_A_13 - metric_B_13 ;
1144	assign diff_14 = metric_A_14 - metric_B_14 ;
1145	assign diff_15 = metric_A_15 - metric_B_15 ;
1146	assign diff_16 = metric_A_16 - metric_B_16 ;
1147	assign diff_17 = metric_A_17 - metric_B_17 ;
1148	assign diff_18 = metric_A_18 - metric_B_18 ;
1149	assign diff_19 = metric_A_19 - metric_B_19 ;
1150	assign diff_20 = metric_A_20 - metric_B_20 ;
1151	assign diff_21 = metric_A_21 - metric_B_21 ;
1152	assign diff_22 = metric_A_22 - metric_B_22 ;
1153	assign diff_23 = metric_A_23 - metric_B_23 ;
1154	assign diff_24 = metric_A_24 - metric_B_24 ;
1155	assign diff_25 = metric_A_25 - metric_B_25 ;
1156	assign diff_26 = metric_A_26 - metric_B_26 ;
1157	assign diff_27 = metric_A_27 - metric_B_27 ;
1158	assign diff_28 = metric_A_28 - metric_B_28 ;
1159	assign diff_29 = metric_A_29 - metric_B_29 ;
1160	assign diff_30 = metric_A_30 - metric_B_30 ;
1161	assign diff_31 = metric_A_31 - metric_B_31 ;
1162	assign diff_32 = metric_A_32 - metric_B_32 ;
1163	assign diff_33 = metric_A_33 - metric_B_33 ;
1164	assign diff_34 = metric_A_34 - metric_B_34 ;
1165	assign diff_35 = metric_A_35 - metric_B_35 ;
1166	assign diff_36 = metric_A_36 - metric_B_36 ;
1167	assign diff_37 = metric_A_37 - metric_B_37 ;
1168	assign diff_38 = metric_A_38 - metric_B_38 ;
1169	assign diff_39 = metric_A_39 - metric_B_39 ;
1170	assign diff_40 = metric_A_40 - metric_B_40 ;
1171	assign diff_41 = metric_A_41 - metric_B_41 ;
1172	assign diff_42 = metric_A_42 - metric_B_42 ;
1173	assign diff_43 = metric_A_43 - metric_B_43 ;
1174	assign diff_44 = metric_A_44 - metric_B_44 ;
1175	assign diff_45 = metric_A_45 - metric_B_45 ;
1176	assign diff_46 = metric_A_46 - metric_B_46 ;
1177	assign diff_47 = metric_A_47 - metric_B_47 ;
1178	assign diff_48 = metric_A_48 - metric_B_48 ;
1179	assign diff_49 = metric_A_49 - metric_B_49 ;
1180	assign diff_50 = metric_A_50 - metric_B_50 ;
1181	assign diff_51 = metric_A_51 - metric_B_51 ;
1182	assign diff_52 = metric_A_52 - metric_B_52 ;
1183	assign diff_53 = metric_A_53 - metric_B_53 ;
1184	assign diff_54 = metric_A_54 - metric_B_54 ;
1185	assign diff_55 = metric_A_55 - metric_B_55 ;
1186	assign diff_56 = metric_A_56 - metric_B_56 ;
1187	assign diff_57 = metric_A_57 - metric_B_57 ;
1188	assign diff_58 = metric_A_58 - metric_B_58 ;
1189	assign diff_59 = metric_A_59 - metric_B_59 ;
1190	assign diff_60 = metric_A_60 - metric_B_60 ;
1191	assign diff_61 = metric_A_61 - metric_B_61 ;
1192	assign diff_62 = metric_A_62 - metric_B_62 ;
1193	assign diff_63 = metric_A_63 - metric_B_63 ;
1194
1195	assign metric_next_0 = diff_0 [M -1] ? metric_B_0 : metric_A_0 ;
1196	assign metric_next_1 = diff_1 [M -1] ? metric_B_1 : metric_A_1 ;
1197	assign metric_next_2 = diff_2 [M -1] ? metric_B_2 : metric_A_2 ;
1198	assign metric_next_3 = diff_3 [M -1] ? metric_B_3 : metric_A_3 ;
1199	assign metric_next_4 = diff_4 [M -1] ? metric_B_4 : metric_A_4 ;
1200	assign metric_next_5 = diff_5 [M -1] ? metric_B_5 : metric_A_5 ;
1201	assign metric_next_6 = diff_6 [M -1] ? metric_B_6 : metric_A_6 ;
1202	assign metric_next_7 = diff_7 [M -1] ? metric_B_7 : metric_A_7 ;
1203	assign metric_next_8 = diff_8 [M -1] ? metric_B_8 : metric_A_8 ;
1204	assign metric_next_9 = diff_9 [M -1] ? metric_B_9 : metric_A_9 ;
1205	assign metric_next_10 = diff_10 [M -1] ? metric_B_10 : metric_A_10 ;
1206	assign metric_next_11 = diff_11 [M -1] ? metric_B_11 : metric_A_11 ;
1207	assign metric_next_12 = diff_12 [M -1] ? metric_B_12 : metric_A_12 ;
1208	assign metric_next_13 = diff_13 [M -1] ? metric_B_13 : metric_A_13 ;
1209	assign metric_next_14 = diff_14 [M -1] ? metric_B_14 : metric_A_14 ;
1210	assign metric_next_15 = diff_15 [M -1] ? metric_B_15 : metric_A_15 ;
1211	assign metric_next_16 = diff_16 [M -1] ? metric_B_16 : metric_A_16 ;
1212	assign metric_next_17 = diff_17 [M -1] ? metric_B_17 : metric_A_17 ;
1213	assign metric_next_18 = diff_18 [M -1] ? metric_B_18 : metric_A_18 ;
1214	assign metric_next_19 = diff_19 [M -1] ? metric_B_19 : metric_A_19 ;
1215	assign metric_next_20 = diff_20 [M -1] ? metric_B_20 : metric_A_20 ;
1216	assign metric_next_21 = diff_21 [M -1] ? metric_B_21 : metric_A_21 ;
1217	assign metric_next_22 = diff_22 [M -1] ? metric_B_22 : metric_A_22 ;
1218	assign metric_next_23 = diff_23 [M -1] ? metric_B_23 : metric_A_23 ;
1219	assign metric_next_24 = diff_24 [M -1] ? metric_B_24 : metric_A_24 ;
1220	assign metric_next_25 = diff_25 [M -1] ? metric_B_25 : metric_A_25 ;
1221	assign metric_next_26 = diff_26 [M -1] ? metric_B_26 : metric_A_26 ;
1222	assign metric_next_27 = diff_27 [M -1] ? metric_B_27 : metric_A_27 ;
1223	assign metric_next_28 = diff_28 [M -1] ? metric_B_28 : metric_A_28 ;
1224	assign metric_next_29 = diff_29 [M -1] ? metric_B_29 : metric_A_29 ;
1225	assign metric_next_30 = diff_30 [M -1] ? metric_B_30 : metric_A_30 ;
1226	assign metric_next_31 = diff_31 [M -1] ? metric_B_31 : metric_A_31 ;
1227	assign metric_next_32 = diff_32 [M -1] ? metric_B_32 : metric_A_32 ;
1228	assign metric_next_33 = diff_33 [M -1] ? metric_B_33 : metric_A_33 ;
1229	assign metric_next_34 = diff_34 [M -1] ? metric_B_34 : metric_A_34 ;
1230	assign metric_next_35 = diff_35 [M -1] ? metric_B_35 : metric_A_35 ;
1231	assign metric_next_36 = diff_36 [M -1] ? metric_B_36 : metric_A_36 ;
1232	assign metric_next_37 = diff_37 [M -1] ? metric_B_37 : metric_A_37 ;
1233	assign metric_next_38 = diff_38 [M -1] ? metric_B_38 : metric_A_38 ;
1234	assign metric_next_39 = diff_39 [M -1] ? metric_B_39 : metric_A_39 ;
1235	assign metric_next_40 = diff_40 [M -1] ? metric_B_40 : metric_A_40 ;
1236	assign metric_next_41 = diff_41 [M -1] ? metric_B_41 : metric_A_41 ;
1237	assign metric_next_42 = diff_42 [M -1] ? metric_B_42 : metric_A_42 ;
1238	assign metric_next_43 = diff_43 [M -1] ? metric_B_43 : metric_A_43 ;
1239	assign metric_next_44 = diff_44 [M -1] ? metric_B_44 : metric_A_44 ;
1240	assign metric_next_45 = diff_45 [M -1] ? metric_B_45 : metric_A_45 ;
1241	assign metric_next_46 = diff_46 [M -1] ? metric_B_46 : metric_A_46 ;
1242	assign metric_next_47 = diff_47 [M -1] ? metric_B_47 : metric_A_47 ;
1243	assign metric_next_48 = diff_48 [M -1] ? metric_B_48 : metric_A_48 ;
1244	assign metric_next_49 = diff_49 [M -1] ? metric_B_49 : metric_A_49 ;
1245	assign metric_next_50 = diff_50 [M -1] ? metric_B_50 : metric_A_50 ;
1246	assign metric_next_51 = diff_51 [M -1] ? metric_B_51 : metric_A_51 ;
1247	assign metric_next_52 = diff_52 [M -1] ? metric_B_52 : metric_A_52 ;
1248	assign metric_next_53 = diff_53 [M -1] ? metric_B_53 : metric_A_53 ;
1249	assign metric_next_54 = diff_54 [M -1] ? metric_B_54 : metric_A_54 ;
1250	assign metric_next_55 = diff_55 [M -1] ? metric_B_55 : metric_A_55 ;
1251	assign metric_next_56 = diff_56 [M -1] ? metric_B_56 : metric_A_56 ;
1252	assign metric_next_57 = diff_57 [M -1] ? metric_B_57 : metric_A_57 ;
1253	assign metric_next_58 = diff_58 [M -1] ? metric_B_58 : metric_A_58 ;
1254	assign metric_next_59 = diff_59 [M -1] ? metric_B_59 : metric_A_59 ;
1255	assign metric_next_60 = diff_60 [M -1] ? metric_B_60 : metric_A_60 ;
1256	assign metric_next_61 = diff_61 [M -1] ? metric_B_61 : metric_A_61 ;
1257	assign metric_next_62 = diff_62 [M -1] ? metric_B_62 : metric_A_62 ;
1258	assign metric_next_63 = diff_63 [M -1] ? metric_B_63 : metric_A_63 ;
1259
1260	always @ (posedge clk)
1261	if (~nrst)
1262	begin
1263	metric_0 <= 10 ;
1264	metric_1 <= 0 ;
1265	metric_2 <= 0 ;
1266	metric_3 <= 0 ;
1267	metric_4 <= 0 ;
1268	metric_5 <= 0 ;
1269	metric_6 <= 0 ;
1270	metric_7 <= 0 ;
1271	metric_8 <= 0 ;
1272	metric_9 <= 0 ;
1273	metric_10 <= 0 ;
1274	metric_11 <= 0 ;
1275	metric_12 <= 0 ;
1276	metric_13 <= 0 ;
1277	metric_14 <= 0 ;
1278	metric_15 <= 0 ;
1279	metric_16 <= 0 ;
1280	metric_17 <= 0 ;
1281	metric_18 <= 0 ;
1282	metric_19 <= 0 ;
1283	metric_20 <= 0 ;
1284	metric_21 <= 0 ;
1285	metric_22 <= 0 ;
1286	metric_23 <= 0 ;
1287	metric_24 <= 0 ;
1288	metric_25 <= 0 ;
1289	metric_26 <= 0 ;
1290	metric_27 <= 0 ;
1291	metric_28 <= 0 ;
1292	metric_29 <= 0 ;
1293	metric_30 <= 0 ;
1294	metric_31 <= 0 ;
1295	metric_32 <= 0 ;
1296	metric_33 <= 0 ;
1297	metric_34 <= 0 ;
1298	metric_35 <= 0 ;
1299	metric_36 <= 0 ;
1300	metric_37 <= 0 ;
1301	metric_38 <= 0 ;
1302	metric_39 <= 0 ;
1303	metric_40 <= 0 ;
1304	metric_41 <= 0 ;
1305	metric_42 <= 0 ;
1306	metric_43 <= 0 ;
1307	metric_44 <= 0 ;
1308	metric_45 <= 0 ;
1309	metric_46 <= 0 ;
1310	metric_47 <= 0 ;
1311	metric_48 <= 0 ;
1312	metric_49 <= 0 ;
1313	metric_50 <= 0 ;
1314	metric_51 <= 0 ;
1315	metric_52 <= 0 ;
1316	metric_53 <= 0 ;
1317	metric_54 <= 0 ;
1318	metric_55 <= 0 ;
1319	metric_56 <= 0 ;
1320	metric_57 <= 0 ;
1321	metric_58 <= 0 ;
1322	metric_59 <= 0 ;
1323	metric_60 <= 0 ;
1324	metric_61 <= 0 ;
1325	metric_62 <= 0 ;
1326	metric_63 <= 0 ;
1327	end
1328	else if (packet_start)
1329	begin
1330	metric_0 <= 10 ;
1331	metric_1 <= 0 ;
1332	metric_2 <= 0 ;
1333	metric_3 <= 0 ;
1334	metric_4 <= 0 ;
1335	metric_5 <= 0 ;
1336	metric_6 <= 0 ;
1337	metric_7 <= 0 ;
1338	metric_8 <= 0 ;
1339	metric_9 <= 0 ;
1340	metric_10 <= 0 ;
1341	metric_11 <= 0 ;
1342	metric_12 <= 0 ;
1343	metric_13 <= 0 ;
1344	metric_14 <= 0 ;
1345	metric_15 <= 0 ;
1346	metric_16 <= 0 ;
1347	metric_17 <= 0 ;
1348	metric_18 <= 0 ;
1349	metric_19 <= 0 ;
1350	metric_20 <= 0 ;
1351	metric_21 <= 0 ;
1352	metric_22 <= 0 ;
1353	metric_23 <= 0 ;
1354	metric_24 <= 0 ;
1355	metric_25 <= 0 ;
1356	metric_26 <= 0 ;
1357	metric_27 <= 0 ;
1358	metric_28 <= 0 ;
1359	metric_29 <= 0 ;
1360	metric_30 <= 0 ;
1361	metric_31 <= 0 ;
1362	metric_32 <= 0 ;
1363	metric_33 <= 0 ;
1364	metric_34 <= 0 ;
1365	metric_35 <= 0 ;
1366	metric_36 <= 0 ;
1367	metric_37 <= 0 ;
1368	metric_38 <= 0 ;
1369	metric_39 <= 0 ;
1370	metric_40 <= 0 ;
1371	metric_41 <= 0 ;
1372	metric_42 <= 0 ;
1373	metric_43 <= 0 ;
1374	metric_44 <= 0 ;
1375	metric_45 <= 0 ;
1376	metric_46 <= 0 ;
1377	metric_47 <= 0 ;
1378	metric_48 <= 0 ;
1379	metric_49 <= 0 ;
1380	metric_50 <= 0 ;
1381	metric_51 <= 0 ;
1382	metric_52 <= 0 ;
1383	metric_53 <= 0 ;
1384	metric_54 <= 0 ;
1385	metric_55 <= 0 ;
1386	metric_56 <= 0 ;
1387	metric_57 <= 0 ;
1388	metric_58 <= 0 ;
1389	metric_59 <= 0 ;
1390	metric_60 <= 0 ;
1391	metric_61 <= 0 ;
1392	metric_62 <= 0 ;
1393	metric_63 <= 0 ;
1394	end
1395	else if (dv_in_gate)
1396	begin
1397	// update metric
1398	metric_0 <= metric_next_0 ;
1399	metric_1 <= metric_next_1 ;
1400	metric_2 <= metric_next_2 ;
1401	metric_3 <= metric_next_3 ;
1402	metric_4 <= metric_next_4 ;
1403	metric_5 <= metric_next_5 ;
1404	metric_6 <= metric_next_6 ;
1405	metric_7 <= metric_next_7 ;
1406	metric_8 <= metric_next_8 ;
1407	metric_9 <= metric_next_9 ;
1408	metric_10 <= metric_next_10;
1409	metric_11 <= metric_next_11;
1410	metric_12 <= metric_next_12;
1411	metric_13 <= metric_next_13;
1412	metric_14 <= metric_next_14;
1413	metric_15 <= metric_next_15;
1414	metric_16 <= metric_next_16 ;
1415	metric_17 <= metric_next_17;
1416	metric_18 <= metric_next_18;
1417	metric_19 <= metric_next_19;
1418	metric_20 <= metric_next_20;
1419	metric_21 <= metric_next_21;
1420	metric_22 <= metric_next_22;
1421	metric_23 <= metric_next_23;
1422	metric_24 <= metric_next_24;
1423	metric_25 <= metric_next_25;
1424	metric_26 <= metric_next_26;
1425	metric_27 <= metric_next_27;
1426	metric_28 <= metric_next_28;
1427	metric_29 <= metric_next_29;
1428	metric_30 <= metric_next_30;
1429	metric_31 <= metric_next_31;
1430	metric_32 <= metric_next_32 ;
1431	metric_33 <= metric_next_33;
1432	metric_34 <= metric_next_34;
1433	metric_35 <= metric_next_35;
1434	metric_36 <= metric_next_36;
1435	metric_37 <= metric_next_37;
1436	metric_38 <= metric_next_38;
1437	metric_39 <= metric_next_39;
1438	metric_40 <= metric_next_40;
1439	metric_41 <= metric_next_41;
1440	metric_42 <= metric_next_42;
1441	metric_43 <= metric_next_43;
1442	metric_44 <= metric_next_44;
1443	metric_45 <= metric_next_45;
1444	metric_46 <= metric_next_46;
1445	metric_47 <= metric_next_47;
1446	metric_48 <= metric_next_48 ;
1447	metric_49 <= metric_next_49;
1448	metric_50 <= metric_next_50;
1449	metric_51 <= metric_next_51;
1450	metric_52 <= metric_next_52;
1451	metric_53 <= metric_next_53;
1452	metric_54 <= metric_next_54;
1453	metric_55 <= metric_next_55;
1454	metric_56 <= metric_next_56;
1455	metric_57 <= metric_next_57;
1456	metric_58 <= metric_next_58;
1457	metric_59 <= metric_next_59;
1458	metric_60 <= metric_next_60;
1459	metric_61 <= metric_next_61;
1460	metric_62 <= metric_next_62;
1461	metric_63 <= metric_next_63;
1462	end
1463
1464	always @ (posedge clk)
1465	if (~nrst)
1466	wptr <= 0 ;
1467	else if (packet_start)
1468	wptr <= 0 ;
1469	else if (dv_in_gate)
1470	wptr <= wptr + 1 ;
1471
1472	always @ (posedge clk)
1473	if (~nrst)
1474	last_wptr <= 1'b0 ;
1475	else if (dv_in_gate)
1476	last_wptr <= wptr ;
1477
1478	always @ (posedge clk)
1479	if(dv_in_gate)
1480	begin
1481	// update transition
1482	tran_state_0 [wptr] <= diff_0 [M -1] ;
1483	tran_state_1 [wptr] <= diff_1 [M -1] ;
1484	tran_state_2 [wptr] <= diff_2 [M -1] ;
1485	tran_state_3 [wptr] <= diff_3 [M -1] ;
1486	tran_state_4 [wptr] <= diff_4 [M -1] ;
1487	tran_state_5 [wptr] <= diff_5 [M -1] ;
1488	tran_state_6 [wptr] <= diff_6 [M -1] ;
1489	tran_state_7 [wptr] <= diff_7 [M -1] ;
1490	tran_state_8 [wptr] <= diff_8 [M -1] ;
1491	tran_state_9 [wptr] <= diff_9 [M -1] ;
1492	tran_state_10 [wptr] <= diff_10 [M -1] ;
1493	tran_state_11 [wptr] <= diff_11 [M -1] ;
1494	tran_state_12 [wptr] <= diff_12 [M -1] ;
1495	tran_state_13 [wptr] <= diff_13 [M -1] ;
1496	tran_state_14 [wptr] <= diff_14 [M -1] ;
1497	tran_state_15 [wptr] <= diff_15 [M -1] ;
1498	tran_state_16 [wptr] <= diff_16 [M -1] ;
1499	tran_state_17 [wptr] <= diff_17 [M -1] ;
1500	tran_state_18 [wptr] <= diff_18 [M -1] ;
1501	tran_state_19 [wptr] <= diff_19 [M -1] ;
1502	tran_state_20 [wptr] <= diff_20 [M -1] ;
1503	tran_state_21 [wptr] <= diff_21 [M -1] ;
1504	tran_state_22 [wptr] <= diff_22 [M -1] ;
1505	tran_state_23 [wptr] <= diff_23 [M -1] ;
1506	tran_state_24 [wptr] <= diff_24 [M -1] ;
1507	tran_state_25 [wptr] <= diff_25 [M -1] ;
1508	tran_state_26 [wptr] <= diff_26 [M -1] ;
1509	tran_state_27 [wptr] <= diff_27 [M -1] ;
1510	tran_state_28 [wptr] <= diff_28 [M -1] ;
1511	tran_state_29 [wptr] <= diff_29 [M -1] ;
1512	tran_state_30 [wptr] <= diff_30 [M -1] ;
1513	tran_state_31 [wptr] <= diff_31 [M -1] ;
1514	tran_state_32 [wptr] <= diff_32 [M -1] ;
1515	tran_state_33 [wptr] <= diff_33 [M -1] ;
1516	tran_state_34 [wptr] <= diff_34 [M -1] ;
1517	tran_state_35 [wptr] <= diff_35 [M -1] ;
1518	tran_state_36 [wptr] <= diff_36 [M -1] ;
1519	tran_state_37 [wptr] <= diff_37 [M -1] ;
1520	tran_state_38 [wptr] <= diff_38 [M -1] ;
1521	tran_state_39 [wptr] <= diff_39 [M -1] ;
1522	tran_state_40 [wptr] <= diff_40 [M -1] ;
1523	tran_state_41 [wptr] <= diff_41 [M -1] ;
1524	tran_state_42 [wptr] <= diff_42 [M -1] ;
1525	tran_state_43 [wptr] <= diff_43 [M -1] ;
1526	tran_state_44 [wptr] <= diff_44 [M -1] ;
1527	tran_state_45 [wptr] <= diff_45 [M -1] ;
1528	tran_state_46 [wptr] <= diff_46 [M -1] ;
1529	tran_state_47 [wptr] <= diff_47 [M -1] ;
1530	tran_state_48 [wptr] <= diff_48 [M -1] ;
1531	tran_state_49 [wptr] <= diff_49 [M -1] ;
1532	tran_state_50 [wptr] <= diff_50 [M -1] ;
1533	tran_state_51 [wptr] <= diff_51 [M -1] ;
1534	tran_state_52 [wptr] <= diff_52 [M -1] ;
1535	tran_state_53 [wptr] <= diff_53 [M -1] ;
1536	tran_state_54 [wptr] <= diff_54 [M -1] ;
1537	tran_state_55 [wptr] <= diff_55 [M -1] ;
1538	tran_state_56 [wptr] <= diff_56 [M -1] ;
1539	tran_state_57 [wptr] <= diff_57 [M -1] ;
1540	tran_state_58 [wptr] <= diff_58 [M -1] ;
1541	tran_state_59 [wptr] <= diff_59 [M -1] ;
1542	tran_state_60 [wptr] <= diff_60 [M -1] ;
1543	tran_state_61 [wptr] <= diff_61 [M -1] ;
1544	tran_state_62 [wptr] <= diff_62 [M -1] ;
1545	tran_state_63 [wptr] <= diff_63 [M -1] ;
1546	end
1547
1548	reg early_trace1_d0, early_trace2_d0;
1549	wire early_trace1_pos, early_trace2_pos;
1550
1551	always @ (posedge clk)
1552	begin
1553	early_trace1_d0 <= early_trace1;
1554	early_trace2_d0 <= early_trace2;
1555	end
1556
1557	assign early_trace1_pos = (early_trace1 & ~early_trace1_d0);
1558	assign early_trace2_pos = (early_trace2 & ~early_trace2_d0);
1559
1560	always @ (posedge clk)
1561	if (~nrst)
1562	begin
1563	early_trace1_en <= 1'b0;
1564	early_trace2_en <= 1'b0;
1565	trace <= 1'b0 ;
1566	cnt <= 0 ;
1567	trace_start_wptr <= 0 ;
1568	end
1569	else if (packet_start)
1570	begin
1571	early_trace1_en <= 1'b0;
1572	early_trace2_en <= 1'b0;
1573	trace <= 1'b0 ;
1574	cnt <= 0 ;
1575	end
1576	else if (dv_in_gate)
1577	begin
1578	if (cnt == L-1)
1579	begin
1580	early_trace1_en <= 1'b0;
1581	early_trace2_en <= 1'b0;
1582	trace <= 1'b1 ;
1583	trace_start_wptr <= wptr ;
1584	cnt <= C ;
1585	end
1586	else if (early_trace1_pos)
1587	begin
1588	early_trace1_en <= 1'b1;
1589	early_trace2_en <= 1'b0;
1590	trace <= 1'b1 ;
1591	trace_start_wptr <= wptr ;
1592	cnt <= C_EARLY1 ;
1593	end
1594	else if (early_trace2_pos)
1595	begin
1596	early_trace1_en <= 1'b0;
1597	early_trace2_en <= 1'b1;
1598	trace <= 1'b1 ;
1599	trace_start_wptr <= wptr ;
1600	cnt <= C_EARLY2 ;
1601	end
1602	else
1603	begin
1604	early_trace1_en <= 1'b0;
1605	early_trace2_en <= 1'b0;
1606	trace <= 1'b0 ;
1607	cnt <= cnt + 1 ;
1608	end
1609	end
1610	else if (trace2)
1611	trace_start_wptr <= last_wptr ;
1612	else
1613	trace <= 1'b0 ;
1614
1615	always @ (posedge clk)
1616	if (~nrst)
1617	begin
1618	flush_en <= 1'b0 ;
1619	flush_cnt <= 0 ;
1620	end
1621	else if (packet_end)
1622	begin
1623	flush_en <= 1 ;
1624	flush_cnt <= 0 ;
1625	end
1626	else if (flush_en)
1627	begin
1628	if (flush_cnt == 63)
1629	flush_en <= 1'b0 ;
1630	else
1631	flush_cnt <= flush_cnt + 1 ;
1632	end
1633
1634	assign flush = flush_cnt == 60 ;
1635
1636	always @ (posedge clk)
1637	if (~nrst)
1638	done_i <= 1'b0 ;
1639	else if (packet_start)
1640	done_i <= 1'b0 ;
1641	//else if (packet_end && cnt == L-1)
1642	else if (trace2 & last_cnt_next[LW-1])
1643	done_i <= 1'b1 ;
1644	else if (last_trace_d3)
1645	done_i <= 1'b1 ;
1646
1647
1648	always @ (posedge clk)
1649	if (~nrst)
1650	last_trace <= 1'b0 ;
1651	else if (packet_start)
1652	last_trace <= 1'b0 ;
1653	else if (flush && trace_done && cnt !=L-1 )
1654	last_trace <= 1'b1 ;
1655
1656	always @ (posedge clk)
1657	last_trace_s0 <= last_trace ;
1658
1659	assign trace2 = ~last_trace_s0 & last_trace ;
1660	assign trace_pos_i = trace \| trace2 ;
1661
1662	always @ (posedge clk)
1663	if (~nrst)
1664	begin
1665	trace2_s1 <= 1'b0 ;
1666	trace2_s2 <= 1'b0 ;
1667	end
1668	else
1669	begin
1670	trace2_s1 <= trace2 ;
1671	trace2_s2 <= trace2_s1 ;
1672	end
1673
1674
1675	always @ (posedge clk)
1676	begin
1677	trace_pos_s0 <= trace_pos_i ;
1678	trace_pos <= trace_pos_s0 ;
1679	end
1680
1681	always @ (posedge clk)
1682	if(~nrst)
1683	last_trace_num <= 0 ;
1684	else
1685	begin
1686	if (packet_start)
1687	last_trace_num <= 0 ;
1688	else if (trace2)
1689	last_trace_num <= L -cnt ;
1690	else if (last_trace_d0)
1691	last_trace_num <= last_trace_num + R ;
1692	end
1693
1694	always @ (posedge clk)
1695	begin
1696	last_trace_d0 <= last_trace & trace_done_pos ;
1697	last_trace_d1 <= last_trace_d0 ;
1698	last_trace_d2 <= last_trace_d1 ;
1699	last_trace_d3 <= last_trace_d2 ;
1700	last_trace_d4 <= last_trace_d3 ;
1701	last_trace_d5 <= last_trace_d4 ;
1702	end
1703
1704	assign last_cnt_next = last_cnt - R ;
1705
1706	always @ (posedge clk)
1707	if(~nrst)
1708	begin
1709	one_more_out <= 1'b0 ;
1710	last_cnt <= 0 ;
1711	end
1712	else
1713	begin
1714	if (packet_start)
1715	begin
1716	one_more_out <= 1'b0 ;
1717	last_cnt <= 0 ;
1718	end
1719	else if (flush)
1720	last_cnt <= cnt ;
1721	else if (last_trace_d5)
1722	begin
1723	if (~last_cnt_next[LW-1])
1724	begin
1725	last_cnt <= last_cnt_next ;
1726	one_more_out <= 1'b1 ;
1727	end
1728	end
1729	else
1730	one_more_out <= 1'b0 ;
1731	end
1732
1733	always @ (posedge clk)
1734	if (~nrst)
1735	trace_en <= 0 ;
1736	else if (packet_start)
1737	trace_en <= 0 ;
1738	else if (trace_pos)
1739	trace_en <= 1'b1 ;
1740	else if ((trace_cnt == L-2) & (early_trace1_en == 0) & (early_trace2_en == 0))
1741	trace_en <= 1'b0 ;
1742	else if ((trace_cnt == L_EARLY1-2) & (early_trace1_en == 1))
1743	trace_en <= 1'b0 ;
1744	else if ((trace_cnt == L_EARLY2-2) & (early_trace2_en == 1))
1745	trace_en <= 1'b0 ;
1746
1747	always @ (posedge clk)
1748	if (~nrst)
1749	trace_cnt <= 0 ;
1750	else if (trace_pos)
1751	trace_cnt <= 0 ;
1752	else if (trace_en)
1753	trace_cnt <= trace_cnt + 2;
1754
1755	//assign trace_done = (trace_cnt == L);
1756	assign trace_done = early_trace1_en ? (trace_cnt == L_EARLY1) : (early_trace2_en ? (trace_cnt == L_EARLY2) : (trace_cnt == L));
1757
1758	always @ (posedge clk)
1759	trace_done_s0 <= trace_done ;
1760	assign trace_done_pos = ~trace_done_s0 & trace_done ;
1761
1762	//==============================
1763	// Get max metric
1764	//==============================
1765	max_metric #(M, K) max_metric_0 (
1766	.clk (clk ),
1767	.a (metric_0 ),
1768	.b (metric_1 ),
1769	.c (metric_2 ),
1770	.d (metric_3 ),
1771	.sa (6'd0 ),
1772	.sb (6'd1 ),
1773	.sc (6'd2 ),
1774	.sd (6'd3 ),
1775	.state (state_0 ),
1776	.max (max_0 )
1777	) ;
1778
1779	//==============================
1780	// Get max metric
1781	//==============================
1782	max_metric #(M, K) max_metric_1 (
1783	.clk (clk ),
1784	.a (metric_4 ),
1785	.b (metric_5 ),
1786	.c (metric_6 ),
1787	.d (metric_7 ),
1788	.sa (6'd4 ),
1789	.sb (6'd5 ),
1790	.sc (6'd6 ),
1791	.sd (6'd7 ),
1792	.state (state_1 ),
1793	.max (max_1 )
1794	) ;
1795
1796	//==============================
1797	// Get max metric
1798	//==============================
1799	max_metric #(M, K) max_metric_2 (
1800	.clk (clk ),
1801	.a (metric_8 ),
1802	.b (metric_9 ),
1803	.c (metric_10 ),
1804	.d (metric_11 ),
1805	.sa (6'd8 ),
1806	.sb (6'd9 ),
1807	.sc (6'd10 ),
1808	.sd (6'd11 ),
1809	.state (state_2 ),
1810	.max (max_2 )
1811	) ;
1812
1813	//==============================
1814	// Get max metric
1815	//==============================
1816	max_metric #(M, K) max_metric_3 (
1817	.clk (clk ),
1818	.a (metric_12 ),
1819	.b (metric_13 ),
1820	.c (metric_14 ),
1821	.d (metric_15 ),
1822	.sa (6'd12 ),
1823	.sb (6'd13 ),
1824	.sc (6'd14 ),
1825	.sd (6'd15 ),
1826	.state (state_3 ),
1827	.max (max_3 )
1828	) ;
1829
1830	//==============================
1831	// Get max metric
1832	//==============================
1833	max_metric #(M, K) max_metric_4 (
1834	.clk (clk ),
1835	.a (metric_16 ),
1836	.b (metric_17 ),
1837	.c (metric_18 ),
1838	.d (metric_19 ),
1839	.sa (6'd16 ),
1840	.sb (6'd17 ),
1841	.sc (6'd18 ),
1842	.sd (6'd19 ),
1843	.state (state_4 ),
1844	.max (max_4 )
1845	) ;
1846
1847	//==============================
1848	// Get max metric
1849	//==============================
1850	max_metric #(M, K) max_metric_5 (
1851	.clk (clk ),
1852	.a (metric_20 ),
1853	.b (metric_21 ),
1854	.c (metric_22 ),
1855	.d (metric_23 ),
1856	.sa (6'd20 ),
1857	.sb (6'd21 ),
1858	.sc (6'd22 ),
1859	.sd (6'd23 ),
1860	.state (state_5 ),
1861	.max (max_5 )
1862	) ;
1863
1864	//==============================
1865	// Get max metric
1866	//==============================
1867	max_metric #(M, K) max_metric_6 (
1868	.clk (clk ),
1869	.a (metric_24 ),
1870	.b (metric_25 ),
1871	.c (metric_26 ),
1872	.d (metric_27 ),
1873	.sa (6'd24 ),
1874	.sb (6'd25 ),
1875	.sc (6'd26 ),
1876	.sd (6'd27 ),
1877	.state (state_6 ),
1878	.max (max_6 )
1879	) ;
1880
1881	//==============================
1882	// Get max metric
1883	//==============================
1884	max_metric #(M, K) max_metric_7 (
1885	.clk (clk ),
1886	.a (metric_28 ),
1887	.b (metric_29 ),
1888	.c (metric_30 ),
1889	.d (metric_31 ),
1890	.sa (6'd28 ),
1891	.sb (6'd29 ),
1892	.sc (6'd30 ),
1893	.sd (6'd31 ),
1894	.state (state_7 ),
1895	.max (max_7 )
1896	) ;
1897
1898	//==============================
1899	// Get max metric
1900	//==============================
1901	max_metric #(M, K) max_metric_8 (
1902	.clk (clk ),
1903	.a (metric_32 ),
1904	.b (metric_33 ),
1905	.c (metric_34 ),
1906	.d (metric_35 ),
1907	.sa (6'd32 ),
1908	.sb (6'd33 ),
1909	.sc (6'd34 ),
1910	.sd (6'd35 ),
1911	.state (state_8 ),
1912	.max (max_8 )
1913	) ;
1914
1915	//==============================
1916	// Get max metric
1917	//==============================
1918	max_metric #(M, K) max_metric_9 (
1919	.clk (clk ),
1920	.a (metric_36 ),
1921	.b (metric_37 ),
1922	.c (metric_38 ),
1923	.d (metric_39 ),
1924	.sa (6'd36 ),
1925	.sb (6'd37 ),
1926	.sc (6'd38 ),
1927	.sd (6'd39 ),
1928	.state (state_9 ),
1929	.max (max_9 )
1930	) ;
1931
1932	//==============================
1933	// Get max metric
1934	//==============================
1935	max_metric #(M, K) max_metric_10 (
1936	.clk (clk ),
1937	.a (metric_40 ),
1938	.b (metric_41 ),
1939	.c (metric_42 ),
1940	.d (metric_43 ),
1941	.sa (6'd40 ),
1942	.sb (6'd41 ),
1943	.sc (6'd42 ),
1944	.sd (6'd43 ),
1945	.state (state_10 ),
1946	.max (max_10 )
1947	) ;
1948
1949	//==============================
1950	// Get max metric
1951	//==============================
1952	max_metric #(M, K) max_metric_11 (
1953	.clk (clk ),
1954	.a (metric_44 ),
1955	.b (metric_45 ),
1956	.c (metric_46 ),
1957	.d (metric_47 ),
1958	.sa (6'd44 ),
1959	.sb (6'd45 ),
1960	.sc (6'd46 ),
1961	.sd (6'd47 ),
1962	.state (state_11 ),
1963	.max (max_11 )
1964	) ;
1965
1966	//==============================
1967	// Get max metric
1968	//==============================
1969	max_metric #(M, K) max_metric_12 (
1970	.clk (clk ),
1971	.a (metric_48 ),
1972	.b (metric_49 ),
1973	.c (metric_50 ),
1974	.d (metric_51 ),
1975	.sa (6'd48 ),
1976	.sb (6'd49 ),
1977	.sc (6'd50 ),
1978	.sd (6'd51 ),
1979	.state (state_12 ),
1980	.max (max_12 )
1981	) ;
1982
1983	//==============================
1984	// Get max metric
1985	//==============================
1986	max_metric #(M, K) max_metric_13 (
1987	.clk (clk ),
1988	.a (metric_52 ),
1989	.b (metric_53 ),
1990	.c (metric_54 ),
1991	.d (metric_55 ),
1992	.sa (6'd52 ),
1993	.sb (6'd53 ),
1994	.sc (6'd54 ),
1995	.sd (6'd55 ),
1996	.state (state_13 ),
1997	.max (max_13 )
1998	) ;
1999
2000	//==============================
2001	// Get max metric
2002	//==============================
2003	max_metric #(M, K) max_metric_14 (
2004	.clk (clk ),
2005	.a (metric_56 ),
2006	.b (metric_57 ),
2007	.c (metric_58 ),
2008	.d (metric_59 ),
2009	.sa (6'd56 ),
2010	.sb (6'd57 ),
2011	.sc (6'd58 ),
2012	.sd (6'd59 ),
2013	.state (state_14 ),
2014	.max (max_14 )
2015	) ;
2016
2017	//==============================
2018	// Get max metric
2019	//==============================
2020	max_metric #(M, K) max_metric_15 (
2021	.clk (clk ),
2022	.a (metric_60 ),
2023	.b (metric_61 ),
2024	.c (metric_62 ),
2025	.d (metric_63 ),
2026	.sa (6'd60 ),
2027	.sb (6'd61 ),
2028	.sc (6'd62 ),
2029	.sd (6'd63 ),
2030	.state (state_15 ),
2031	.max (max_15 )
2032	) ;
2033
2034	//==============================
2035	// Get max metric
2036	//==============================
2037	max_metric #(M, K) max_metric_s1_0 (
2038	.clk (clk ),
2039	.a (max_0 ),
2040	.b (max_1 ),
2041	.c (max_2 ),
2042	.d (max_3 ),
2043	.sa (state_0 ),
2044	.sb (state_1 ),
2045	.sc (state_2 ),
2046	.sd (state_3 ),
2047	.state (state_s1_0 ),
2048	.max (max_s1_0 )
2049	) ;
2050
2051	//==============================
2052	// Get max metric
2053	//==============================
2054	max_metric #(M, K) max_metric_s1_1 (
2055	.clk (clk ),
2056	.a (max_4 ),
2057	.b (max_5 ),
2058	.c (max_6 ),
2059	.d (max_7 ),
2060	.sa (state_4 ),
2061	.sb (state_5 ),
2062	.sc (state_6 ),
2063	.sd (state_7 ),
2064	.state (state_s1_1 ),
2065	.max (max_s1_1 )
2066	) ;
2067
2068	//==============================
2069	// Get max metric
2070	//==============================
2071	max_metric #(M, K) max_metric_s1_2 (
2072	.clk (clk ),
2073	.a (max_8 ),
2074	.b (max_9 ),
2075	.c (max_10 ),
2076	.d (max_11 ),
2077	.sa (state_8 ),
2078	.sb (state_9 ),
2079	.sc (state_10 ),
2080	.sd (state_11 ),
2081	.state (state_s1_2 ),
2082	.max (max_s1_2 )
2083	) ;
2084
2085	//==============================
2086	// Get max metric
2087	//==============================
2088	max_metric #(M, K) max_metric_s1_3 (
2089	.clk (clk ),
2090	.a (max_12 ),
2091	.b (max_13 ),
2092	.c (max_14 ),
2093	.d (max_15 ),
2094	.sa (state_12 ),
2095	.sb (state_13 ),
2096	.sc (state_14 ),
2097	.sd (state_15 ),
2098	.state (state_s1_3 ),
2099	.max (max_s1_3 )
2100	) ;
2101
2102	//==============================
2103	// Get max metric
2104	//==============================
2105	max_metric_logic #(M, K) max_metric_s2_0 (
2106	.a (max_s1_0 ),
2107	.b (max_s1_1 ),
2108	.c (max_s1_2 ),
2109	.d (max_s1_3 ),
2110	.sa (state_s1_0 ),
2111	.sb (state_s1_1 ),
2112	.sc (state_s1_2 ),
2113	.sd (state_s1_3 ),
2114	.state (state_s2_0 ),
2115	.max ( )
2116	) ;
2117
2118	assign init_state_i = state_s2_0 ;
2119
2120	always @ (posedge clk)
2121	if(~nrst)
2122	trace_state <= 0 ;
2123	else
2124	begin
2125	if (trace_pos)
2126	begin
2127	if(zero_tail & trace2_s2)
2128	trace_state <= 0 ;
2129	else
2130	trace_state <= init_state_i ;
2131	end
2132	else if (trace_en)
2133	trace_state <= next_state ;
2134	end
2135
2136	// POM: pipeline reg on trace_start_wptr, breaks 7-level critical path
2137	reg [TRW -1:0] trace_start_wptr_d;
2138	always @(posedge clk)
2139	begin
2140	trace_start_wptr_d <= trace_start_wptr;
2141	end
2142
2143
2144	//assign trace_start_pos = trace_start_wptr ;
2145	assign trace_start_pos = trace_start_wptr_d ;
2146
2147	assign trace_start_pos0 = trace_start_pos - trace_cnt ;
2148	assign trace_start_pos1 = trace_start_pos - trace_cnt -1 ;
2149
2150	assign cur_state0 = trace_state ;
2151
2152	assign tran_all_0 = {
2153	tran_state_63[trace_start_pos0], tran_state_62[trace_start_pos0], tran_state_61[trace_start_pos0], tran_state_60[trace_start_pos0],
2154	tran_state_59[trace_start_pos0], tran_state_58[trace_start_pos0], tran_state_57[trace_start_pos0], tran_state_56[trace_start_pos0],
2155	tran_state_55[trace_start_pos0], tran_state_54[trace_start_pos0], tran_state_53[trace_start_pos0], tran_state_52[trace_start_pos0],
2156	tran_state_51[trace_start_pos0], tran_state_50[trace_start_pos0], tran_state_49[trace_start_pos0], tran_state_48[trace_start_pos0],
2157
2158	tran_state_47[trace_start_pos0], tran_state_46[trace_start_pos0], tran_state_45[trace_start_pos0], tran_state_44[trace_start_pos0],
2159	tran_state_43[trace_start_pos0], tran_state_42[trace_start_pos0], tran_state_41[trace_start_pos0], tran_state_40[trace_start_pos0],
2160	tran_state_39[trace_start_pos0], tran_state_38[trace_start_pos0], tran_state_37[trace_start_pos0], tran_state_36[trace_start_pos0],
2161	tran_state_35[trace_start_pos0], tran_state_34[trace_start_pos0], tran_state_33[trace_start_pos0], tran_state_32[trace_start_pos0],
2162
2163	tran_state_31[trace_start_pos0], tran_state_30[trace_start_pos0], tran_state_29[trace_start_pos0], tran_state_28[trace_start_pos0],
2164	tran_state_27[trace_start_pos0], tran_state_26[trace_start_pos0], tran_state_25[trace_start_pos0], tran_state_24[trace_start_pos0],
2165	tran_state_23[trace_start_pos0], tran_state_22[trace_start_pos0], tran_state_21[trace_start_pos0], tran_state_20[trace_start_pos0],
2166	tran_state_19[trace_start_pos0], tran_state_18[trace_start_pos0], tran_state_17[trace_start_pos0], tran_state_16[trace_start_pos0],
2167
2168	tran_state_15[trace_start_pos0], tran_state_14[trace_start_pos0], tran_state_13[trace_start_pos0], tran_state_12[trace_start_pos0],
2169	tran_state_11[trace_start_pos0], tran_state_10[trace_start_pos0], tran_state_9[trace_start_pos0], tran_state_8[trace_start_pos0],
2170	tran_state_7[trace_start_pos0], tran_state_6[trace_start_pos0], tran_state_5[trace_start_pos0], tran_state_4[trace_start_pos0],
2171	tran_state_3[trace_start_pos0], tran_state_2[trace_start_pos0], tran_state_1[trace_start_pos0], tran_state_0[trace_start_pos0]} ;
2172
2173	assign tran_all_1 = {
2174	tran_state_63[trace_start_pos1], tran_state_62[trace_start_pos1], tran_state_61[trace_start_pos1], tran_state_60[trace_start_pos1],
2175	tran_state_59[trace_start_pos1], tran_state_58[trace_start_pos1], tran_state_57[trace_start_pos1], tran_state_56[trace_start_pos1],
2176	tran_state_55[trace_start_pos1], tran_state_54[trace_start_pos1], tran_state_53[trace_start_pos1], tran_state_52[trace_start_pos1],
2177	tran_state_51[trace_start_pos1], tran_state_50[trace_start_pos1], tran_state_49[trace_start_pos1], tran_state_48[trace_start_pos1],
2178
2179	tran_state_47[trace_start_pos1], tran_state_46[trace_start_pos1], tran_state_45[trace_start_pos1], tran_state_44[trace_start_pos1],
2180	tran_state_43[trace_start_pos1], tran_state_42[trace_start_pos1], tran_state_41[trace_start_pos1], tran_state_40[trace_start_pos1],
2181	tran_state_39[trace_start_pos1], tran_state_38[trace_start_pos1], tran_state_37[trace_start_pos1], tran_state_36[trace_start_pos1],
2182	tran_state_35[trace_start_pos1], tran_state_34[trace_start_pos1], tran_state_33[trace_start_pos1], tran_state_32[trace_start_pos1],
2183
2184	tran_state_31[trace_start_pos1], tran_state_30[trace_start_pos1], tran_state_29[trace_start_pos1], tran_state_28[trace_start_pos1],
2185	tran_state_27[trace_start_pos1], tran_state_26[trace_start_pos1], tran_state_25[trace_start_pos1], tran_state_24[trace_start_pos1],
2186	tran_state_23[trace_start_pos1], tran_state_22[trace_start_pos1], tran_state_21[trace_start_pos1], tran_state_20[trace_start_pos1],
2187	tran_state_19[trace_start_pos1], tran_state_18[trace_start_pos1], tran_state_17[trace_start_pos1], tran_state_16[trace_start_pos1],
2188
2189	tran_state_15[trace_start_pos1], tran_state_14[trace_start_pos1], tran_state_13[trace_start_pos1], tran_state_12[trace_start_pos1],
2190	tran_state_11[trace_start_pos1], tran_state_10[trace_start_pos1], tran_state_9[trace_start_pos1], tran_state_8[trace_start_pos1],
2191	tran_state_7[trace_start_pos1], tran_state_6[trace_start_pos1], tran_state_5[trace_start_pos1], tran_state_4[trace_start_pos1],
2192	tran_state_3[trace_start_pos1], tran_state_2[trace_start_pos1], tran_state_1[trace_start_pos1], tran_state_0[trace_start_pos1]} ;
2193
2194
2195	assign cur_state1 = get_next_trace_state (cur_state0, tran_all_0) ;
2196	assign next_state = get_next_trace_state (cur_state1, tran_all_1) ;
2197
2198	assign state0_bit = cur_state0 [K -2] ;
2199	assign state1_bit = cur_state1 [K -2] ;
2200
2201	always @ (posedge clk)
2202	if(~nrst)
2203	res <= 0 ;
2204	else
2205	begin
2206	if (trace_pos)
2207	res <= 0 ;
2208	else if (trace_en)
2209	begin
2210	res <= {state1_bit, state0_bit, res [L-1:2]} ;
2211	end
2212	end
2213
2214	//======================================
2215	// function: get_next_trace_state
2216	//======================================
2217	function [K-2:0] get_next_trace_state ;
2218	input [K-2:0] cur_state_in ;
2219	input [N -1:0] tran_state_in ;
2220	reg [N -1:0] tmp ;
2221	begin
2222	tmp = tran_state_in >> cur_state_in ;
2223	get_next_trace_state = {cur_state_in [K-3:0], tmp[0]} ;
2224	end
2225	endfunction
2226
2227	endmodule
2228
2229
2230	//**************************************************************
2231	// File: max_metric_logic.v
2232	// Author: Yang Sun (ysun@rice.edu)
2233	// Birth: $ 1/14/07
2234	// Des: The top level of viterbi decoder
2235	// Take 5 bit soft value is [-16 : +15]
2236	// K = 7. g0 = 133, g1 = 171
2237	// History: $ 1/14/07, Init coding
2238	// $ 1/22/07, K = 5, Zero latency
2239	// $ 12/1/07: Updated
2240	//**************************************************************
2241	module max_metric_logic (
2242	a , // I, metric a
2243	b , // I, metric b
2244	c , // I, metric c
2245	d , // I, metric d
2246	sa , // I, state a
2247	sb , // I, state b
2248	sc , // I, state c
2249	sd , // I, state d
2250	state , // O, state
2251	max // O, max metric
2252	) ;
2253
2254	parameter M = 7 ;
2255	parameter K = 7 ;
2256
2257	input [M -1:0] a ;
2258	input [M -1:0] b ;
2259	input [M -1:0] c ;
2260	input [M -1:0] d ;
2261
2262	input [K -2:0] sa ;
2263	input [K -2:0] sb ;
2264	input [K -2:0] sc ;
2265	input [K -2:0] sd ;
2266
2267	output [K -2:0] state ;
2268	output [M -1:0] max ;
2269
2270	//==================================
2271	//Internal signal
2272	//==================================
2273
2274	reg [K -2:0] pos0 ;
2275	reg [K -2:0] pos1 ;
2276	reg [M -1:0] max0 ;
2277	reg [M -1:0] max1 ;
2278	reg [M -1:0] tmp ;
2279	reg [K -2:0] state_i ;
2280	reg [M -1:0] max_i ;
2281
2282	//==================================
2283	// Main body of code
2284	//==================================
2285	assign state = state_i ;
2286	assign max = max_i ;
2287
2288	always @*
2289	begin
2290	tmp = a-b ;
2291	if(~tmp[M -1])
2292	begin
2293	max0 = a ;
2294	pos0 = sa ;
2295	end
2296	else
2297	begin
2298	max0 = b ;
2299	pos0 = sb ;
2300	end
2301
2302	tmp = c-d ;
2303	if(~tmp[M-1])
2304	begin
2305	max1 = c ;
2306	pos1 = sc ;
2307	end
2308	else
2309	begin
2310	max1 = d ;
2311	pos1 = sd ;
2312	end
2313
2314	tmp = max0 - max1 ;
2315	if (~tmp[M-1])
2316	begin
2317	max_i = max0 ;
2318	state_i = pos0 ;
2319	end
2320	else
2321	begin
2322	state_i = pos1 ;
2323	max_i = max1 ;
2324	end
2325	end
2326
2327	endmodule
2328
2329	//**************************************************************
2330	// File: max_metric
2331	// Author: Yang Sun (ysun@rice.edu)
2332	// Birth: $ 1/14/07
2333	// Des: Find max metric
2334	// K = 7. g0 = 133, g1 = 171
2335	// History: $ 1/14/07, Init coding
2336	// $ 1/22/07, K = 5
2337	// $ 2/23/07, 1 pipeline
2338	// $ 12/1/07: updated
2339	//**************************************************************
2340	module max_metric (
2341	clk , // I, clock
2342	a , // I, metric a
2343	b , // I, metric b
2344	c , // I, metric c
2345	d , // I, metric d
2346	sa , // I, state a
2347	sb , // I, state b
2348	sc , // I, state c
2349	sd , // I, state d
2350	state , // O, state
2351	max // O, max metric
2352	) ;
2353
2354	parameter M = 7 ;
2355	parameter K = 7 ;
2356
2357	input clk ;
2358	input [M -1:0] a ;
2359	input [M -1:0] b ;
2360	input [M -1:0] c ;
2361	input [M -1:0] d ;
2362
2363	input [K -2:0] sa ;
2364	input [K -2:0] sb ;
2365	input [K -2:0] sc ;
2366	input [K -2:0] sd ;
2367
2368	output [K -2:0] state ;
2369	output [M -1:0] max ;
2370
2371	//=====================================
2372	//Internal signal
2373	//=====================================
2374	reg [K -2:0] pos0 ;
2375	reg [K -2:0] pos1 ;
2376	reg [M -1:0] max0 ;
2377	reg [M -1:0] max1 ;
2378	reg [M -1:0] tmp ;
2379	reg [K -2:0] state_i ;
2380	reg [M -1:0] max_i ;
2381	reg [K -2:0] state_reg ;
2382	reg [M -1:0] max_reg ;
2383
2384	//=====================================
2385	// Main RTL code
2386	//=====================================
2387	assign state = state_reg ;
2388	assign max = max_reg ;
2389
2390	always @ (posedge clk)
2391	begin
2392	state_reg <= state_i ;
2393	max_reg <= max_i ;
2394	end
2395
2396	always @*
2397	begin
2398	tmp = a-b ;
2399	if(~tmp[M -1])
2400	begin
2401	max0 = a ;
2402	pos0 = sa ;
2403	end
2404	else
2405	begin
2406	max0 = b ;
2407	pos0 = sb ;
2408	end
2409
2410	tmp = c-d ;
2411	if(~tmp[M-1])
2412	begin
2413	max1 = c ;
2414	pos1 = sc ;
2415	end
2416	else
2417	begin
2418	max1 = d ;
2419	pos1 = sd ;
2420	end
2421
2422	tmp = max0 - max1 ;
2423	if (~tmp[M-1])
2424	begin
2425	max_i = max0 ;
2426	state_i = pos0 ;
2427	end
2428	else
2429	begin
2430	state_i = pos1 ;
2431	max_i = max1 ;
2432	end
2433	end
2434
2435	endmodule

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source: ReferenceDesigns/w3_802.11/sysgen/wlan_phy_rx_pmd/blackboxes/vb_decoder_rest.v

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