WARP v3 User Guide: USB User I/O

The WARP v3 board includes a variety of user I/O for observing and interacting with designs at run time.


There are 12 LEDs connected directly to dedicated FPGA I/O.

Eight LEDs (4 green, 4 red) are arranged in 2 columns in the user I/O section of the board.

Four additional LEDs (2 red, 2 green) are mounted near the RF interfaces. These are intended to reflect activity in the RF interfaces, but this is not required.

All 12 LEDs are active high; driving the corresponding FPGA pin to 1 will illuminate the LED.

Buttons & Switches

There are 3 push buttons and 1 4-position DIP switch in the user I/O section. Each button/switch is connected to a dedicated FPGA pin.

The FPGA pins connected to the buttons are pulled low by default and driven high when the button is pressed.

The DIP switch pins are pulled low by default and driven high when a switch is slid up.

There is a fourth push button, mounted near the switch and buttons controlling FPGA configuration. This button is labeled RESET on the board. It is tied to a general purpose FPGA pin, but is intended as a process reset. Refer to our reference projects for an example of connecting this button to the standard XPS reset logic.

Seven-Segment Displays

There are two 7-segment displays (a.k.a. hex displays). Each display has 8 LED elements- 7 comprising the digit plus a decimal point. All 16 LEDs are tied to individual FPGA pins. The WARP v3 board supports either common anode or common cathode displays. All current WARP v3 boards are build with a common cathode part. As a result, driving a FPGA pin low will illuminate the corresponding LED segment.

The seven LED segments in each display are individually controlled. The w3_userio core implements a 4-bit to 7-bit mapping block that translates a 4-bit value to the 7-bit pattern best approximating the corresponding hexadecimal character. This mapping logic is enabled by default. When disabled the seven segments are mapped to bits in w3_userio output register according to the pattern below.

User I/O Control

We have written the w3_userio core to provide easy access to all user I/O elements on the WARP v3 board. Refer to the w3_userio page and our reference projects for examples.

Last modified 11 years ago Last modified on Aug 15, 2013, 3:31:33 PM